powerpc/amigaone: Add CPLD driver for AmigaOne A1222 "Tabor"
Like the X5000, the main CPLD on the A1222 is the communication medium between the CPU and the GPIO CPLD. It provides a mailbox communication feature, along with dual-port RAM accessible from both the CPU and GPIO CPLD, and 3 fan speed reporting registers.
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jhibbits
parent
fdcad7c272
commit
9aa0532b5d
@ -140,7 +140,8 @@ powerpc/aim/moea64_native.c optional aim
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powerpc/aim/mp_cpudep.c optional aim
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powerpc/aim/slb.c optional aim powerpc64
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powerpc/amigaone/platform_amigaone.c optional amigaone
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powerpc/amigaone/cpld_x5000.c optional powerpc amigaone | powerpc64 amigaone
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powerpc/amigaone/cpld_a1222.c optional powerpc amigaone | powerpcspe amigaone
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powerpc/amigaone/cpld_x5000.c optional powerpc amigaone | powerpc64 amigaone
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powerpc/booke/locore.S optional booke no-obj
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powerpc/booke/booke_machdep.c optional booke
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powerpc/booke/machdep_e500.c optional booke_e500
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401
sys/powerpc/amigaone/cpld_a1222.c
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401
sys/powerpc/amigaone/cpld_a1222.c
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@ -0,0 +1,401 @@
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/*-
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* Copyright (c) 2020 Justin Hibbits
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/limits.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/rman.h>
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#include <sys/sysctl.h>
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#include <machine/bus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <sys/kdb.h>
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#include "cpld.h"
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/*
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* A driver for the AmigaOne A1222 "Tabor" Main CPLD.
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*
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* The main CPLD is the interface between the CPU and the GPIO CPLD.
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* Communication with the GPIO CPLD is over the main CPLD's mailbox interface,
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* along with the dual-port RAM on the CPLD.
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*
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* Only one process can open the CPLD character device at a time. The driver
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* enforces this to simplify the communication protocol.
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*/
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/* Resource access addresses. */
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#define CPLD_MEM_ADDR_H 0x00
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#define CPLD_MEM_ADDR_L 0x01
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#define CPLD_MEM_DATA 0x80
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#define CPLD_MAX_DRAM_WORDS 0x800
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/* CPLD Registers. */
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#define CPLD_REG_SIG1 0x00
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#define CPLD_REG_SIG2 0x01
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#define CPLD_REG_HWREV 0x02
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#define CPLD_REG_CPLDREV 0x03
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#define CPLD_REG_MBC2X 0x04
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#define CPLD_REG_MBX2C 0x05
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#define CPLD_REG_FAN1_TACHO_U 0x10
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#define CPLD_REG_FAN1_TACHO_L 0x11
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#define CPLD_REG_FAN2_TACHO_U 0x12
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#define CPLD_REG_FAN2_TACHO_L 0x13
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#define CPLD_REG_FAN3_TACHO_U 0x14
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#define CPLD_REG_FAN3_TACHO_L 0x15
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#define CPLD_REG_DATE_UU 0x20
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#define CPLD_REG_DATE_UL 0x21
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#define CPLD_REG_DATE_LU 0x22
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#define CPLD_REG_DATE_LL 0x23
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#define CPLD_REG_TIME_UU 0x24
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#define CPLD_REG_TIME_UL 0x25
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#define CPLD_REG_TIME_LU 0x26
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#define CPLD_REG_TIME_LL 0x27
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#define CPLD_REG_SCR1 0x5c
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#define CPLD_REG_SCR2 0x6a
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#define CPLD_REG_RAM 0x80
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struct cpld_softc {
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device_t sc_dev;
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struct resource *sc_mem;
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struct cdev *sc_cdev;
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struct mtx sc_mutex;
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bool sc_isopen;
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};
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static d_open_t cpld_open;
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static d_close_t cpld_close;
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static d_ioctl_t cpld_ioctl;
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static struct cdevsw cpld_cdevsw = {
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.d_version = D_VERSION,
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.d_open = cpld_open,
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.d_close = cpld_close,
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.d_ioctl = cpld_ioctl,
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.d_name = "nvram",
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};
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static device_probe_t cpld_probe;
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static device_attach_t cpld_attach;
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static int cpld_fan_sysctl(SYSCTL_HANDLER_ARGS);
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static device_method_t cpld_methods[] = {
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DEVMETHOD(device_probe, cpld_probe),
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DEVMETHOD(device_attach, cpld_attach),
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DEVMETHOD_END
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};
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static driver_t cpld_driver = {
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"cpld",
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cpld_methods,
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sizeof(struct cpld_softc)
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};
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static devclass_t cpld_devclass;
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DRIVER_MODULE(cpld, lbc, cpld_driver, cpld_devclass, 0, 0);
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static void
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cpld_write(struct cpld_softc *sc, int addr, int data)
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{
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if (addr >= CPLD_REG_RAM) {
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bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
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bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_L, addr);
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} else
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bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
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bus_write_1(sc->sc_mem, CPLD_MEM_DATA, data);
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}
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static int
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cpld_read(struct cpld_softc *sc, int addr)
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{
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if (addr >= CPLD_REG_RAM) {
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bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
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bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_L, addr);
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} else
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bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
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return (bus_read_1(sc->sc_mem, CPLD_MEM_DATA));
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}
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/*
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* This is only to read a register that's split into two 8-bit registers.
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* Dual-port RAM is not accepted for this purpose.
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*/
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static int
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cpld_read_pair(struct cpld_softc *sc, int addr)
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{
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int tmp;
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KASSERT(addr <= 0xff, ("Invalid register-pair base address %x.", addr));
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bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
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tmp = bus_read_1(sc->sc_mem, CPLD_MEM_DATA) << 8;
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bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr + 1);
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tmp |= bus_read_1(sc->sc_mem, CPLD_MEM_DATA);
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return (tmp);
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}
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static int
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cpld_probe(device_t dev)
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{
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if (!ofw_bus_is_compatible(dev, "aeon,tabor-cpld"))
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return (ENXIO);
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device_set_desc(dev, "AmigaOne Tabor CPLD");
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return (BUS_PROBE_GENERIC);
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}
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static int
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cpld_attach(device_t dev)
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{
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struct make_dev_args mda;
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struct cpld_softc *sc;
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int rid;
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int date, time, tmp;
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int err;
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struct sysctl_ctx_list *ctx;
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struct sysctl_oid *tree;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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rid = 0;
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sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE|RF_SHAREABLE);
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if (sc->sc_mem == NULL) {
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device_printf(dev, "Unable to allocate memory resource.\n");
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return (ENXIO);
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}
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mtx_init(&sc->sc_mutex, "cpld", NULL, MTX_DEF);
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if (bootverbose) {
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date = (cpld_read_pair(sc, CPLD_REG_DATE_UU) << 16) |
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cpld_read_pair(sc, CPLD_REG_DATE_LU);
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time = (cpld_read_pair(sc, CPLD_REG_TIME_UU) << 16) |
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cpld_read_pair(sc, CPLD_REG_TIME_LU);
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device_printf(dev, "Build date: %04x-%02x-%02x\n",
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(date >> 16) & 0xffff, (date >> 8) & 0xff, date & 0xff);
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#if 0
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/* Build time is nonsense on tested system. */
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device_printf(dev, "Build time: %02x:%02x:%02x\n",
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(time >> 16) & 0xff, (time >> 8) & 0xff, time & 0xff);
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#endif
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}
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tmp = cpld_read(sc, CPLD_REG_HWREV);
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device_printf(dev, "Hardware revision: %d\n", tmp);
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ctx = device_get_sysctl_ctx(dev);
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tree = device_get_sysctl_tree(dev);
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SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
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"cpu_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc,
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CPLD_REG_FAN1_TACHO_U, cpld_fan_sysctl, "I",
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"CPU Fan speed in RPM");
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SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
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"case_1_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc,
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CPLD_REG_FAN2_TACHO_U, cpld_fan_sysctl, "I",
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"Case fan 1 speed in RPM");
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SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
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"case_2_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc,
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CPLD_REG_FAN3_TACHO_U, cpld_fan_sysctl, "I",
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"Case fan 2 speed in RPM");
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make_dev_args_init(&mda);
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mda.mda_flags = MAKEDEV_CHECKNAME;
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mda.mda_devsw = &cpld_cdevsw;
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mda.mda_uid = UID_ROOT;
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mda.mda_gid = GID_WHEEL;
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mda.mda_mode = 0660;
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err = make_dev_s(&mda, &sc->sc_cdev, "cpld");
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if (err != 0) {
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device_printf(dev, "Error creating character device: %d\n", err);
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device_printf(dev, "Only sysctl interfaces will be available.\n");
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}
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return (0);
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}
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static int
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cpld_fan_sysctl(SYSCTL_HANDLER_ARGS)
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{
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struct cpld_softc *sc;
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int error, old, rpm;
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int fan_reg;
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sc = arg1;
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fan_reg = arg2;
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mtx_lock(&sc->sc_mutex);
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/* Read until we get some level of read stability. */
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rpm = cpld_read(sc, fan_reg);
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do {
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old = rpm;
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rpm = cpld_read_pair(sc, fan_reg);
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} while (abs(rpm - old) > 10);
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mtx_unlock(&sc->sc_mutex);
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/* Convert RPS->RPM. */
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rpm *= 60;
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error = sysctl_handle_int(oidp, &rpm, 0, req);
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return (error);
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}
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static int
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cpld_open(struct cdev *dev, int flags, int fmt, struct thread *td)
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{
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struct cpld_softc *sc = dev->si_drv1;
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if (sc->sc_isopen)
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return (EBUSY);
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sc->sc_isopen = 1;
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return (0);
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}
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static int
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cpld_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
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{
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struct cpld_softc *sc = dev->si_drv1;
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sc->sc_isopen = 0;
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return (0);
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}
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/*
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* Send a command over the CPLD to the other side.
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*
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* This will first copy the data into the dual-port RAM, then signal the other
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* side by writing to the mailbox.
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*/
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static int
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cpld_send(device_t dev, struct cpld_cmd_data *d)
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{
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struct cpld_softc *sc;
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uint16_t *word;
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int i;
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if (d->cmd > USHRT_MAX)
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return (EINVAL);
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sc = device_get_softc(dev);
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mtx_lock(&sc->sc_mutex);
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for (i = 0, word = d->words; i < d->len; i++, word++) {
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if (i == 0)
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cpld_write(sc, CPLD_REG_RAM + d->offset, *word);
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else
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bus_write_4(sc->sc_mem, CPLD_MEM_DATA, *word);
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}
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cpld_write(sc, CPLD_REG_MBC2X, d->cmd);
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mtx_unlock(&sc->sc_mutex);
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return (0);
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}
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static int
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cpld_recv(device_t dev, struct cpld_cmd_data *d)
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{
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struct cpld_softc *sc;
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uint16_t *word;
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int i;
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sc = device_get_softc(dev);
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mtx_lock(&sc->sc_mutex);
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d->cmd = cpld_read(sc, CPLD_REG_MBX2C);
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for (i = 0, word = d->words; i < d->len; i++, word++) {
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if (i == 0)
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*word = cpld_read(sc, CPLD_REG_RAM + d->offset);
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else
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*word = bus_read_4(sc->sc_mem, CPLD_MEM_DATA);
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}
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mtx_unlock(&sc->sc_mutex);
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return (0);
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}
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static int
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cpld_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
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struct thread *td)
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{
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struct cpld_softc *sc;
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struct cpld_cmd_data *d;
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void *xfer_data, *tmp;
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int err;
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sc = dev->si_drv1;
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err = 0;
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d = (struct cpld_cmd_data *)data;
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if (d->len + d->offset > CPLD_MAX_DRAM_WORDS) {
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return (EINVAL);
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}
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xfer_data = malloc(d->len * sizeof(uint16_t), M_TEMP, M_WAITOK);
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switch (cmd) {
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case IOCCPLDSEND:
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err = copyin(d->words, xfer_data, d->len * sizeof(uint16_t));
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d->words = xfer_data;
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if (err == 0)
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err = cpld_send(sc->sc_dev, d);
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break;
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case IOCCPLDRECV:
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tmp = d->words;
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d->words = xfer_data;
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err = cpld_recv(sc->sc_dev, d);
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d->words = tmp;
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if (err == 0)
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err = copyout(xfer_data, d->words,
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d->len * sizeof(uint16_t));
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break;
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default:
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err = ENOTTY;
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break;
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}
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free(xfer_data, M_TEMP);
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return (err);
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}
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