At least the ASUS Triton motherboards don't disable the PCI bus configuration
accesses after the BIOS bus scan. The previous revision made the assumption, that every PCI motherboard did ... Change the test on the initial value of the CONF1_ADDR_PORT register in a way that makes the probe succeed on triton based motherboards, without breaking the EISA motherboard that has some non-PCI register at the same address.
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@ -1,6 +1,6 @@
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/**************************************************************************
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**
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** $Id: pcibus.c,v 1.16 1995/10/09 21:56:24 se Exp $
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** $Id: pcibus.c,v 1.17 1995/10/15 23:43:08 se Exp $
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**
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** pci bus subroutines for i386 architecture.
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**
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@ -146,7 +146,8 @@ DATA_SET (pcibus_set, i386pci);
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#define CONF1_ENABLE 0x80000000ul
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#define CONF1_ENABLE_CHK 0x80000000ul
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#define CONF1_ENABLE_CHK1 0xFF000001ul
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#define CONF1_ENABLE_MSK 0x00ff07fful
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#define CONF1_ENABLE_CHK1 0xff000001ul
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#define CONF1_ENABLE_MSK1 0x80000001ul
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#define CONF1_ENABLE_RES1 0x80000000ul
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@ -187,7 +188,7 @@ pcibus_setup (void)
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oldval1 = inl (CONF1_ADDR_PORT);
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if (bootverbose) {
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printf ("pcibus_setup(1):\tmode1 addr port (0x0cf8) is 0x%08lx\n", oldval1);
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printf ("pcibus_setup(1):\tmode 1 addr port (0x0cf8) is 0x%08lx\n", oldval1);
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}
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/*---------------------------------------
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@ -195,7 +196,7 @@ pcibus_setup (void)
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**---------------------------------------
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*/
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if ((oldval1 & CONF1_ENABLE) == 0) {
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if ((oldval1 & CONF1_ENABLE_MSK) == 0) {
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pci_mechanism = 1;
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pci_maxdevice = 32;
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@ -1,6 +1,6 @@
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/**************************************************************************
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**
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** $Id: pcibus.c,v 1.16 1995/10/09 21:56:24 se Exp $
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** $Id: pcibus.c,v 1.17 1995/10/15 23:43:08 se Exp $
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**
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** pci bus subroutines for i386 architecture.
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**
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@ -146,7 +146,8 @@ DATA_SET (pcibus_set, i386pci);
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#define CONF1_ENABLE 0x80000000ul
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#define CONF1_ENABLE_CHK 0x80000000ul
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#define CONF1_ENABLE_CHK1 0xFF000001ul
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#define CONF1_ENABLE_MSK 0x00ff07fful
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#define CONF1_ENABLE_CHK1 0xff000001ul
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#define CONF1_ENABLE_MSK1 0x80000001ul
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#define CONF1_ENABLE_RES1 0x80000000ul
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@ -187,7 +188,7 @@ pcibus_setup (void)
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oldval1 = inl (CONF1_ADDR_PORT);
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if (bootverbose) {
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printf ("pcibus_setup(1):\tmode1 addr port (0x0cf8) is 0x%08lx\n", oldval1);
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printf ("pcibus_setup(1):\tmode 1 addr port (0x0cf8) is 0x%08lx\n", oldval1);
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}
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/*---------------------------------------
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@ -195,7 +196,7 @@ pcibus_setup (void)
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**---------------------------------------
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*/
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if ((oldval1 & CONF1_ENABLE) == 0) {
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if ((oldval1 & CONF1_ENABLE_MSK) == 0) {
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pci_mechanism = 1;
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pci_maxdevice = 32;
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@ -1,6 +1,6 @@
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/**************************************************************************
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**
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** $Id: pcibus.c,v 1.16 1995/10/09 21:56:24 se Exp $
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** $Id: pcibus.c,v 1.17 1995/10/15 23:43:08 se Exp $
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**
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** pci bus subroutines for i386 architecture.
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**
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@ -146,7 +146,8 @@ DATA_SET (pcibus_set, i386pci);
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#define CONF1_ENABLE 0x80000000ul
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#define CONF1_ENABLE_CHK 0x80000000ul
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#define CONF1_ENABLE_CHK1 0xFF000001ul
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#define CONF1_ENABLE_MSK 0x00ff07fful
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#define CONF1_ENABLE_CHK1 0xff000001ul
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#define CONF1_ENABLE_MSK1 0x80000001ul
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#define CONF1_ENABLE_RES1 0x80000000ul
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@ -187,7 +188,7 @@ pcibus_setup (void)
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oldval1 = inl (CONF1_ADDR_PORT);
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if (bootverbose) {
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printf ("pcibus_setup(1):\tmode1 addr port (0x0cf8) is 0x%08lx\n", oldval1);
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printf ("pcibus_setup(1):\tmode 1 addr port (0x0cf8) is 0x%08lx\n", oldval1);
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}
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/*---------------------------------------
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@ -195,7 +196,7 @@ pcibus_setup (void)
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**---------------------------------------
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*/
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if ((oldval1 & CONF1_ENABLE) == 0) {
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if ((oldval1 & CONF1_ENABLE_MSK) == 0) {
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pci_mechanism = 1;
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pci_maxdevice = 32;
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@ -1,6 +1,6 @@
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/**************************************************************************
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**
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** $Id: pcibus.c,v 1.16 1995/10/09 21:56:24 se Exp $
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** $Id: pcibus.c,v 1.17 1995/10/15 23:43:08 se Exp $
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**
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** pci bus subroutines for i386 architecture.
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**
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@ -146,7 +146,8 @@ DATA_SET (pcibus_set, i386pci);
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#define CONF1_ENABLE 0x80000000ul
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#define CONF1_ENABLE_CHK 0x80000000ul
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#define CONF1_ENABLE_CHK1 0xFF000001ul
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#define CONF1_ENABLE_MSK 0x00ff07fful
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#define CONF1_ENABLE_CHK1 0xff000001ul
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#define CONF1_ENABLE_MSK1 0x80000001ul
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#define CONF1_ENABLE_RES1 0x80000000ul
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@ -187,7 +188,7 @@ pcibus_setup (void)
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oldval1 = inl (CONF1_ADDR_PORT);
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if (bootverbose) {
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printf ("pcibus_setup(1):\tmode1 addr port (0x0cf8) is 0x%08lx\n", oldval1);
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printf ("pcibus_setup(1):\tmode 1 addr port (0x0cf8) is 0x%08lx\n", oldval1);
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}
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/*---------------------------------------
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@ -195,7 +196,7 @@ pcibus_setup (void)
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**---------------------------------------
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*/
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if ((oldval1 & CONF1_ENABLE) == 0) {
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if ((oldval1 & CONF1_ENABLE_MSK) == 0) {
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pci_mechanism = 1;
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pci_maxdevice = 32;
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@ -1,6 +1,6 @@
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/**************************************************************************
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**
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** $Id: pcibus.c,v 1.16 1995/10/09 21:56:24 se Exp $
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** $Id: pcibus.c,v 1.17 1995/10/15 23:43:08 se Exp $
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**
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** pci bus subroutines for i386 architecture.
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**
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@ -146,7 +146,8 @@ DATA_SET (pcibus_set, i386pci);
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#define CONF1_ENABLE 0x80000000ul
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#define CONF1_ENABLE_CHK 0x80000000ul
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#define CONF1_ENABLE_CHK1 0xFF000001ul
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#define CONF1_ENABLE_MSK 0x00ff07fful
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#define CONF1_ENABLE_CHK1 0xff000001ul
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#define CONF1_ENABLE_MSK1 0x80000001ul
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#define CONF1_ENABLE_RES1 0x80000000ul
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@ -187,7 +188,7 @@ pcibus_setup (void)
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oldval1 = inl (CONF1_ADDR_PORT);
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if (bootverbose) {
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printf ("pcibus_setup(1):\tmode1 addr port (0x0cf8) is 0x%08lx\n", oldval1);
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printf ("pcibus_setup(1):\tmode 1 addr port (0x0cf8) is 0x%08lx\n", oldval1);
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}
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/*---------------------------------------
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@ -195,7 +196,7 @@ pcibus_setup (void)
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**---------------------------------------
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*/
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if ((oldval1 & CONF1_ENABLE) == 0) {
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if ((oldval1 & CONF1_ENABLE_MSK) == 0) {
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pci_mechanism = 1;
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pci_maxdevice = 32;
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@ -1,6 +1,6 @@
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/**************************************************************************
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**
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** $Id: pcibus.c,v 1.16 1995/10/09 21:56:24 se Exp $
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** $Id: pcibus.c,v 1.17 1995/10/15 23:43:08 se Exp $
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**
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** pci bus subroutines for i386 architecture.
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**
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@ -146,7 +146,8 @@ DATA_SET (pcibus_set, i386pci);
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#define CONF1_ENABLE 0x80000000ul
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#define CONF1_ENABLE_CHK 0x80000000ul
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#define CONF1_ENABLE_CHK1 0xFF000001ul
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#define CONF1_ENABLE_MSK 0x00ff07fful
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#define CONF1_ENABLE_CHK1 0xff000001ul
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#define CONF1_ENABLE_MSK1 0x80000001ul
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#define CONF1_ENABLE_RES1 0x80000000ul
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@ -187,7 +188,7 @@ pcibus_setup (void)
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oldval1 = inl (CONF1_ADDR_PORT);
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if (bootverbose) {
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printf ("pcibus_setup(1):\tmode1 addr port (0x0cf8) is 0x%08lx\n", oldval1);
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printf ("pcibus_setup(1):\tmode 1 addr port (0x0cf8) is 0x%08lx\n", oldval1);
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}
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/*---------------------------------------
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@ -195,7 +196,7 @@ pcibus_setup (void)
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**---------------------------------------
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*/
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if ((oldval1 & CONF1_ENABLE) == 0) {
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if ((oldval1 & CONF1_ENABLE_MSK) == 0) {
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pci_mechanism = 1;
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pci_maxdevice = 32;
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