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Use dcbz instead of word stores for page zeroing, providing a factor of

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3-4 speedup.
This commit is contained in:
Nathan Whitehorn 2010-02-24 00:55:55 +00:00
parent 83c01b8cf6
commit 9b3829abc7
1 changed files with 21 additions and 9 deletions
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30
sys/powerpc/aim/mmu_oea64.c
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@ -1074,15 +1074,6 @@ moea64_change_wiring(mmu_t mmu, pmap_t pm, vm_offset_t va, boolean_t wired)
PMAP_UNLOCK(pm);
}
/*
* Zero a page of physical memory by temporarily mapping it into the tlb.
*/
void
moea64_zero_page(mmu_t mmu, vm_page_t m)
{
moea64_zero_page_area(mmu,m,0,PAGE_SIZE);
}
/*
* This goes through and sets the physical address of our
* special scratch PTE to the PA we want to zero or copy. Because
@ -1147,6 +1138,27 @@ moea64_zero_page_area(mmu_t mmu, vm_page_t m, int off, int size)
mtx_unlock(&moea64_scratchpage_mtx);
}
/*
* Zero a page of physical memory by temporarily mapping it
*/
void
moea64_zero_page(mmu_t mmu, vm_page_t m)
{
vm_offset_t pa = VM_PAGE_TO_PHYS(m);
vm_offset_t off;
if (!moea64_initialized)
panic("moea64_zero_page: can't zero pa %#x", pa);
mtx_lock(&moea64_scratchpage_mtx);
moea64_set_scratchpage_pa(0,pa);
for (off = 0; off < PAGE_SIZE; off += cacheline_size)
__asm __volatile("dcbz 0,%0" ::
"r"(moea64_scratchpage_va[0] + off));
mtx_unlock(&moea64_scratchpage_mtx);
}
void
moea64_zero_page_idle(mmu_t mmu, vm_page_t m)
{