Add support for the LSI-Logic Fusion/MP architecture.
This is an architecture that present a thing message passing interface to the OS. You can query as to how many ports and what kind are attached and enable them and so on. A less grand view is that this is just another way to package SCSI (SPI or FC) and FC-IP into a one-driver interface set. This driver support the following hardware: LSI FC909: Single channel, 1Gbps, Fibre Channel (FC-SCSI only) LSI FC929: Dual Channel, 1-2Gbps, Fibre Channel (FC-SCSI only) LSI 53c1020: Single Channel, Ultra4 (320M) (Untested) LSI 53c1030: Dual Channel, Ultra4 (320M) Currently it's in fair shape, but expect a lot of changes over the next few weeks as it stabilizes. Credits: The driver is mostly from some folks from Jeff Roberson's company- I've been slowly migrating it to broader support that I it came to me as. The hardware used in developing support came from: FC909: LSI-Logic, Advansys (now Connetix) FC929: LSI-Logic 53c1030: Antares Microsystems (they make a very fine board!) MFC after: 3 weeks
This commit is contained in:
Matt Jacob
parent
31f48889ad
commit
9b63136347
@ -95,6 +95,7 @@ device atapist # ATAPI tape drives
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# SCSI Controllers
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device ahc # AHA2940 and onboard AIC7xxx devices
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device isp # Qlogic family
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device mpt # LSI-Logic MPT-Fusion
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#device ncr # NCR/Symbios Logic
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device sym # NCR/Symbios Logic (newer chipsets + those of `ncr')
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@ -86,6 +86,7 @@ device ahc # AHA2940 and onboard AIC7xxx devices
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device ahd # AHA39320 and onboard AIC79xx devices
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device amd # AMD 53C974 (Tekram DC-390(T))
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device isp # Qlogic family
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device mpt # LSI-Logic MPT-Fusion
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#device ncr # NCR/Symbios Logic
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device sym # NCR/Symbios Logic (newer chipsets + those of `ncr')
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@ -472,6 +472,10 @@ dev/mlx/mlx.c optional mlx
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dev/mlx/mlx_disk.c optional mlx
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dev/mlx/mlx_pci.c optional mlx
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dev/mly/mly.c optional mly
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dev/mpt/mpt.c optional mpt
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dev/mpt/mpt_debug.c optional mpt
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dev/mpt/mpt_freebsd.c optional mpt
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dev/mpt/mpt_pci.c optional mpt
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dev/my/if_my.c optional my
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dev/musycc/musycc.c optional musycc
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dev/nge/if_nge.c optional nge
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90
sys/dev/mpt/mpilib/fc_log.h
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90
sys/dev/mpt/mpilib/fc_log.h
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@ -0,0 +1,90 @@
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/* $FreeBSD$ */
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/*
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* Copyright (c) 2000-2001 LSI Logic Corporation. All rights reserved.
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*
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* NAME: fc_log.h
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* SUMMARY: MPI IocLogInfo definitions for the SYMFC9xx chips
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* DESCRIPTION: Contains the enumerated list of values that may be returned
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* in the IOCLogInfo field of a MPI Default Reply Message.
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*
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* CREATION DATE: 6/02/2000
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* ID: $Id: fc_log.h,v 4.6 2001/07/26 14:41:33 sschremm Exp $
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*/
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/*
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* MpiIocLogInfo_t enum
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*
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* These 32 bit values are used in the IOCLogInfo field of the MPI reply
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* messages.
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* The value is 0xabcccccc where
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* a = The type of log info as per the MPI spec. Since these codes are
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* all for Fibre Channel this value will always be 2.
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* b = Specifies a subclass of the firmware where
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* 0 = FCP Initiator
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* 1 = FCP Target
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* 2 = LAN
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* 3 = MPI Message Layer
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* 4 = FC Link
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* 5 = Context Manager
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* 6 = Invalid Field Offset
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* 7 = State Change Info
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* all others are reserved for future use
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* c = A specific value within the subclass.
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*
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* NOTE: Any new values should be added to the end of each subclass so that the
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* codes remain consistent across firmware releases.
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*/
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typedef enum _MpiIocLogInfoFc
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{
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MPI_IOCLOGINFO_FC_INIT_BASE = 0x20000000,
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MPI_IOCLOGINFO_FC_INIT_ERROR_OUT_OF_ORDER_FRAME = 0x20000001, /* received an out of order frame - unsupported */
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MPI_IOCLOGINFO_FC_INIT_ERROR_BAD_START_OF_FRAME = 0x20000002, /* Bad Rx Frame, bad start of frame primative */
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MPI_IOCLOGINFO_FC_INIT_ERROR_BAD_END_OF_FRAME = 0x20000003, /* Bad Rx Frame, bad end of frame primative */
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MPI_IOCLOGINFO_FC_INIT_ERROR_OVER_RUN = 0x20000004, /* Bad Rx Frame, overrun */
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MPI_IOCLOGINFO_FC_INIT_ERROR_RX_OTHER = 0x20000005, /* Other errors caught by IOC which require retries */
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MPI_IOCLOGINFO_FC_INIT_ERROR_SUBPROC_DEAD = 0x20000006, /* Main processor could not initialize sub-processor */
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MPI_IOCLOGINFO_FC_INIT_ERROR_RX_OVERRUN = 0x20000007, /* Scatter Gather overrun */
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MPI_IOCLOGINFO_FC_INIT_ERROR_RX_BAD_STATUS = 0x20000008, /* Receiver detected context mismatch via invalid header */
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MPI_IOCLOGINFO_FC_INIT_ERROR_RX_UNEXPECTED_FRAME= 0x20000009, /* CtxMgr detected unsupported frame type */
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MPI_IOCLOGINFO_FC_INIT_ERROR_LINK_FAILURE = 0x2000000A, /* Link failure occurred */
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MPI_IOCLOGINFO_FC_INIT_ERROR_TX_TIMEOUT = 0x2000000B, /* Transmitter timeout error */
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MPI_IOCLOGINFO_FC_TARGET_BASE = 0x21000000,
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MPI_IOCLOGINFO_FC_TARGET_NO_PDISC = 0x21000001, /* not sent because we are waiting for a PDISC from the initiator */
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MPI_IOCLOGINFO_FC_TARGET_NO_LOGIN = 0x21000002, /* not sent because we are not logged in to the remote node */
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MPI_IOCLOGINFO_FC_TARGET_DOAR_KILLED_BY_LIP = 0x21000003, /* Data Out, Auto Response, not sent due to a LIP */
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MPI_IOCLOGINFO_FC_TARGET_DIAR_KILLED_BY_LIP = 0x21000004, /* Data In, Auto Response, not sent due to a LIP */
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MPI_IOCLOGINFO_FC_TARGET_DIAR_MISSING_DATA = 0x21000005, /* Data In, Auto Response, missing data frames */
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MPI_IOCLOGINFO_FC_TARGET_DONR_KILLED_BY_LIP = 0x21000006, /* Data Out, No Response, not sent due to a LIP */
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MPI_IOCLOGINFO_FC_TARGET_WRSP_KILLED_BY_LIP = 0x21000007, /* Auto-response after a write not sent due to a LIP */
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MPI_IOCLOGINFO_FC_TARGET_DINR_KILLED_BY_LIP = 0x21000008, /* Data In, No Response, not completed due to a LIP */
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MPI_IOCLOGINFO_FC_TARGET_DINR_MISSING_DATA = 0x21000009, /* Data In, No Response, missing data frames */
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MPI_IOCLOGINFO_FC_TARGET_MRSP_KILLED_BY_LIP = 0x2100000a, /* Manual Response not sent due to a LIP */
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MPI_IOCLOGINFO_FC_TARGET_NO_CLASS_3 = 0x2100000b, /* not sent because remote node does not support Class 3 */
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MPI_IOCLOGINFO_FC_TARGET_LOGIN_NOT_VALID = 0x2100000c, /* not sent because login to remote node not validated */
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MPI_IOCLOGINFO_FC_TARGET_FROM_OUTBOUND = 0x2100000e, /* cleared from the outbound queue after a logout */
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MPI_IOCLOGINFO_FC_TARGET_WAITING_FOR_DATA_IN = 0x2100000f, /* cleared waiting for data after a logout */
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MPI_IOCLOGINFO_FC_LAN_BASE = 0x22000000,
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MPI_IOCLOGINFO_FC_LAN_TRANS_SGL_MISSING = 0x22000001, /* Transaction Context Sgl Missing */
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MPI_IOCLOGINFO_FC_LAN_TRANS_WRONG_PLACE = 0x22000002, /* Transaction Context found before an EOB */
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MPI_IOCLOGINFO_FC_LAN_TRANS_RES_BITS_SET = 0x22000003, /* Transaction Context value has reserved bits set */
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MPI_IOCLOGINFO_FC_LAN_WRONG_SGL_FLAG = 0x22000004, /* Invalid SGL Flags */
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MPI_IOCLOGINFO_FC_MSG_BASE = 0x23000000,
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MPI_IOCLOGINFO_FC_LINK_BASE = 0x24000000,
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MPI_IOCLOGINFO_FC_LINK_LOOP_INIT_TIMEOUT = 0x24000001, /* Loop initialization timed out */
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MPI_IOCLOGINFO_FC_LINK_ALREADY_INITIALIZED = 0x24000002, /* Another system controller already initialized the loop */
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MPI_IOCLOGINFO_FC_LINK_LINK_NOT_ESTABLISHED = 0x24000003, /* Not synchronized to signal or still negotiating (possible cable problem) */
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MPI_IOCLOGINFO_FC_LINK_CRC_ERROR = 0x24000004, /* CRC check detected error on received frame */
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MPI_IOCLOGINFO_FC_CTX_BASE = 0x25000000,
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MPI_IOCLOGINFO_FC_INVALID_FIELD_BYTE_OFFSET = 0x26000000, /* The lower 24 bits give the byte offset of the field in the request message that is invalid */
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MPI_IOCLOGINFO_FC_INVALID_FIELD_MAX_OFFSET = 0x26ffffff,
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MPI_IOCLOGINFO_FC_STATE_CHANGE = 0x27000000 /* The lower 24 bits give additional information concerning state change */
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} MpiIocLogInfoFc_t;
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656
sys/dev/mpt/mpilib/mpi.h
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656
sys/dev/mpt/mpilib/mpi.h
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@ -0,0 +1,656 @@
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/* $FreeBSD$ */
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/*
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* Copyright (c) 2000-2001 LSI Logic Corporation.
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*
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*
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* Name: MPI.H
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* Title: MPI Message independent structures and definitions
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* Creation Date: July 27, 2000
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*
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* MPI Version: 01.02.03
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*
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* Version History
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* ---------------
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*
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* Date Version Description
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* -------- -------- ------------------------------------------------------
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* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
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* 05-24-00 00.10.02 Added MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH definition.
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* 06-06-00 01.00.01 Update MPI_VERSION_MAJOR and MPI_VERSION_MINOR.
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* 06-22-00 01.00.02 Added MPI_IOCSTATUS_LAN_ definitions.
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* Removed LAN_SUSPEND function definition.
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* Added MPI_MSGFLAGS_CONTINUATION_REPLY definition.
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* 06-30-00 01.00.03 Added MPI_CONTEXT_REPLY_TYPE_LAN definition.
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* Added MPI_GET/SET_CONTEXT_REPLY_TYPE macros.
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* 07-27-00 01.00.04 Added MPI_FAULT_ definitions.
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* Removed MPI_IOCSTATUS_MSG/DATA_XFER_ERROR definitions.
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* Added MPI_IOCSTATUS_INTERNAL_ERROR definition.
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* Added MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH.
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* 11-02-00 01.01.01 Original release for post 1.0 work.
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* 12-04-00 01.01.02 Added new function codes.
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* 01-09-01 01.01.03 Added more definitions to the system interface section
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* Added MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT.
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* 01-25-01 01.01.04 Changed MPI_VERSION_MINOR from 0x00 to 0x01.
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* 02-20-01 01.01.05 Started using MPI_POINTER.
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* Fixed value for MPI_DIAG_RW_ENABLE.
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* Added defines for MPI_DIAG_PREVENT_IOC_BOOT and
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* MPI_DIAG_CLEAR_FLASH_BAD_SIG.
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* Obsoleted MPI_IOCSTATUS_TARGET_FC_ defines.
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* 02-27-01 01.01.06 Removed MPI_HOST_INDEX_REGISTER define.
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* Added function codes for RAID.
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* 04-09-01 01.01.07 Added alternate define for MPI_DOORBELL_ACTIVE,
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* MPI_DOORBELL_USED, to better match the spec.
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* 08-08-01 01.02.01 Original release for v1.2 work.
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* Changed MPI_VERSION_MINOR from 0x01 to 0x02.
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* Added define MPI_FUNCTION_TOOLBOX.
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* 09-28-01 01.02.02 New function code MPI_SCSI_ENCLOSURE_PROCESSOR.
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* 11-01-01 01.02.03 Changed name to MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR.
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* --------------------------------------------------------------------------
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*/
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#ifndef MPI_H
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#define MPI_H
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/*****************************************************************************
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*
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* M P I V e r s i o n D e f i n i t i o n s
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*
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*****************************************************************************/
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#define MPI_VERSION_MAJOR (0x01)
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#define MPI_VERSION_MINOR (0x02)
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#define MPI_VERSION ((MPI_VERSION_MAJOR << 8) | MPI_VERSION_MINOR)
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/* Note: The major versions of 0xe0 through 0xff are reserved */
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/*****************************************************************************
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*
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* I O C S t a t e D e f i n i t i o n s
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*
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*****************************************************************************/
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#define MPI_IOC_STATE_RESET (0x00000000)
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#define MPI_IOC_STATE_READY (0x10000000)
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#define MPI_IOC_STATE_OPERATIONAL (0x20000000)
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#define MPI_IOC_STATE_FAULT (0x40000000)
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#define MPI_IOC_STATE_MASK (0xF0000000)
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#define MPI_IOC_STATE_SHIFT (28)
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/* Fault state codes (product independent range 0x8000-0xFFFF) */
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#define MPI_FAULT_REQUEST_MESSAGE_PCI_PARITY_ERROR (0x8111)
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#define MPI_FAULT_REQUEST_MESSAGE_PCI_BUS_FAULT (0x8112)
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#define MPI_FAULT_REPLY_MESSAGE_PCI_PARITY_ERROR (0x8113)
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#define MPI_FAULT_REPLY_MESSAGE_PCI_BUS_FAULT (0x8114)
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#define MPI_FAULT_DATA_SEND_PCI_PARITY_ERROR (0x8115)
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#define MPI_FAULT_DATA_SEND_PCI_BUS_FAULT (0x8116)
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#define MPI_FAULT_DATA_RECEIVE_PCI_PARITY_ERROR (0x8117)
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#define MPI_FAULT_DATA_RECEIVE_PCI_BUS_FAULT (0x8118)
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/*****************************************************************************
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*
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* P C I S y s t e m I n t e r f a c e R e g i s t e r s
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*
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*****************************************************************************/
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/* S y s t e m D o o r b e l l */
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#define MPI_DOORBELL_OFFSET (0x00000000)
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#define MPI_DOORBELL_ACTIVE (0x08000000) /* DoorbellUsed */
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#define MPI_DOORBELL_USED (MPI_DOORBELL_ACTIVE)
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#define MPI_DOORBELL_ACTIVE_SHIFT (27)
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#define MPI_DOORBELL_WHO_INIT_MASK (0x07000000)
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#define MPI_DOORBELL_WHO_INIT_SHIFT (24)
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#define MPI_DOORBELL_FUNCTION_MASK (0xFF000000)
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#define MPI_DOORBELL_FUNCTION_SHIFT (24)
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#define MPI_DOORBELL_ADD_DWORDS_MASK (0x00FF0000)
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#define MPI_DOORBELL_ADD_DWORDS_SHIFT (16)
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#define MPI_DOORBELL_DATA_MASK (0x0000FFFF)
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#define MPI_WRITE_SEQUENCE_OFFSET (0x00000004)
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#define MPI_WRSEQ_KEY_VALUE_MASK (0x0000000F)
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#define MPI_WRSEQ_1ST_KEY_VALUE (0x04)
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#define MPI_WRSEQ_2ND_KEY_VALUE (0x0B)
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#define MPI_WRSEQ_3RD_KEY_VALUE (0x02)
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#define MPI_WRSEQ_4TH_KEY_VALUE (0x07)
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#define MPI_WRSEQ_5TH_KEY_VALUE (0x0D)
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#define MPI_DIAGNOSTIC_OFFSET (0x00000008)
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#define MPI_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400)
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#define MPI_DIAG_PREVENT_IOC_BOOT (0x00000200)
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#define MPI_DIAG_DRWE (0x00000080)
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#define MPI_DIAG_FLASH_BAD_SIG (0x00000040)
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#define MPI_DIAG_RESET_HISTORY (0x00000020)
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#define MPI_DIAG_RW_ENABLE (0x00000010)
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#define MPI_DIAG_RESET_ADAPTER (0x00000004)
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#define MPI_DIAG_DISABLE_ARM (0x00000002)
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#define MPI_DIAG_MEM_ENABLE (0x00000001)
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#define MPI_TEST_BASE_ADDRESS_OFFSET (0x0000000C)
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#define MPI_DIAG_RW_DATA_OFFSET (0x00000010)
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#define MPI_DIAG_RW_ADDRESS_OFFSET (0x00000014)
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#define MPI_HOST_INTERRUPT_STATUS_OFFSET (0x00000030)
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#define MPI_HIS_IOP_DOORBELL_STATUS (0x80000000)
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#define MPI_HIS_REPLY_MESSAGE_INTERRUPT (0x00000008)
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#define MPI_HIS_DOORBELL_INTERRUPT (0x00000001)
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#define MPI_HOST_INTERRUPT_MASK_OFFSET (0x00000034)
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#define MPI_HIM_RIM (0x00000008)
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#define MPI_HIM_DIM (0x00000001)
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#define MPI_REQUEST_QUEUE_OFFSET (0x00000040)
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#define MPI_REQUEST_POST_FIFO_OFFSET (0x00000040)
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#define MPI_REPLY_QUEUE_OFFSET (0x00000044)
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#define MPI_REPLY_POST_FIFO_OFFSET (0x00000044)
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#define MPI_REPLY_FREE_FIFO_OFFSET (0x00000044)
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/*****************************************************************************
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*
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* M e s s a g e F r a m e D e s c r i p t o r s
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*
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*****************************************************************************/
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#define MPI_REQ_MF_DESCRIPTOR_NB_MASK (0x00000003)
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#define MPI_REQ_MF_DESCRIPTOR_F_BIT (0x00000004)
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#define MPI_REQ_MF_DESCRIPTOR_ADDRESS_MASK (0xFFFFFFF8)
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#define MPI_ADDRESS_REPLY_A_BIT (0x80000000)
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#define MPI_ADDRESS_REPLY_ADDRESS_MASK (0x7FFFFFFF)
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#define MPI_CONTEXT_REPLY_A_BIT (0x80000000)
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#define MPI_CONTEXT_REPLY_TYPE_MASK (0x60000000)
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#define MPI_CONTEXT_REPLY_TYPE_SCSI_INIT (0x00)
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#define MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET (0x01)
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#define MPI_CONTEXT_REPLY_TYPE_LAN (0x02)
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#define MPI_CONTEXT_REPLY_TYPE_SHIFT (29)
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#define MPI_CONTEXT_REPLY_CONTEXT_MASK (0x1FFFFFFF)
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/****************************************************************************/
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/* Context Reply macros */
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/****************************************************************************/
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#define MPI_GET_CONTEXT_REPLY_TYPE(x) (((x) & MPI_CONTEXT_REPLY_TYPE_MASK) \
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>> MPI_CONTEXT_REPLY_TYPE_SHIFT)
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#define MPI_SET_CONTEXT_REPLY_TYPE(x, typ) \
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((x) = ((x) & ~MPI_CONTEXT_REPLY_TYPE_MASK) | \
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(((typ) << MPI_CONTEXT_REPLY_TYPE_SHIFT) & \
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MPI_CONTEXT_REPLY_TYPE_MASK))
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/*****************************************************************************
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*
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* M e s s a g e F u n c t i o n s
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* 0x80 -> 0x8F reserved for private message use per product
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*
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*
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*****************************************************************************/
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#define MPI_FUNCTION_SCSI_IO_REQUEST (0x00)
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#define MPI_FUNCTION_SCSI_TASK_MGMT (0x01)
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#define MPI_FUNCTION_IOC_INIT (0x02)
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#define MPI_FUNCTION_IOC_FACTS (0x03)
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#define MPI_FUNCTION_CONFIG (0x04)
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#define MPI_FUNCTION_PORT_FACTS (0x05)
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#define MPI_FUNCTION_PORT_ENABLE (0x06)
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#define MPI_FUNCTION_EVENT_NOTIFICATION (0x07)
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#define MPI_FUNCTION_EVENT_ACK (0x08)
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#define MPI_FUNCTION_FW_DOWNLOAD (0x09)
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#define MPI_FUNCTION_TARGET_CMD_BUFFER_POST (0x0A)
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#define MPI_FUNCTION_TARGET_ASSIST (0x0B)
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#define MPI_FUNCTION_TARGET_STATUS_SEND (0x0C)
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#define MPI_FUNCTION_TARGET_MODE_ABORT (0x0D)
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#define MPI_FUNCTION_TARGET_FC_BUF_POST_LINK_SRVC (0x0E) /* obsolete name */
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#define MPI_FUNCTION_TARGET_FC_RSP_LINK_SRVC (0x0F) /* obsolete name */
|
||||
#define MPI_FUNCTION_TARGET_FC_EX_SEND_LINK_SRVC (0x10) /* obsolete name */
|
||||
#define MPI_FUNCTION_TARGET_FC_ABORT (0x11) /* obsolete name */
|
||||
#define MPI_FUNCTION_FC_LINK_SRVC_BUF_POST (0x0E)
|
||||
#define MPI_FUNCTION_FC_LINK_SRVC_RSP (0x0F)
|
||||
#define MPI_FUNCTION_FC_EX_LINK_SRVC_SEND (0x10)
|
||||
#define MPI_FUNCTION_FC_ABORT (0x11)
|
||||
#define MPI_FUNCTION_FW_UPLOAD (0x12)
|
||||
#define MPI_FUNCTION_FC_COMMON_TRANSPORT_SEND (0x13)
|
||||
#define MPI_FUNCTION_FC_PRIMITIVE_SEND (0x14)
|
||||
|
||||
#define MPI_FUNCTION_RAID_ACTION (0x15)
|
||||
#define MPI_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16)
|
||||
|
||||
#define MPI_FUNCTION_TOOLBOX (0x17)
|
||||
|
||||
#define MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18)
|
||||
|
||||
#define MPI_FUNCTION_LAN_SEND (0x20)
|
||||
#define MPI_FUNCTION_LAN_RECEIVE (0x21)
|
||||
#define MPI_FUNCTION_LAN_RESET (0x22)
|
||||
|
||||
#define MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40)
|
||||
#define MPI_FUNCTION_IO_UNIT_RESET (0x41)
|
||||
#define MPI_FUNCTION_HANDSHAKE (0x42)
|
||||
#define MPI_FUNCTION_REPLY_FRAME_REMOVAL (0x43)
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
*
|
||||
* S c a t t e r G a t h e r E l e m e n t s
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/****************************************************************************/
|
||||
/* Simple element structures */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _SGE_SIMPLE32
|
||||
{
|
||||
U32 FlagsLength;
|
||||
U32 Address;
|
||||
} SGE_SIMPLE32, MPI_POINTER PTR_SGE_SIMPLE32,
|
||||
SGESimple32_t, MPI_POINTER pSGESimple32_t;
|
||||
|
||||
typedef struct _SGE_SIMPLE64
|
||||
{
|
||||
U32 FlagsLength;
|
||||
U64 Address;
|
||||
} SGE_SIMPLE64, MPI_POINTER PTR_SGE_SIMPLE64,
|
||||
SGESimple64_t, MPI_POINTER pSGESimple64_t;
|
||||
|
||||
typedef struct _SGE_SIMPLE_UNION
|
||||
{
|
||||
U32 FlagsLength;
|
||||
union
|
||||
{
|
||||
U32 Address32;
|
||||
U64 Address64;
|
||||
} _u;
|
||||
} SGESimpleUnion_t, MPI_POINTER pSGESimpleUnion_t,
|
||||
SGE_SIMPLE_UNION, MPI_POINTER PTR_SGE_SIMPLE_UNION;
|
||||
|
||||
/****************************************************************************/
|
||||
/* Chain element structures */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _SGE_CHAIN32
|
||||
{
|
||||
U16 Length;
|
||||
U8 NextChainOffset;
|
||||
U8 Flags;
|
||||
U32 Address;
|
||||
} SGE_CHAIN32, MPI_POINTER PTR_SGE_CHAIN32,
|
||||
SGEChain32_t, MPI_POINTER pSGEChain32_t;
|
||||
|
||||
typedef struct _SGE_CHAIN64
|
||||
{
|
||||
U16 Length;
|
||||
U8 NextChainOffset;
|
||||
U8 Flags;
|
||||
U64 Address;
|
||||
} SGE_CHAIN64, MPI_POINTER PTR_SGE_CHAIN64,
|
||||
SGEChain64_t, MPI_POINTER pSGEChain64_t;
|
||||
|
||||
typedef struct _SGE_CHAIN_UNION
|
||||
{
|
||||
U16 Length;
|
||||
U8 NextChainOffset;
|
||||
U8 Flags;
|
||||
union
|
||||
{
|
||||
U32 Address32;
|
||||
U64 Address64;
|
||||
} _u;
|
||||
} SGE_CHAIN_UNION, MPI_POINTER PTR_SGE_CHAIN_UNION,
|
||||
SGEChainUnion_t, MPI_POINTER pSGEChainUnion_t;
|
||||
|
||||
/****************************************************************************/
|
||||
/* Transaction Context element */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _SGE_TRANSACTION32
|
||||
{
|
||||
U8 Reserved;
|
||||
U8 ContextSize;
|
||||
U8 DetailsLength;
|
||||
U8 Flags;
|
||||
U32 TransactionContext[1];
|
||||
U32 TransactionDetails[1];
|
||||
} SGE_TRANSACTION32, MPI_POINTER PTR_SGE_TRANSACTION32,
|
||||
SGETransaction32_t, MPI_POINTER pSGETransaction32_t;
|
||||
|
||||
typedef struct _SGE_TRANSACTION64
|
||||
{
|
||||
U8 Reserved;
|
||||
U8 ContextSize;
|
||||
U8 DetailsLength;
|
||||
U8 Flags;
|
||||
U32 TransactionContext[2];
|
||||
U32 TransactionDetails[1];
|
||||
} SGE_TRANSACTION64, MPI_POINTER PTR_SGE_TRANSACTION64,
|
||||
SGETransaction64_t, MPI_POINTER pSGETransaction64_t;
|
||||
|
||||
typedef struct _SGE_TRANSACTION96
|
||||
{
|
||||
U8 Reserved;
|
||||
U8 ContextSize;
|
||||
U8 DetailsLength;
|
||||
U8 Flags;
|
||||
U32 TransactionContext[3];
|
||||
U32 TransactionDetails[1];
|
||||
} SGE_TRANSACTION96, MPI_POINTER PTR_SGE_TRANSACTION96,
|
||||
SGETransaction96_t, MPI_POINTER pSGETransaction96_t;
|
||||
|
||||
typedef struct _SGE_TRANSACTION128
|
||||
{
|
||||
U8 Reserved;
|
||||
U8 ContextSize;
|
||||
U8 DetailsLength;
|
||||
U8 Flags;
|
||||
U32 TransactionContext[4];
|
||||
U32 TransactionDetails[1];
|
||||
} SGE_TRANSACTION128, MPI_POINTER PTR_SGE_TRANSACTION128,
|
||||
SGETransaction_t128, MPI_POINTER pSGETransaction_t128;
|
||||
|
||||
typedef struct _SGE_TRANSACTION_UNION
|
||||
{
|
||||
U8 Reserved;
|
||||
U8 ContextSize;
|
||||
U8 DetailsLength;
|
||||
U8 Flags;
|
||||
union
|
||||
{
|
||||
U32 TransactionContext32[1];
|
||||
U32 TransactionContext64[2];
|
||||
U32 TransactionContext96[3];
|
||||
U32 TransactionContext128[4];
|
||||
} _u;
|
||||
U32 TransactionDetails[1];
|
||||
} SGE_TRANSACTION_UNION, MPI_POINTER PTR_SGE_TRANSACTION_UNION,
|
||||
SGETransactionUnion_t, MPI_POINTER pSGETransactionUnion_t;
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* SGE IO types union for IO SGL's */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _SGE_IO_UNION
|
||||
{
|
||||
union
|
||||
{
|
||||
SGE_SIMPLE_UNION Simple;
|
||||
SGE_CHAIN_UNION Chain;
|
||||
} _u;
|
||||
} SGE_IO_UNION, MPI_POINTER PTR_SGE_IO_UNION,
|
||||
SGEIOUnion_t, MPI_POINTER pSGEIOUnion_t;
|
||||
|
||||
/****************************************************************************/
|
||||
/* SGE union for SGL's with Simple and Transaction elements */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _SGE_TRANS_SIMPLE_UNION
|
||||
{
|
||||
union
|
||||
{
|
||||
SGE_SIMPLE_UNION Simple;
|
||||
SGE_TRANSACTION_UNION Transaction;
|
||||
} _u;
|
||||
} SGE_TRANS_SIMPLE_UNION, MPI_POINTER PTR_SGE_TRANS_SIMPLE_UNION,
|
||||
SGETransSimpleUnion_t, MPI_POINTER pSGETransSimpleUnion_t;
|
||||
|
||||
/****************************************************************************/
|
||||
/* All SGE types union */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _SGE_MPI_UNION
|
||||
{
|
||||
union
|
||||
{
|
||||
SGE_SIMPLE_UNION Simple;
|
||||
SGE_CHAIN_UNION Chain;
|
||||
SGE_TRANSACTION_UNION Transaction;
|
||||
} _u;
|
||||
} SGE_MPI_UNION, MPI_POINTER PTR_SGE_MPI_UNION,
|
||||
MPI_SGE_UNION_t, MPI_POINTER pMPI_SGE_UNION_t,
|
||||
SGEAllUnion_t, MPI_POINTER pSGEAllUnion_t;
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* SGE field definition and masks */
|
||||
/****************************************************************************/
|
||||
|
||||
/* Flags field bit definitions */
|
||||
|
||||
#define MPI_SGE_FLAGS_LAST_ELEMENT (0x80)
|
||||
#define MPI_SGE_FLAGS_END_OF_BUFFER (0x40)
|
||||
#define MPI_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30)
|
||||
#define MPI_SGE_FLAGS_LOCAL_ADDRESS (0x08)
|
||||
#define MPI_SGE_FLAGS_DIRECTION (0x04)
|
||||
#define MPI_SGE_FLAGS_ADDRESS_SIZE (0x02)
|
||||
#define MPI_SGE_FLAGS_END_OF_LIST (0x01)
|
||||
|
||||
#define MPI_SGE_FLAGS_SHIFT (24)
|
||||
|
||||
#define MPI_SGE_LENGTH_MASK (0x00FFFFFF)
|
||||
#define MPI_SGE_CHAIN_LENGTH_MASK (0x0000FFFF)
|
||||
|
||||
/* Element Type */
|
||||
|
||||
#define MPI_SGE_FLAGS_TRANSACTION_ELEMENT (0x00)
|
||||
#define MPI_SGE_FLAGS_SIMPLE_ELEMENT (0x10)
|
||||
#define MPI_SGE_FLAGS_CHAIN_ELEMENT (0x30)
|
||||
#define MPI_SGE_FLAGS_ELEMENT_MASK (0x30)
|
||||
|
||||
/* Address location */
|
||||
|
||||
#define MPI_SGE_FLAGS_SYSTEM_ADDRESS (0x00)
|
||||
|
||||
/* Direction */
|
||||
|
||||
#define MPI_SGE_FLAGS_IOC_TO_HOST (0x00)
|
||||
#define MPI_SGE_FLAGS_HOST_TO_IOC (0x04)
|
||||
|
||||
/* Address Size */
|
||||
|
||||
#define MPI_SGE_FLAGS_32_BIT_ADDRESSING (0x00)
|
||||
#define MPI_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
|
||||
|
||||
/* Context Size */
|
||||
|
||||
#define MPI_SGE_FLAGS_32_BIT_CONTEXT (0x00)
|
||||
#define MPI_SGE_FLAGS_64_BIT_CONTEXT (0x02)
|
||||
#define MPI_SGE_FLAGS_96_BIT_CONTEXT (0x04)
|
||||
#define MPI_SGE_FLAGS_128_BIT_CONTEXT (0x06)
|
||||
|
||||
#define MPI_SGE_CHAIN_OFFSET_MASK (0x00FF0000)
|
||||
#define MPI_SGE_CHAIN_OFFSET_SHIFT (16)
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* SGE operation Macros */
|
||||
/****************************************************************************/
|
||||
|
||||
/* SIMPLE FlagsLength manipulations... */
|
||||
#define MPI_SGE_SET_FLAGS(f) ((U32)(f) << MPI_SGE_FLAGS_SHIFT)
|
||||
#define MPI_SGE_GET_FLAGS(fl) (((fl) & ~MPI_SGE_LENGTH_MASK) >> MPI_SGE_FLAGS_SHIFT)
|
||||
#define MPI_SGE_LENGTH(fl) ((fl) & MPI_SGE_LENGTH_MASK)
|
||||
#define MPI_SGE_CHAIN_LENGTH(fl) ((fl) & MPI_SGE_CHAIN_LENGTH_MASK)
|
||||
|
||||
#define MPI_SGE_SET_FLAGS_LENGTH(f,l) (MPI_SGE_SET_FLAGS(f) | MPI_SGE_LENGTH(l))
|
||||
|
||||
#define MPI_pSGE_GET_FLAGS(psg) MPI_SGE_GET_FLAGS((psg)->FlagsLength)
|
||||
#define MPI_pSGE_GET_LENGTH(psg) MPI_SGE_LENGTH((psg)->FlagsLength)
|
||||
#define MPI_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI_SGE_SET_FLAGS_LENGTH(f,l)
|
||||
/* CAUTION - The following are READ-MODIFY-WRITE! */
|
||||
#define MPI_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI_SGE_SET_FLAGS(f)
|
||||
#define MPI_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI_SGE_LENGTH(l)
|
||||
|
||||
#define MPI_GET_CHAIN_OFFSET(x) ((x&MPI_SGE_CHAIN_OFFSET_MASK)>>MPI_SGE_CHAIN_OFFSET_SHIFT)
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
*
|
||||
* S t a n d a r d M e s s a g e S t r u c t u r e s
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/****************************************************************************/
|
||||
/* Standard message request header for all request messages */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_REQUEST_HEADER
|
||||
{
|
||||
U8 Reserved[2]; /* function specific */
|
||||
U8 ChainOffset;
|
||||
U8 Function;
|
||||
U8 Reserved1[3]; /* function specific */
|
||||
U8 MsgFlags;
|
||||
U32 MsgContext;
|
||||
} MSG_REQUEST_HEADER, MPI_POINTER PTR_MSG_REQUEST_HEADER,
|
||||
MPIHeader_t, MPI_POINTER pMPIHeader_t;
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* Default Reply */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_DEFAULT_REPLY
|
||||
{
|
||||
U8 Reserved[2]; /* function specific */
|
||||
U8 MsgLength;
|
||||
U8 Function;
|
||||
U8 Reserved1[3]; /* function specific */
|
||||
U8 MsgFlags;
|
||||
U32 MsgContext;
|
||||
U8 Reserved2[2]; /* function specific */
|
||||
U16 IOCStatus;
|
||||
U32 IOCLogInfo;
|
||||
} MSG_DEFAULT_REPLY, MPI_POINTER PTR_MSG_DEFAULT_REPLY,
|
||||
MPIDefaultReply_t, MPI_POINTER pMPIDefaultReply_t;
|
||||
|
||||
|
||||
/* MsgFlags definition for all replies */
|
||||
|
||||
#define MPI_MSGFLAGS_CONTINUATION_REPLY (0x80)
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
*
|
||||
* I O C S t a t u s V a l u e s
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/****************************************************************************/
|
||||
/* Common IOCStatus values for all replies */
|
||||
/****************************************************************************/
|
||||
|
||||
#define MPI_IOCSTATUS_SUCCESS (0x0000)
|
||||
#define MPI_IOCSTATUS_INVALID_FUNCTION (0x0001)
|
||||
#define MPI_IOCSTATUS_BUSY (0x0002)
|
||||
#define MPI_IOCSTATUS_INVALID_SGL (0x0003)
|
||||
#define MPI_IOCSTATUS_INTERNAL_ERROR (0x0004)
|
||||
#define MPI_IOCSTATUS_RESERVED (0x0005)
|
||||
#define MPI_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006)
|
||||
#define MPI_IOCSTATUS_INVALID_FIELD (0x0007)
|
||||
#define MPI_IOCSTATUS_INVALID_STATE (0x0008)
|
||||
|
||||
/****************************************************************************/
|
||||
/* Config IOCStatus values */
|
||||
/****************************************************************************/
|
||||
|
||||
#define MPI_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
|
||||
#define MPI_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
|
||||
#define MPI_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
|
||||
#define MPI_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
|
||||
#define MPI_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
|
||||
#define MPI_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
|
||||
|
||||
/****************************************************************************/
|
||||
/* SCSIIO Reply (SPI & FCP) initiator values */
|
||||
/****************************************************************************/
|
||||
|
||||
#define MPI_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040)
|
||||
#define MPI_IOCSTATUS_SCSI_INVALID_BUS (0x0041)
|
||||
#define MPI_IOCSTATUS_SCSI_INVALID_TARGETID (0x0042)
|
||||
#define MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043)
|
||||
#define MPI_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044)
|
||||
#define MPI_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045)
|
||||
#define MPI_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046)
|
||||
#define MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047)
|
||||
#define MPI_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048)
|
||||
#define MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049)
|
||||
#define MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A)
|
||||
#define MPI_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B)
|
||||
#define MPI_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C)
|
||||
|
||||
/****************************************************************************/
|
||||
/* SCSI (SPI & FCP) target values */
|
||||
/****************************************************************************/
|
||||
|
||||
#define MPI_IOCSTATUS_TARGET_PRIORITY_IO (0x0060)
|
||||
#define MPI_IOCSTATUS_TARGET_INVALID_PORT (0x0061)
|
||||
#define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX (0x0062)
|
||||
#define MPI_IOCSTATUS_TARGET_ABORTED (0x0063)
|
||||
#define MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064)
|
||||
#define MPI_IOCSTATUS_TARGET_NO_CONNECTION (0x0065)
|
||||
#define MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
|
||||
#define MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT (0x006B)
|
||||
|
||||
/****************************************************************************/
|
||||
/* Additional FCP target values */
|
||||
/****************************************************************************/
|
||||
|
||||
#define MPI_IOCSTATUS_TARGET_FC_ABORTED (0x0066) /* obsolete */
|
||||
#define MPI_IOCSTATUS_TARGET_FC_RX_ID_INVALID (0x0067) /* obsolete */
|
||||
#define MPI_IOCSTATUS_TARGET_FC_DID_INVALID (0x0068) /* obsolete */
|
||||
#define MPI_IOCSTATUS_TARGET_FC_NODE_LOGGED_OUT (0x0069) /* obsolete */
|
||||
|
||||
/****************************************************************************/
|
||||
/* Fibre Channel Direct Access values */
|
||||
/****************************************************************************/
|
||||
|
||||
#define MPI_IOCSTATUS_FC_ABORTED (0x0066)
|
||||
#define MPI_IOCSTATUS_FC_RX_ID_INVALID (0x0067)
|
||||
#define MPI_IOCSTATUS_FC_DID_INVALID (0x0068)
|
||||
#define MPI_IOCSTATUS_FC_NODE_LOGGED_OUT (0x0069)
|
||||
|
||||
/****************************************************************************/
|
||||
/* LAN values */
|
||||
/****************************************************************************/
|
||||
|
||||
#define MPI_IOCSTATUS_LAN_DEVICE_NOT_FOUND (0x0080)
|
||||
#define MPI_IOCSTATUS_LAN_DEVICE_FAILURE (0x0081)
|
||||
#define MPI_IOCSTATUS_LAN_TRANSMIT_ERROR (0x0082)
|
||||
#define MPI_IOCSTATUS_LAN_TRANSMIT_ABORTED (0x0083)
|
||||
#define MPI_IOCSTATUS_LAN_RECEIVE_ERROR (0x0084)
|
||||
#define MPI_IOCSTATUS_LAN_RECEIVE_ABORTED (0x0085)
|
||||
#define MPI_IOCSTATUS_LAN_PARTIAL_PACKET (0x0086)
|
||||
#define MPI_IOCSTATUS_LAN_CANCELED (0x0087)
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* IOCStatus flag to indicate that log info is available */
|
||||
/****************************************************************************/
|
||||
|
||||
#define MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000)
|
||||
#define MPI_IOCSTATUS_MASK (0x7FFF)
|
||||
|
||||
/****************************************************************************/
|
||||
/* LogInfo Types */
|
||||
/****************************************************************************/
|
||||
|
||||
#define MPI_IOCLOGINFO_TYPE_MASK (0xF0000000)
|
||||
#define MPI_IOCLOGINFO_TYPE_NONE (0x0)
|
||||
#define MPI_IOCLOGINFO_TYPE_SCSI (0x1)
|
||||
#define MPI_IOCLOGINFO_TYPE_FC (0x2)
|
||||
#define MPI_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF)
|
||||
|
||||
|
||||
#endif
|
||||
1347
sys/dev/mpt/mpilib/mpi_cnfg.h
Normal file
1347
sys/dev/mpt/mpilib/mpi_cnfg.h
Normal file
File diff suppressed because it is too large
Load Diff
360
sys/dev/mpt/mpilib/mpi_fc.h
Normal file
360
sys/dev/mpt/mpilib/mpi_fc.h
Normal file
@ -0,0 +1,360 @@
|
||||
/* $FreeBSD$ */
|
||||
/*
|
||||
* Copyright (c) 2000-2001 LSI Logic Corporation.
|
||||
*
|
||||
*
|
||||
* Name: MPI_FC.H
|
||||
* Title: MPI Fibre Channel messages and structures
|
||||
* Creation Date: June 12, 2000
|
||||
*
|
||||
* MPI Version: 01.02.02
|
||||
*
|
||||
* Version History
|
||||
* ---------------
|
||||
*
|
||||
* Date Version Description
|
||||
* -------- -------- ------------------------------------------------------
|
||||
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
|
||||
* 06-06-00 01.00.01 Update version number for 1.0 release.
|
||||
* 06-12-00 01.00.02 Added _MSG_FC_ABORT_REPLY structure.
|
||||
* 11-02-00 01.01.01 Original release for post 1.0 work
|
||||
* 12-04-00 01.01.02 Added messages for Common Transport Send and
|
||||
* Primitive Send.
|
||||
* 01-09-01 01.01.03 Modifed some of the new flags to have an MPI prefix
|
||||
* and modified the FcPrimitiveSend flags.
|
||||
* 01-25-01 01.01.04 Move InitiatorIndex in LinkServiceRsp reply to a larger
|
||||
* field.
|
||||
* Added FC_ABORT_TYPE_CT_SEND_REQUEST and
|
||||
* FC_ABORT_TYPE_EXLINKSEND_REQUEST for FcAbort request.
|
||||
* Added MPI_FC_PRIM_SEND_FLAGS_STOP_SEND.
|
||||
* 02-20-01 01.01.05 Started using MPI_POINTER.
|
||||
* 03-27-01 01.01.06 Added Flags field to MSG_LINK_SERVICE_BUFFER_POST_REPLY
|
||||
* and defined MPI_LS_BUF_POST_REPLY_FLAG_NO_RSP_NEEDED.
|
||||
* Added MPI_FC_PRIM_SEND_FLAGS_RESET_LINK define.
|
||||
* Added structure offset comments.
|
||||
* 04-09-01 01.01.07 Added RspLength field to MSG_LINK_SERVICE_RSP_REQUEST.
|
||||
* 08-08-01 01.02.01 Original release for v1.2 work.
|
||||
* 09-28-01 01.02.02 Change name of reserved field in
|
||||
* MSG_LINK_SERVICE_RSP_REPLY.
|
||||
* --------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef MPI_FC_H
|
||||
#define MPI_FC_H
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
*
|
||||
* F C T a r g e t M o d e M e s s a g e s
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/****************************************************************************/
|
||||
/* Link Service Buffer Post messages */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_LINK_SERVICE_BUFFER_POST_REQUEST
|
||||
{
|
||||
U8 BufferPostFlags; /* 00h */
|
||||
U8 BufferCount; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved; /* 04h */
|
||||
U8 Reserved1; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
SGE_TRANS_SIMPLE_UNION SGL;
|
||||
} MSG_LINK_SERVICE_BUFFER_POST_REQUEST,
|
||||
MPI_POINTER PTR_MSG_LINK_SERVICE_BUFFER_POST_REQUEST,
|
||||
LinkServiceBufferPostRequest_t, MPI_POINTER pLinkServiceBufferPostRequest_t;
|
||||
|
||||
#define LINK_SERVICE_BUFFER_POST_FLAGS_PORT_MASK (0x01)
|
||||
|
||||
typedef struct _WWNFORMAT
|
||||
{
|
||||
U32 PortNameHigh; /* 00h */
|
||||
U32 PortNameLow; /* 04h */
|
||||
U32 NodeNameHigh; /* 08h */
|
||||
U32 NodeNameLow; /* 0Ch */
|
||||
} WWNFORMAT,
|
||||
WwnFormat_t;
|
||||
|
||||
/* Link Service Buffer Post Reply */
|
||||
typedef struct _MSG_LINK_SERVICE_BUFFER_POST_REPLY
|
||||
{
|
||||
U8 Flags; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved1; /* 04h */
|
||||
U8 PortNumber; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved2; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 TransferLength; /* 14h */
|
||||
U32 TransactionContext; /* 18h */
|
||||
U32 Rctl_Did; /* 1Ch */
|
||||
U32 Csctl_Sid; /* 20h */
|
||||
U32 Type_Fctl; /* 24h */
|
||||
U16 SeqCnt; /* 28h */
|
||||
U8 Dfctl; /* 2Ah */
|
||||
U8 SeqId; /* 2Bh */
|
||||
U16 Rxid; /* 2Ch */
|
||||
U16 Oxid; /* 2Eh */
|
||||
U32 Parameter; /* 30h */
|
||||
WWNFORMAT Wwn; /* 34h */
|
||||
} MSG_LINK_SERVICE_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_LINK_SERVICE_BUFFER_POST_REPLY,
|
||||
LinkServiceBufferPostReply_t, MPI_POINTER pLinkServiceBufferPostReply_t;
|
||||
|
||||
#define MPI_LS_BUF_POST_REPLY_FLAG_NO_RSP_NEEDED (0x80)
|
||||
|
||||
#define MPI_FC_DID_MASK (0x00FFFFFF)
|
||||
#define MPI_FC_DID_SHIFT (0)
|
||||
#define MPI_FC_RCTL_MASK (0xFF000000)
|
||||
#define MPI_FC_RCTL_SHIFT (24)
|
||||
#define MPI_FC_SID_MASK (0x00FFFFFF)
|
||||
#define MPI_FC_SID_SHIFT (0)
|
||||
#define MPI_FC_CSCTL_MASK (0xFF000000)
|
||||
#define MPI_FC_CSCTL_SHIFT (24)
|
||||
#define MPI_FC_FCTL_MASK (0x00FFFFFF)
|
||||
#define MPI_FC_FCTL_SHIFT (0)
|
||||
#define MPI_FC_TYPE_MASK (0xFF000000)
|
||||
#define MPI_FC_TYPE_SHIFT (24)
|
||||
|
||||
/* obsolete name for the above */
|
||||
#define FCP_TARGET_DID_MASK (0x00FFFFFF)
|
||||
#define FCP_TARGET_DID_SHIFT (0)
|
||||
#define FCP_TARGET_RCTL_MASK (0xFF000000)
|
||||
#define FCP_TARGET_RCTL_SHIFT (24)
|
||||
#define FCP_TARGET_SID_MASK (0x00FFFFFF)
|
||||
#define FCP_TARGET_SID_SHIFT (0)
|
||||
#define FCP_TARGET_CSCTL_MASK (0xFF000000)
|
||||
#define FCP_TARGET_CSCTL_SHIFT (24)
|
||||
#define FCP_TARGET_FCTL_MASK (0x00FFFFFF)
|
||||
#define FCP_TARGET_FCTL_SHIFT (0)
|
||||
#define FCP_TARGET_TYPE_MASK (0xFF000000)
|
||||
#define FCP_TARGET_TYPE_SHIFT (24)
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* Link Service Response messages */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_LINK_SERVICE_RSP_REQUEST
|
||||
{
|
||||
U8 RspFlags; /* 00h */
|
||||
U8 RspLength; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved1; /* 04h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U32 Rctl_Did; /* 0Ch */
|
||||
U32 Csctl_Sid; /* 10h */
|
||||
U32 Type_Fctl; /* 14h */
|
||||
U16 SeqCnt; /* 18h */
|
||||
U8 Dfctl; /* 1Ah */
|
||||
U8 SeqId; /* 1Bh */
|
||||
U16 Rxid; /* 1Ch */
|
||||
U16 Oxid; /* 1Eh */
|
||||
U32 Parameter; /* 20h */
|
||||
SGE_SIMPLE_UNION SGL; /* 24h */
|
||||
} MSG_LINK_SERVICE_RSP_REQUEST, MPI_POINTER PTR_MSG_LINK_SERVICE_RSP_REQUEST,
|
||||
LinkServiceRspRequest_t, MPI_POINTER pLinkServiceRspRequest_t;
|
||||
|
||||
#define LINK_SERVICE_RSP_FLAGS_IMMEDIATE (0x80)
|
||||
#define LINK_SERVICE_RSP_FLAGS_PORT_MASK (0x01)
|
||||
|
||||
|
||||
/* Link Service Response Reply */
|
||||
typedef struct _MSG_LINK_SERVICE_RSP_REPLY
|
||||
{
|
||||
U16 Reserved; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved1; /* 04h */
|
||||
U8 Reserved_0100_InitiatorIndex; /* 06h */ /* obsolete InitiatorIndex */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved3; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 InitiatorIndex; /* 14h */
|
||||
} MSG_LINK_SERVICE_RSP_REPLY, MPI_POINTER PTR_MSG_LINK_SERVICE_RSP_REPLY,
|
||||
LinkServiceRspReply_t, MPI_POINTER pLinkServiceRspReply_t;
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* Extended Link Service Send messages */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_EXLINK_SERVICE_SEND_REQUEST
|
||||
{
|
||||
U8 SendFlags; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U32 MsgFlags_Did; /* 04h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U32 ElsCommandCode; /* 0Ch */
|
||||
SGE_SIMPLE_UNION SGL; /* 10h */
|
||||
} MSG_EXLINK_SERVICE_SEND_REQUEST, MPI_POINTER PTR_MSG_EXLINK_SERVICE_SEND_REQUEST,
|
||||
ExLinkServiceSendRequest_t, MPI_POINTER pExLinkServiceSendRequest_t;
|
||||
|
||||
#define EX_LINK_SERVICE_SEND_DID_MASK (0x00FFFFFF)
|
||||
#define EX_LINK_SERVICE_SEND_DID_SHIFT (0)
|
||||
#define EX_LINK_SERVICE_SEND_MSGFLAGS_MASK (0xFF000000)
|
||||
#define EX_LINK_SERVICE_SEND_MSGFLAGS_SHIFT (24)
|
||||
|
||||
|
||||
/* Extended Link Service Send Reply */
|
||||
typedef struct _MSG_EXLINK_SERVICE_SEND_REPLY
|
||||
{
|
||||
U16 Reserved; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved1; /* 04h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved3; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 ResponseLength; /* 14h */
|
||||
} MSG_EXLINK_SERVICE_SEND_REPLY, MPI_POINTER PTR_MSG_EXLINK_SERVICE_SEND_REPLY,
|
||||
ExLinkServiceSendReply_t, MPI_POINTER pExLinkServiceSendReply_t;
|
||||
|
||||
/****************************************************************************/
|
||||
/* FC Abort messages */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_FC_ABORT_REQUEST
|
||||
{
|
||||
U8 AbortFlags; /* 00h */
|
||||
U8 AbortType; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved1; /* 04h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U32 TransactionContextToAbort; /* 0Ch */
|
||||
} MSG_FC_ABORT_REQUEST, MPI_POINTER PTR_MSG_FC_ABORT_REQUEST,
|
||||
FcAbortRequest_t, MPI_POINTER pFcAbortRequest_t;
|
||||
|
||||
#define FC_ABORT_FLAG_PORT_MASK (0x01)
|
||||
|
||||
#define FC_ABORT_TYPE_ALL_FC_BUFFERS (0x00)
|
||||
#define FC_ABORT_TYPE_EXACT_FC_BUFFER (0x01)
|
||||
#define FC_ABORT_TYPE_CT_SEND_REQUEST (0x02)
|
||||
#define FC_ABORT_TYPE_EXLINKSEND_REQUEST (0x03)
|
||||
|
||||
/* FC Abort Reply */
|
||||
typedef struct _MSG_FC_ABORT_REPLY
|
||||
{
|
||||
U16 Reserved; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved1; /* 04h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved3; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
} MSG_FC_ABORT_REPLY, MPI_POINTER PTR_MSG_FC_ABORT_REPLY,
|
||||
FcAbortReply_t, MPI_POINTER pFcAbortReply_t;
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* FC Common Transport Send messages */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_FC_COMMON_TRANSPORT_SEND_REQUEST
|
||||
{
|
||||
U8 SendFlags; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U32 MsgFlags_Did; /* 04h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 CTCommandCode; /* 0Ch */
|
||||
U8 FsType; /* 0Eh */
|
||||
U8 Reserved1; /* 0Fh */
|
||||
SGE_SIMPLE_UNION SGL; /* 10h */
|
||||
} MSG_FC_COMMON_TRANSPORT_SEND_REQUEST,
|
||||
MPI_POINTER PTR_MSG_FC_COMMON_TRANSPORT_SEND_REQUEST,
|
||||
FcCommonTransportSendRequest_t, MPI_POINTER pFcCommonTransportSendRequest_t;
|
||||
|
||||
#define MPI_FC_CT_SEND_DID_MASK (0x00FFFFFF)
|
||||
#define MPI_FC_CT_SEND_DID_SHIFT (0)
|
||||
#define MPI_FC_CT_SEND_MSGFLAGS_MASK (0xFF000000)
|
||||
#define MPI_FC_CT_SEND_MSGFLAGS_SHIFT (24)
|
||||
|
||||
|
||||
/* FC Common Transport Send Reply */
|
||||
typedef struct _MSG_FC_COMMON_TRANSPORT_SEND_REPLY
|
||||
{
|
||||
U16 Reserved; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved1; /* 04h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved3; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 ResponseLength; /* 14h */
|
||||
} MSG_FC_COMMON_TRANSPORT_SEND_REPLY, MPI_POINTER PTR_MSG_FC_COMMON_TRANSPORT_SEND_REPLY,
|
||||
FcCommonTransportSendReply_t, MPI_POINTER pFcCommonTransportSendReply_t;
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* FC Primitive Send messages */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_FC_PRIMITIVE_SEND_REQUEST
|
||||
{
|
||||
U8 SendFlags; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved1; /* 04h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U8 FcPrimitive[4]; /* 0Ch */
|
||||
} MSG_FC_PRIMITIVE_SEND_REQUEST, MPI_POINTER PTR_MSG_FC_PRIMITIVE_SEND_REQUEST,
|
||||
FcPrimitiveSendRequest_t, MPI_POINTER pFcPrimitiveSendRequest_t;
|
||||
|
||||
#define MPI_FC_PRIM_SEND_FLAGS_PORT_MASK (0x01)
|
||||
#define MPI_FC_PRIM_SEND_FLAGS_RESET_LINK (0x04)
|
||||
#define MPI_FC_PRIM_SEND_FLAGS_STOP_SEND (0x08)
|
||||
#define MPI_FC_PRIM_SEND_FLAGS_SEND_ONCE (0x10)
|
||||
#define MPI_FC_PRIM_SEND_FLAGS_SEND_AROUND (0x20)
|
||||
#define MPI_FC_PRIM_SEND_FLAGS_UNTIL_FULL (0x40)
|
||||
#define MPI_FC_PRIM_SEND_FLAGS_FOREVER (0x80)
|
||||
|
||||
/* FC Primitive Send Reply */
|
||||
typedef struct _MSG_FC_PRIMITIVE_SEND_REPLY
|
||||
{
|
||||
U8 SendFlags; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved1; /* 04h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved3; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
} MSG_FC_PRIMITIVE_SEND_REPLY, MPI_POINTER PTR_MSG_FC_PRIMITIVE_SEND_REPLY,
|
||||
FcPrimitiveSendReply_t, MPI_POINTER pFcPrimitiveSendReply_t;
|
||||
|
||||
#endif
|
||||
|
||||
316
sys/dev/mpt/mpilib/mpi_init.h
Normal file
316
sys/dev/mpt/mpilib/mpi_init.h
Normal file
@ -0,0 +1,316 @@
|
||||
/* $FreeBSD$ */
|
||||
/*
|
||||
* Copyright (c) 2000-2001 LSI Logic Corporation.
|
||||
*
|
||||
*
|
||||
* Name: MPI_INIT.H
|
||||
* Title: MPI initiator mode messages and structures
|
||||
* Creation Date: June 8, 2000
|
||||
*
|
||||
* MPI Version: 01.02.04
|
||||
*
|
||||
* Version History
|
||||
* ---------------
|
||||
*
|
||||
* Date Version Description
|
||||
* -------- -------- ------------------------------------------------------
|
||||
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
|
||||
* 05-24-00 00.10.02 Added SenseBufferLength to _MSG_SCSI_IO_REPLY.
|
||||
* 06-06-00 01.00.01 Update version number for 1.0 release.
|
||||
* 06-08-00 01.00.02 Added MPI_SCSI_RSP_INFO_ definitions.
|
||||
* 11-02-00 01.01.01 Original release for post 1.0 work.
|
||||
* 12-04-00 01.01.02 Added MPI_SCSIIO_CONTROL_NO_DISCONNECT.
|
||||
* 02-20-01 01.01.03 Started using MPI_POINTER.
|
||||
* 03-27-01 01.01.04 Added structure offset comments.
|
||||
* 04-10-01 01.01.05 Added new MsgFlag for MSG_SCSI_TASK_MGMT.
|
||||
* 08-08-01 01.02.01 Original release for v1.2 work.
|
||||
* 08-29-01 01.02.02 Added MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET.
|
||||
* Added MPI_SCSI_STATE_QUEUE_TAG_REJECTED for
|
||||
* MSG_SCSI_IO_REPLY.
|
||||
* 09-28-01 01.02.03 Added structures and defines for SCSI Enclosure
|
||||
* Processor messages.
|
||||
* 10-04-01 01.02.04 Added defines for SEP request Action field.
|
||||
* --------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef MPI_INIT_H
|
||||
#define MPI_INIT_H
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
*
|
||||
* S C S I I n i t i a t o r M e s s a g e s
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/****************************************************************************/
|
||||
/* SCSI IO messages and assocaited structures */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_SCSI_IO_REQUEST
|
||||
{
|
||||
U8 TargetID; /* 00h */
|
||||
U8 Bus; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 CDBLength; /* 04h */
|
||||
U8 SenseBufferLength; /* 05h */
|
||||
U8 Reserved; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U8 LUN[8]; /* 0Ch */
|
||||
U32 Control; /* 14h */
|
||||
U8 CDB[16]; /* 18h */
|
||||
U32 DataLength; /* 28h */
|
||||
U32 SenseBufferLowAddr; /* 2Ch */
|
||||
SGE_IO_UNION SGL; /* 30h */
|
||||
} MSG_SCSI_IO_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_REQUEST,
|
||||
SCSIIORequest_t, MPI_POINTER pSCSIIORequest_t;
|
||||
|
||||
|
||||
/* SCSIO MsgFlags bits */
|
||||
|
||||
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01)
|
||||
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00)
|
||||
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01)
|
||||
#define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02)
|
||||
#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00)
|
||||
#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02)
|
||||
|
||||
/* SCSIIO LUN fields */
|
||||
|
||||
#define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
|
||||
#define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
|
||||
#define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
|
||||
#define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
|
||||
#define MPI_SCSIIO_LUN_LEVEL_1_WORD (0xFF00)
|
||||
#define MPI_SCSIIO_LUN_LEVEL_1_DWORD (0x0000FF00)
|
||||
|
||||
/* SCSIO Control bits */
|
||||
|
||||
#define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
|
||||
#define MPI_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
|
||||
#define MPI_SCSIIO_CONTROL_WRITE (0x01000000)
|
||||
#define MPI_SCSIIO_CONTROL_READ (0x02000000)
|
||||
|
||||
#define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK (0x3C000000)
|
||||
#define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
|
||||
|
||||
#define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
|
||||
#define MPI_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
|
||||
#define MPI_SCSIIO_CONTROL_HEADOFQ (0x00000100)
|
||||
#define MPI_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
|
||||
#define MPI_SCSIIO_CONTROL_ACAQ (0x00000400)
|
||||
#define MPI_SCSIIO_CONTROL_UNTAGGED (0x00000500)
|
||||
#define MPI_SCSIIO_CONTROL_NO_DISCONNECT (0x00000700)
|
||||
|
||||
#define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK (0x00FF0000)
|
||||
#define MPI_SCSIIO_CONTROL_OBSOLETE (0x00800000)
|
||||
#define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV (0x00400000)
|
||||
#define MPI_SCSIIO_CONTROL_TARGET_RESET (0x00200000)
|
||||
#define MPI_SCSIIO_CONTROL_LUN_RESET_RSV (0x00100000)
|
||||
#define MPI_SCSIIO_CONTROL_RESERVED (0x00080000)
|
||||
#define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV (0x00040000)
|
||||
#define MPI_SCSIIO_CONTROL_ABORT_TASK_SET (0x00020000)
|
||||
#define MPI_SCSIIO_CONTROL_RESERVED2 (0x00010000)
|
||||
|
||||
|
||||
/* SCSIIO reply structure */
|
||||
typedef struct _MSG_SCSI_IO_REPLY
|
||||
{
|
||||
U8 TargetID; /* 00h */
|
||||
U8 Bus; /* 01h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 CDBLength; /* 04h */
|
||||
U8 SenseBufferLength; /* 05h */
|
||||
U8 Reserved; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U8 SCSIStatus; /* 0Ch */
|
||||
U8 SCSIState; /* 0Dh */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 TransferCount; /* 14h */
|
||||
U32 SenseCount; /* 18h */
|
||||
U32 ResponseInfo; /* 1Ch */
|
||||
} MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY,
|
||||
SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t;
|
||||
|
||||
|
||||
/* SCSIIO Reply SCSIStatus values (SAM-2 status codes) */
|
||||
|
||||
#define MPI_SCSI_STATUS_SUCCESS (0x00)
|
||||
#define MPI_SCSI_STATUS_CHECK_CONDITION (0x02)
|
||||
#define MPI_SCSI_STATUS_CONDITION_MET (0x04)
|
||||
#define MPI_SCSI_STATUS_BUSY (0x08)
|
||||
#define MPI_SCSI_STATUS_INTERMEDIATE (0x10)
|
||||
#define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
|
||||
#define MPI_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
|
||||
#define MPI_SCSI_STATUS_COMMAND_TERMINATED (0x22)
|
||||
#define MPI_SCSI_STATUS_TASK_SET_FULL (0x28)
|
||||
#define MPI_SCSI_STATUS_ACA_ACTIVE (0x30)
|
||||
|
||||
|
||||
/* SCSIIO Reply SCSIState values */
|
||||
|
||||
#define MPI_SCSI_STATE_AUTOSENSE_VALID (0x01)
|
||||
#define MPI_SCSI_STATE_AUTOSENSE_FAILED (0x02)
|
||||
#define MPI_SCSI_STATE_NO_SCSI_STATUS (0x04)
|
||||
#define MPI_SCSI_STATE_TERMINATED (0x08)
|
||||
#define MPI_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
|
||||
#define MPI_SCSI_STATE_QUEUE_TAG_REJECTED (0x20)
|
||||
|
||||
/* SCSIIO Reply ResponseInfo values */
|
||||
/* (FCP-1 RSP_CODE values and SPI-3 Packetized Failure codes) */
|
||||
|
||||
#define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE (0x00000000)
|
||||
#define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR (0x01000000)
|
||||
#define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID (0x02000000)
|
||||
#define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR (0x03000000)
|
||||
#define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000)
|
||||
#define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000)
|
||||
#define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000)
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* SCSI Task Management messages */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_SCSI_TASK_MGMT
|
||||
{
|
||||
U8 TargetID; /* 00h */
|
||||
U8 Bus; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Reserved; /* 04h */
|
||||
U8 TaskType; /* 05h */
|
||||
U8 Reserved1; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U8 LUN[8]; /* 0Ch */
|
||||
U32 Reserved2[7]; /* 14h */
|
||||
U32 TaskMsgContext; /* 30h */
|
||||
} MSG_SCSI_TASK_MGMT, MPI_POINTER PTR_SCSI_TASK_MGMT,
|
||||
SCSITaskMgmt_t, MPI_POINTER pSCSITaskMgmt_t;
|
||||
|
||||
/* TaskType values */
|
||||
|
||||
#define MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
|
||||
#define MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
|
||||
#define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
|
||||
#define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04)
|
||||
#define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
|
||||
|
||||
/* MsgFlags bits */
|
||||
#define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00)
|
||||
#define MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION (0x02)
|
||||
#define MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION (0x04)
|
||||
|
||||
/* SCSI Task Management Reply */
|
||||
typedef struct _MSG_SCSI_TASK_MGMT_REPLY
|
||||
{
|
||||
U8 TargetID; /* 00h */
|
||||
U8 Bus; /* 01h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Reserved; /* 04h */
|
||||
U8 TaskType; /* 05h */
|
||||
U8 Reserved1; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U8 Reserved2[2]; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 TerminationCount; /* 14h */
|
||||
} MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY,
|
||||
SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t;
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* SCSI Enclosure Processor messages */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_SEP_REQUEST
|
||||
{
|
||||
U8 TargetID; /* 00h */
|
||||
U8 Bus; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Action; /* 04h */
|
||||
U8 Reserved1; /* 05h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U32 SlotStatus; /* 0Ch */
|
||||
} MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST,
|
||||
SEPRequest_t, MPI_POINTER pSEPRequest_t;
|
||||
|
||||
/* Action defines */
|
||||
#define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00)
|
||||
#define MPI_SEP_REQ_ACTION_READ_STATUS (0x01)
|
||||
|
||||
/* SlotStatus bits for MSG_SEP_REQUEST */
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_PARITY_CHECK (0x00000020)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT (0x00080000)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE (0x00400000)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF (0x10000000)
|
||||
#define MPI_SEP_REQ_SLOTSTATUS_SWAP_RESET (0x80000000)
|
||||
|
||||
|
||||
typedef struct _MSG_SEP_REPLY
|
||||
{
|
||||
U8 TargetID; /* 00h */
|
||||
U8 Bus; /* 01h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Action; /* 04h */
|
||||
U8 Reserved1; /* 05h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved3; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 SlotStatus; /* 14h */
|
||||
} MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY,
|
||||
SEPReply_t, MPI_POINTER pSEPReply_t;
|
||||
|
||||
/* SlotStatus bits for MSG_SEP_REPLY */
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_PARITY_CHECK (0x00000020)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_REPORT (0x00010000)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY (0x00080000)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE (0x00400000)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED (0x01000000)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED (0x02000000)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x10000000)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_FAULT_SENSED (0x40000000)
|
||||
#define MPI_SEP_REPLY_SLOTSTATUS_SWAPPED (0x80000000)
|
||||
|
||||
#endif
|
||||
688
sys/dev/mpt/mpilib/mpi_ioc.h
Normal file
688
sys/dev/mpt/mpilib/mpi_ioc.h
Normal file
@ -0,0 +1,688 @@
|
||||
/* $FreeBSD$ */
|
||||
/*
|
||||
* Copyright (c) 2000-2001 LSI Logic Corporation.
|
||||
*
|
||||
*
|
||||
* Name: MPI_IOC.H
|
||||
* Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
|
||||
* Creation Date: August 11, 2000
|
||||
*
|
||||
* MPI Version: 01.02.04
|
||||
*
|
||||
* Version History
|
||||
* ---------------
|
||||
*
|
||||
* Date Version Description
|
||||
* -------- -------- ------------------------------------------------------
|
||||
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
|
||||
* 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure.
|
||||
* 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
|
||||
* 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure.
|
||||
* Added _MSG_EVENT_ACK_REPLY structure.
|
||||
* Added _MSG_FW_DOWNLOAD_REPLY structure.
|
||||
* Added _MSG_TOOLBOX_REPLY structure.
|
||||
* 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure.
|
||||
* 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI,
|
||||
* _LINK_STATUS, _LOOP_STATE and _LOGOUT.
|
||||
* 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in
|
||||
* _MSG_EVENT_ACK_REPLY structure to match specification.
|
||||
* 11-02-00 01.01.01 Original release for post 1.0 work.
|
||||
* Added a value for Manufacturer to WhoInit.
|
||||
* 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and
|
||||
* removed toolbox message.
|
||||
* 01-09-01 01.01.03 Added event enabled and disabled defines.
|
||||
* Added structures for FwHeader and DataHeader.
|
||||
* Added ImageType to FwUpload reply.
|
||||
* 02-20-01 01.01.04 Started using MPI_POINTER.
|
||||
* 02-27-01 01.01.05 Added event for RAID status change and its event data.
|
||||
* Added IocNumber field to MSG_IOC_FACTS_REPLY.
|
||||
* 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER.
|
||||
* Added structure offset comments.
|
||||
* 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE.
|
||||
* 08-08-01 01.02.01 Original release for v1.2 work.
|
||||
* New format for FWVersion and ProductId in
|
||||
* MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
|
||||
* 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
|
||||
* related structure and defines.
|
||||
* Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
|
||||
* Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
|
||||
* Replaced a reserved field in MSG_IOC_FACTS_REPLY with
|
||||
* IOCExceptions and changed DataImageSize to reserved.
|
||||
* Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
|
||||
* MPI_FW_UPLOAD_ITYPE_NVDATA.
|
||||
* 09-28-01 01.02.03 Modified Event Data for Integrated RAID.
|
||||
* 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
|
||||
* --------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef MPI_IOC_H
|
||||
#define MPI_IOC_H
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
*
|
||||
* I O C M e s s a g e s
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/****************************************************************************/
|
||||
/* IOCInit message */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_IOC_INIT
|
||||
{
|
||||
U8 WhoInit; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Flags; /* 04h */
|
||||
U8 MaxDevices; /* 05h */
|
||||
U8 MaxBuses; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 ReplyFrameSize; /* 0Ch */
|
||||
U8 Reserved1[2]; /* 0Eh */
|
||||
U32 HostMfaHighAddr; /* 10h */
|
||||
U32 SenseBufferHighAddr; /* 14h */
|
||||
} MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
|
||||
IOCInit_t, MPI_POINTER pIOCInit_t;
|
||||
|
||||
/* WhoInit values */
|
||||
#define MPI_WHOINIT_NO_ONE (0x00)
|
||||
#define MPI_WHOINIT_SYSTEM_BIOS (0x01)
|
||||
#define MPI_WHOINIT_ROM_BIOS (0x02)
|
||||
#define MPI_WHOINIT_PCI_PEER (0x03)
|
||||
#define MPI_WHOINIT_HOST_DRIVER (0x04)
|
||||
#define MPI_WHOINIT_MANUFACTURER (0x05)
|
||||
|
||||
/* Flags values */
|
||||
#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
|
||||
|
||||
typedef struct _MSG_IOC_INIT_REPLY
|
||||
{
|
||||
U8 WhoInit; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Flags; /* 04h */
|
||||
U8 MaxDevices; /* 05h */
|
||||
U8 MaxBuses; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved2; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
} MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
|
||||
IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
|
||||
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* IOC Facts message */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_IOC_FACTS
|
||||
{
|
||||
U8 Reserved[2]; /* 00h */
|
||||
U8 ChainOffset; /* 01h */
|
||||
U8 Function; /* 02h */
|
||||
U8 Reserved1[3]; /* 03h */
|
||||
U8 MsgFlags; /* 04h */
|
||||
U32 MsgContext; /* 08h */
|
||||
} MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
|
||||
IOCFacts_t, MPI_POINTER pIOCFacts_t;
|
||||
|
||||
typedef struct _MPI_FW_VERSION_STRUCT
|
||||
{
|
||||
U8 Dev; /* 00h */
|
||||
U8 Unit; /* 01h */
|
||||
U8 Minor; /* 02h */
|
||||
U8 Major; /* 03h */
|
||||
} MPI_FW_VERSION_STRUCT;
|
||||
|
||||
typedef union _MPI_FW_VERSION
|
||||
{
|
||||
MPI_FW_VERSION_STRUCT Struct;
|
||||
U32 Word;
|
||||
} MPI_FW_VERSION;
|
||||
|
||||
/* IOC Facts Reply */
|
||||
typedef struct _MSG_IOC_FACTS_REPLY
|
||||
{
|
||||
U16 MsgVersion; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved; /* 04h */
|
||||
U8 IOCNumber; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 IOCExceptions; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U8 MaxChainDepth; /* 14h */
|
||||
U8 WhoInit; /* 15h */
|
||||
U8 BlockSize; /* 16h */
|
||||
U8 Flags; /* 17h */
|
||||
U16 ReplyQueueDepth; /* 18h */
|
||||
U16 RequestFrameSize; /* 1Ah */
|
||||
U16 Reserved_0101_FWVersion; /* 1Ch */ /* obsolete 16-bit FWVersion */
|
||||
U16 ProductID; /* 1Eh */
|
||||
U32 CurrentHostMfaHighAddr; /* 20h */
|
||||
U16 GlobalCredits; /* 24h */
|
||||
U8 NumberOfPorts; /* 26h */
|
||||
U8 EventState; /* 27h */
|
||||
U32 CurrentSenseBufferHighAddr; /* 28h */
|
||||
U16 CurReplyFrameSize; /* 2Ch */
|
||||
U8 MaxDevices; /* 2Eh */
|
||||
U8 MaxBuses; /* 2Fh */
|
||||
U32 FWImageSize; /* 30h */
|
||||
U32 Reserved4; /* 34h */
|
||||
MPI_FW_VERSION FWVersion; /* 38h */
|
||||
} MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
|
||||
IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
|
||||
|
||||
#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
|
||||
#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
|
||||
|
||||
#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
|
||||
|
||||
#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
|
||||
|
||||
#define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
|
||||
#define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
*
|
||||
* P o r t M e s s a g e s
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/****************************************************************************/
|
||||
/* Port Facts message and Reply */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_PORT_FACTS
|
||||
{
|
||||
U8 Reserved[2]; /* 00h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Reserved1[2]; /* 04h */
|
||||
U8 PortNumber; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
} MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
|
||||
PortFacts_t, MPI_POINTER pPortFacts_t;
|
||||
|
||||
typedef struct _MSG_PORT_FACTS_REPLY
|
||||
{
|
||||
U16 Reserved; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved1; /* 04h */
|
||||
U8 PortNumber; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved2; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U8 Reserved3; /* 14h */
|
||||
U8 PortType; /* 15h */
|
||||
U16 MaxDevices; /* 16h */
|
||||
U16 PortSCSIID; /* 18h */
|
||||
U16 ProtocolFlags; /* 1Ah */
|
||||
U16 MaxPostedCmdBuffers; /* 1Ch */
|
||||
U16 MaxPersistentIDs; /* 1Eh */
|
||||
U16 MaxLanBuckets; /* 20h */
|
||||
U16 Reserved4; /* 22h */
|
||||
U32 Reserved5; /* 24h */
|
||||
} MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
|
||||
PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
|
||||
|
||||
|
||||
/* PortTypes values */
|
||||
|
||||
#define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00)
|
||||
#define MPI_PORTFACTS_PORTTYPE_SCSI (0x01)
|
||||
#define MPI_PORTFACTS_PORTTYPE_FC (0x10)
|
||||
|
||||
/* ProtocolFlags values */
|
||||
|
||||
#define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01)
|
||||
#define MPI_PORTFACTS_PROTOCOL_LAN (0x02)
|
||||
#define MPI_PORTFACTS_PROTOCOL_TARGET (0x04)
|
||||
#define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08)
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* Port Enable Message */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_PORT_ENABLE
|
||||
{
|
||||
U8 Reserved[2]; /* 00h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Reserved1[2]; /* 04h */
|
||||
U8 PortNumber; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
} MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
|
||||
PortEnable_t, MPI_POINTER pPortEnable_t;
|
||||
|
||||
typedef struct _MSG_PORT_ENABLE_REPLY
|
||||
{
|
||||
U8 Reserved[2]; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Reserved1[2]; /* 04h */
|
||||
U8 PortNumber; /* 05h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved2; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
} MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
|
||||
PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
*
|
||||
* E v e n t M e s s a g e s
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/****************************************************************************/
|
||||
/* Event Notification messages */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_EVENT_NOTIFY
|
||||
{
|
||||
U8 Switch; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Reserved1[3]; /* 04h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
} MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
|
||||
EventNotification_t, MPI_POINTER pEventNotification_t;
|
||||
|
||||
/* Event Notification Reply */
|
||||
|
||||
typedef struct _MSG_EVENT_NOTIFY_REPLY
|
||||
{
|
||||
U16 EventDataLength; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Reserved1[2]; /* 04h */
|
||||
U8 AckRequired; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U8 Reserved2[2]; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 Event; /* 14h */
|
||||
U32 EventContext; /* 18h */
|
||||
U32 Data[1]; /* 1Ch */
|
||||
} MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
|
||||
EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
|
||||
|
||||
/* Event Acknowledge */
|
||||
|
||||
typedef struct _MSG_EVENT_ACK
|
||||
{
|
||||
U8 Reserved[2]; /* 00h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Reserved1[3]; /* 04h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U32 Event; /* 0Ch */
|
||||
U32 EventContext; /* 10h */
|
||||
} MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
|
||||
EventAck_t, MPI_POINTER pEventAck_t;
|
||||
|
||||
typedef struct _MSG_EVENT_ACK_REPLY
|
||||
{
|
||||
U8 Reserved[2]; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Reserved1[3]; /* 04h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved2; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
} MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
|
||||
EventAckReply_t, MPI_POINTER pEventAckReply_t;
|
||||
|
||||
/* Switch */
|
||||
|
||||
#define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00)
|
||||
#define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01)
|
||||
|
||||
/* Event */
|
||||
|
||||
#define MPI_EVENT_NONE (0x00000000)
|
||||
#define MPI_EVENT_LOG_DATA (0x00000001)
|
||||
#define MPI_EVENT_STATE_CHANGE (0x00000002)
|
||||
#define MPI_EVENT_UNIT_ATTENTION (0x00000003)
|
||||
#define MPI_EVENT_IOC_BUS_RESET (0x00000004)
|
||||
#define MPI_EVENT_EXT_BUS_RESET (0x00000005)
|
||||
#define MPI_EVENT_RESCAN (0x00000006)
|
||||
#define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007)
|
||||
#define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008)
|
||||
#define MPI_EVENT_LOGOUT (0x00000009)
|
||||
#define MPI_EVENT_EVENT_CHANGE (0x0000000A)
|
||||
#define MPI_EVENT_INTEGRATED_RAID (0x0000000B)
|
||||
#define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
|
||||
#define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D)
|
||||
|
||||
/* AckRequired field values */
|
||||
|
||||
#define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
|
||||
#define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
|
||||
|
||||
/* EventChange Event data */
|
||||
|
||||
typedef struct _EVENT_DATA_EVENT_CHANGE
|
||||
{
|
||||
U8 EventState; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U16 Reserved1; /* 02h */
|
||||
} EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
|
||||
EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
|
||||
|
||||
/* SCSI Event data for Port, Bus and Device forms */
|
||||
|
||||
typedef struct _EVENT_DATA_SCSI
|
||||
{
|
||||
U8 TargetID; /* 00h */
|
||||
U8 BusPort; /* 01h */
|
||||
U16 Reserved; /* 02h */
|
||||
} EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
|
||||
EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
|
||||
|
||||
/* SCSI Device Status Change Event data */
|
||||
|
||||
typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
|
||||
{
|
||||
U8 TargetID; /* 00h */
|
||||
U8 Bus; /* 01h */
|
||||
U8 ReasonCode; /* 02h */
|
||||
U8 LUN; /* 03h */
|
||||
U8 ASC; /* 04h */
|
||||
U8 ASCQ; /* 05h */
|
||||
U16 Reserved; /* 06h */
|
||||
} EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
|
||||
MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
|
||||
MpiEventDataScsiDeviceStatusChange_t,
|
||||
MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
|
||||
|
||||
/* MPI SCSI Device Status Change Event data ReasonCode values */
|
||||
#define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03)
|
||||
#define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04)
|
||||
#define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05)
|
||||
|
||||
/* MPI Link Status Change Event data */
|
||||
|
||||
typedef struct _EVENT_DATA_LINK_STATUS
|
||||
{
|
||||
U8 State; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U16 Reserved1; /* 02h */
|
||||
U8 Reserved2; /* 04h */
|
||||
U8 Port; /* 05h */
|
||||
U16 Reserved3; /* 06h */
|
||||
} EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
|
||||
EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
|
||||
|
||||
#define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000)
|
||||
#define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001)
|
||||
|
||||
/* MPI Loop State Change Event data */
|
||||
|
||||
typedef struct _EVENT_DATA_LOOP_STATE
|
||||
{
|
||||
U8 Character4; /* 00h */
|
||||
U8 Character3; /* 01h */
|
||||
U8 Type; /* 02h */
|
||||
U8 Reserved; /* 03h */
|
||||
U8 Reserved1; /* 04h */
|
||||
U8 Port; /* 05h */
|
||||
U16 Reserved2; /* 06h */
|
||||
} EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
|
||||
EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
|
||||
|
||||
#define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001)
|
||||
#define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002)
|
||||
#define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003)
|
||||
|
||||
/* MPI LOGOUT Event data */
|
||||
|
||||
typedef struct _EVENT_DATA_LOGOUT
|
||||
{
|
||||
U32 NPortID; /* 00h */
|
||||
U8 Reserved; /* 04h */
|
||||
U8 Port; /* 05h */
|
||||
U16 Reserved1; /* 06h */
|
||||
} EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
|
||||
EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
|
||||
|
||||
/* MPI Integrated RAID Event data */
|
||||
|
||||
typedef struct _EVENT_DATA_RAID
|
||||
{
|
||||
U8 VolumeID; /* 00h */
|
||||
U8 VolumeBus; /* 01h */
|
||||
U8 ReasonCode; /* 02h */
|
||||
U8 PhysDiskNum; /* 03h */
|
||||
U8 ASC; /* 04h */
|
||||
U8 ASCQ; /* 05h */
|
||||
U16 Reserved; /* 06h */
|
||||
U32 SettingsStatus; /* 08h */
|
||||
} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
|
||||
MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
|
||||
|
||||
/* MPI Integrated RAID Event data ReasonCode values */
|
||||
#define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
|
||||
#define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
|
||||
#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
|
||||
#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
|
||||
#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
|
||||
#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
|
||||
#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
|
||||
#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
|
||||
#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
|
||||
#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
|
||||
#define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
|
||||
#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
*
|
||||
* F i r m w a r e L o a d M e s s a g e s
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/****************************************************************************/
|
||||
/* Firmware Download message and associated structures */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_FW_DOWNLOAD
|
||||
{
|
||||
U8 ImageType; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Reserved1[3]; /* 04h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
SGE_MPI_UNION SGL; /* 0Ch */
|
||||
} MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
|
||||
FWDownload_t, MPI_POINTER pFWDownload_t;
|
||||
|
||||
#define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
|
||||
#define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
|
||||
#define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
|
||||
#define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
|
||||
|
||||
|
||||
typedef struct _FWDownloadTCSGE
|
||||
{
|
||||
U8 Reserved; /* 00h */
|
||||
U8 ContextSize; /* 01h */
|
||||
U8 DetailsLength; /* 02h */
|
||||
U8 Flags; /* 03h */
|
||||
U32 Reserved_0100_Checksum; /* 04h */ /* obsolete Checksum */
|
||||
U32 ImageOffset; /* 08h */
|
||||
U32 ImageSize; /* 0Ch */
|
||||
} FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
|
||||
FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
|
||||
|
||||
/* Firmware Download reply */
|
||||
typedef struct _MSG_FW_DOWNLOAD_REPLY
|
||||
{
|
||||
U8 ImageType; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Reserved1[3]; /* 04h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved2; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
} MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
|
||||
FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* Firmware Upload message and associated structures */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_FW_UPLOAD
|
||||
{
|
||||
U8 ImageType; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Reserved1[3]; /* 04h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
SGE_MPI_UNION SGL; /* 0Ch */
|
||||
} MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
|
||||
FWUpload_t, MPI_POINTER pFWUpload_t;
|
||||
|
||||
#define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00)
|
||||
#define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
|
||||
#define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
|
||||
#define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
|
||||
|
||||
typedef struct _FWUploadTCSGE
|
||||
{
|
||||
U8 Reserved; /* 00h */
|
||||
U8 ContextSize; /* 01h */
|
||||
U8 DetailsLength; /* 02h */
|
||||
U8 Flags; /* 03h */
|
||||
U32 Reserved1; /* 04h */
|
||||
U32 ImageOffset; /* 08h */
|
||||
U32 ImageSize; /* 0Ch */
|
||||
} FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
|
||||
FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
|
||||
|
||||
/* Firmware Upload reply */
|
||||
typedef struct _MSG_FW_UPLOAD_REPLY
|
||||
{
|
||||
U8 ImageType; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Reserved1[3]; /* 04h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved2; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 ActualImageSize; /* 14h */
|
||||
} MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
|
||||
FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
|
||||
|
||||
|
||||
typedef struct _MPI_FW_HEADER
|
||||
{
|
||||
U32 ArmBranchInstruction0; /* 00h */
|
||||
U32 Signature0; /* 04h */
|
||||
U32 Signature1; /* 08h */
|
||||
U32 Signature2; /* 0Ch */
|
||||
U32 ArmBranchInstruction1; /* 10h */
|
||||
U32 ArmBranchInstruction2; /* 14h */
|
||||
U32 Reserved; /* 18h */
|
||||
U32 Checksum; /* 1Ch */
|
||||
U16 VendorId; /* 20h */
|
||||
U16 ProductId; /* 22h */
|
||||
MPI_FW_VERSION FWVersion; /* 24h */
|
||||
U32 SeqCodeVersion; /* 28h */
|
||||
U32 ImageSize; /* 2Ch */
|
||||
U32 NextImageHeaderOffset; /* 30h */
|
||||
U32 LoadStartAddress; /* 34h */
|
||||
U32 IopResetVectorValue; /* 38h */
|
||||
U32 IopResetRegAddr; /* 3Ch */
|
||||
U32 VersionNameWhat; /* 40h */
|
||||
U8 VersionName[32]; /* 44h */
|
||||
U32 VendorNameWhat; /* 64h */
|
||||
U8 VendorName[32]; /* 68h */
|
||||
} MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
|
||||
MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
|
||||
|
||||
#define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840)
|
||||
|
||||
/* defines for using the ProductId field */
|
||||
#define MPI_FW_HEADER_PID_TYPE_MASK (0xF000)
|
||||
#define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000)
|
||||
#define MPI_FW_HEADER_PID_TYPE_FC (0x1000)
|
||||
|
||||
#define MPI_FW_HEADER_PID_PROD_MASK (0x0F00)
|
||||
#define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100)
|
||||
#define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
|
||||
#define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300)
|
||||
#define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400)
|
||||
#define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500)
|
||||
#define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600)
|
||||
|
||||
#define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF)
|
||||
#define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001)
|
||||
#define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002)
|
||||
#define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003)
|
||||
#define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004)
|
||||
#define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005)
|
||||
#define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006)
|
||||
#define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007)
|
||||
#define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008)
|
||||
#define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009)
|
||||
#define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A)
|
||||
#define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000)
|
||||
#define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001)
|
||||
#define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002)
|
||||
|
||||
typedef struct _MPI_EXT_IMAGE_HEADER
|
||||
{
|
||||
U8 ImageType; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U16 Reserved1; /* 02h */
|
||||
U32 Checksum; /* 04h */
|
||||
U32 ImageSize; /* 08h */
|
||||
U32 NextImageHeaderOffset; /* 0Ch */
|
||||
U32 LoadStartAddress; /* 10h */
|
||||
U32 Reserved2; /* 14h */
|
||||
} MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
|
||||
MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
|
||||
|
||||
/* defines for the ImageType field */
|
||||
#define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
|
||||
#define MPI_EXT_IMAGE_TYPE_FW (0x01)
|
||||
#define MPI_EXT_IMAGE_TYPE_NVDATA (0x03)
|
||||
|
||||
#endif
|
||||
213
sys/dev/mpt/mpilib/mpi_lan.h
Normal file
213
sys/dev/mpt/mpilib/mpi_lan.h
Normal file
@ -0,0 +1,213 @@
|
||||
/* $FreeBSD$ */
|
||||
/*
|
||||
* Copyright (c) 2000-2001 LSI Logic Corporation.
|
||||
*
|
||||
*
|
||||
* Name: MPI_LAN.H
|
||||
* Title: MPI LAN messages and structures
|
||||
* Creation Date: June 30, 2000
|
||||
*
|
||||
* MPI Version: 01.02.01
|
||||
*
|
||||
* Version History
|
||||
* ---------------
|
||||
*
|
||||
* Date Version Description
|
||||
* -------- -------- ------------------------------------------------------
|
||||
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
|
||||
* 05-24-00 00.10.02 Added LANStatus field to _MSG_LAN_SEND_REPLY.
|
||||
* Added LANStatus field to _MSG_LAN_RECEIVE_POST_REPLY.
|
||||
* Moved ListCount field in _MSG_LAN_RECEIVE_POST_REPLY.
|
||||
* 06-06-00 01.00.01 Update version number for 1.0 release.
|
||||
* 06-12-00 01.00.02 Added MPI_ to BUCKETSTATUS_ definitions.
|
||||
* 06-22-00 01.00.03 Major changes to match new LAN definition in 1.0 spec.
|
||||
* 06-30-00 01.00.04 Added Context Reply definitions per revised proposal.
|
||||
* Changed transaction context usage to bucket/buffer.
|
||||
* 07-05-00 01.00.05 Removed LAN_RECEIVE_POST_BUCKET_CONTEXT_MASK definition
|
||||
* to lan private header file
|
||||
* 11-02-00 01.01.01 Original release for post 1.0 work
|
||||
* 02-20-01 01.01.02 Started using MPI_POINTER.
|
||||
* 03-27-01 01.01.03 Added structure offset comments.
|
||||
* 08-08-01 01.02.01 Original release for v1.2 work.
|
||||
* --------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef MPI_LAN_H
|
||||
#define MPI_LAN_H
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* L A N M e s s a g e s
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/* LANSend messages */
|
||||
|
||||
typedef struct _MSG_LAN_SEND_REQUEST
|
||||
{
|
||||
U16 Reserved; /* 00h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved2; /* 04h */
|
||||
U8 PortNumber; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
SGE_MPI_UNION SG_List[1]; /* 0Ch */
|
||||
} MSG_LAN_SEND_REQUEST, MPI_POINTER PTR_MSG_LAN_SEND_REQUEST,
|
||||
LANSendRequest_t, MPI_POINTER pLANSendRequest_t;
|
||||
|
||||
|
||||
typedef struct _MSG_LAN_SEND_REPLY
|
||||
{
|
||||
U16 Reserved; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Reserved2; /* 04h */
|
||||
U8 NumberOfContexts; /* 05h */
|
||||
U8 PortNumber; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved3; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 BufferContext; /* 14h */
|
||||
} MSG_LAN_SEND_REPLY, MPI_POINTER PTR_MSG_LAN_SEND_REPLY,
|
||||
LANSendReply_t, MPI_POINTER pLANSendReply_t;
|
||||
|
||||
|
||||
/* LANReceivePost */
|
||||
|
||||
typedef struct _MSG_LAN_RECEIVE_POST_REQUEST
|
||||
{
|
||||
U16 Reserved; /* 00h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved2; /* 04h */
|
||||
U8 PortNumber; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U32 BucketCount; /* 0Ch */
|
||||
SGE_MPI_UNION SG_List[1]; /* 10h */
|
||||
} MSG_LAN_RECEIVE_POST_REQUEST, MPI_POINTER PTR_MSG_LAN_RECEIVE_POST_REQUEST,
|
||||
LANReceivePostRequest_t, MPI_POINTER pLANReceivePostRequest_t;
|
||||
|
||||
|
||||
typedef struct _MSG_LAN_RECEIVE_POST_REPLY
|
||||
{
|
||||
U16 Reserved; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 Reserved2; /* 04h */
|
||||
U8 NumberOfContexts; /* 05h */
|
||||
U8 PortNumber; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved3; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 BucketsRemaining; /* 14h */
|
||||
U32 PacketOffset; /* 18h */
|
||||
U32 PacketLength; /* 1Ch */
|
||||
U32 BucketContext[1]; /* 20h */
|
||||
} MSG_LAN_RECEIVE_POST_REPLY, MPI_POINTER PTR_MSG_LAN_RECEIVE_POST_REPLY,
|
||||
LANReceivePostReply_t, MPI_POINTER pLANReceivePostReply_t;
|
||||
|
||||
|
||||
/* LANReset */
|
||||
|
||||
typedef struct _MSG_LAN_RESET_REQUEST
|
||||
{
|
||||
U16 Reserved; /* 00h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved2; /* 04h */
|
||||
U8 PortNumber; /* 05h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
} MSG_LAN_RESET_REQUEST, MPI_POINTER PTR_MSG_LAN_RESET_REQUEST,
|
||||
LANResetRequest_t, MPI_POINTER pLANResetRequest_t;
|
||||
|
||||
|
||||
typedef struct _MSG_LAN_RESET_REPLY
|
||||
{
|
||||
U16 Reserved; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved2; /* 04h */
|
||||
U8 PortNumber; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved3; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
} MSG_LAN_RESET_REPLY, MPI_POINTER PTR_MSG_LAN_RESET_REPLY,
|
||||
LANResetReply_t, MPI_POINTER pLANResetReply_t;
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* LAN Context Reply defines and macros */
|
||||
/****************************************************************************/
|
||||
|
||||
#define LAN_REPLY_PACKET_LENGTH_MASK (0x0000FFFF)
|
||||
#define LAN_REPLY_PACKET_LENGTH_SHIFT (0)
|
||||
#define LAN_REPLY_BUCKET_CONTEXT_MASK (0x07FF0000)
|
||||
#define LAN_REPLY_BUCKET_CONTEXT_SHIFT (16)
|
||||
#define LAN_REPLY_BUFFER_CONTEXT_MASK (0x07FFFFFF)
|
||||
#define LAN_REPLY_BUFFER_CONTEXT_SHIFT (0)
|
||||
#define LAN_REPLY_FORM_MASK (0x18000000)
|
||||
#define LAN_REPLY_FORM_RECEIVE_SINGLE (0x00)
|
||||
#define LAN_REPLY_FORM_RECEIVE_MULTIPLE (0x01)
|
||||
#define LAN_REPLY_FORM_SEND_SINGLE (0x02)
|
||||
#define LAN_REPLY_FORM_MESSAGE_CONTEXT (0x03)
|
||||
#define LAN_REPLY_FORM_SHIFT (27)
|
||||
|
||||
#define GET_LAN_PACKET_LENGTH(x) (((x) & LAN_REPLY_PACKET_LENGTH_MASK) \
|
||||
>> LAN_REPLY_PACKET_LENGTH_SHIFT)
|
||||
|
||||
#define SET_LAN_PACKET_LENGTH(x, lth) \
|
||||
((x) = ((x) & ~LAN_REPLY_PACKET_LENGTH_MASK) | \
|
||||
(((lth) << LAN_REPLY_PACKET_LENGTH_SHIFT) & \
|
||||
LAN_REPLY_PACKET_LENGTH_MASK))
|
||||
|
||||
#define GET_LAN_BUCKET_CONTEXT(x) (((x) & LAN_REPLY_BUCKET_CONTEXT_MASK) \
|
||||
>> LAN_REPLY_BUCKET_CONTEXT_SHIFT)
|
||||
|
||||
#define SET_LAN_BUCKET_CONTEXT(x, ctx) \
|
||||
((x) = ((x) & ~LAN_REPLY_BUCKET_CONTEXT_MASK) | \
|
||||
(((ctx) << LAN_REPLY_BUCKET_CONTEXT_SHIFT) & \
|
||||
LAN_REPLY_BUCKET_CONTEXT_MASK))
|
||||
|
||||
#define GET_LAN_BUFFER_CONTEXT(x) (((x) & LAN_REPLY_BUFFER_CONTEXT_MASK) \
|
||||
>> LAN_REPLY_BUFFER_CONTEXT_SHIFT)
|
||||
|
||||
#define SET_LAN_BUFFER_CONTEXT(x, ctx) \
|
||||
((x) = ((x) & ~LAN_REPLY_BUFFER_CONTEXT_MASK) | \
|
||||
(((ctx) << LAN_REPLY_BUFFER_CONTEXT_SHIFT) & \
|
||||
LAN_REPLY_BUFFER_CONTEXT_MASK))
|
||||
|
||||
#define GET_LAN_FORM(x) (((x) & LAN_REPLY_FORM_MASK) \
|
||||
>> LAN_REPLY_FORM_SHIFT)
|
||||
|
||||
#define SET_LAN_FORM(x, frm) \
|
||||
((x) = ((x) & ~LAN_REPLY_FORM_MASK) | \
|
||||
(((frm) << LAN_REPLY_FORM_SHIFT) & \
|
||||
LAN_REPLY_FORM_MASK))
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* LAN Current Device State defines */
|
||||
/****************************************************************************/
|
||||
|
||||
#define MPI_LAN_DEVICE_STATE_RESET (0x00)
|
||||
#define MPI_LAN_DEVICE_STATE_OPERATIONAL (0x01)
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* LAN Loopback defines */
|
||||
/****************************************************************************/
|
||||
|
||||
#define MPI_LAN_TX_MODES_ENABLE_LOOPBACK_SUPPRESSION (0x01)
|
||||
|
||||
#endif
|
||||
|
||||
179
sys/dev/mpt/mpilib/mpi_raid.h
Normal file
179
sys/dev/mpt/mpilib/mpi_raid.h
Normal file
@ -0,0 +1,179 @@
|
||||
/* $FreeBSD$ */
|
||||
/*
|
||||
* Copyright (c) 2001 LSI Logic Corporation.
|
||||
*
|
||||
*
|
||||
* Name: MPI_RAID.H
|
||||
* Title: MPI RAID message and structures
|
||||
* Creation Date: February 27, 2001
|
||||
*
|
||||
* MPI Version: 01.02.04
|
||||
*
|
||||
* Version History
|
||||
* ---------------
|
||||
*
|
||||
* Date Version Description
|
||||
* -------- -------- ------------------------------------------------------
|
||||
* 02-27-01 01.01.01 Original release for this file.
|
||||
* 03-27-01 01.01.02 Added structure offset comments.
|
||||
* 08-08-01 01.02.01 Original release for v1.2 work.
|
||||
* 09-28-01 01.02.02 Major rework for MPI v1.2 Integrated RAID changes.
|
||||
* 10-04-01 01.02.03 Added ActionData defines for
|
||||
* MPI_RAID_ACTION_DELETE_VOLUME action.
|
||||
* 11-01-01 01.02.04 Added define for MPI_RAID_ACTION_ADATA_DO_NOT_SYNC.
|
||||
* --------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef MPI_RAID_H
|
||||
#define MPI_RAID_H
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* R A I D M e s s a g e s
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* RAID Volume Request */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_RAID_ACTION
|
||||
{
|
||||
U8 Action; /* 00h */
|
||||
U8 Reserved1; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 VolumeID; /* 04h */
|
||||
U8 VolumeBus; /* 05h */
|
||||
U8 PhysDiskNum; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U32 Reserved2; /* 0Ch */
|
||||
U32 ActionDataWord; /* 10h */
|
||||
SGE_SIMPLE_UNION ActionDataSGE; /* 14h */
|
||||
} MSG_RAID_ACTION_REQUEST, MPI_POINTER PTR_MSG_RAID_ACTION_REQUEST,
|
||||
MpiRaidActionRequest_t , MPI_POINTER pMpiRaidActionRequest_t;
|
||||
|
||||
|
||||
/* RAID Action request Action values */
|
||||
|
||||
#define MPI_RAID_ACTION_STATUS (0x00)
|
||||
#define MPI_RAID_ACTION_INDICATOR_STRUCT (0x01)
|
||||
#define MPI_RAID_ACTION_CREATE_VOLUME (0x02)
|
||||
#define MPI_RAID_ACTION_DELETE_VOLUME (0x03)
|
||||
#define MPI_RAID_ACTION_DISABLE_VOLUME (0x04)
|
||||
#define MPI_RAID_ACTION_ENABLE_VOLUME (0x05)
|
||||
#define MPI_RAID_ACTION_QUIESCE_PHYS_IO (0x06)
|
||||
#define MPI_RAID_ACTION_ENABLE_PHYS_IO (0x07)
|
||||
#define MPI_RAID_ACTION_CHANGE_VOLUME_SETTINGS (0x08)
|
||||
#define MPI_RAID_ACTION_PHYSDISK_OFFLINE (0x0A)
|
||||
#define MPI_RAID_ACTION_PHYSDISK_ONLINE (0x0B)
|
||||
#define MPI_RAID_ACTION_CHANGE_PHYSDISK_SETTINGS (0x0C)
|
||||
#define MPI_RAID_ACTION_CREATE_PHYSDISK (0x0D)
|
||||
#define MPI_RAID_ACTION_DELETE_PHYSDISK (0x0E)
|
||||
#define MPI_RAID_ACTION_FAIL_PHYSDISK (0x0F)
|
||||
#define MPI_RAID_ACTION_REPLACE_PHYSDISK (0x10)
|
||||
|
||||
/* ActionDataWord defines for use with MPI_RAID_ACTION_CREATE_VOLUME action */
|
||||
#define MPI_RAID_ACTION_ADATA_DO_NOT_SYNC (0x00000001)
|
||||
|
||||
/* ActionDataWord defines for use with MPI_RAID_ACTION_DELETE_VOLUME action */
|
||||
#define MPI_RAID_ACTION_ADATA_KEEP_PHYS_DISKS (0x00000000)
|
||||
#define MPI_RAID_ACTION_ADATA_DEL_PHYS_DISKS (0x00000001)
|
||||
|
||||
|
||||
/* RAID Action reply message */
|
||||
|
||||
typedef struct _MSG_RAID_ACTION_REPLY
|
||||
{
|
||||
U8 Action; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 VolumeID; /* 04h */
|
||||
U8 VolumeBus; /* 05h */
|
||||
U8 PhysDiskNum; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 ActionStatus; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 VolumeStatus; /* 14h */
|
||||
U32 ActionData; /* 18h */
|
||||
} MSG_RAID_ACTION_REPLY, MPI_POINTER PTR_MSG_RAID_ACTION_REPLY,
|
||||
MpiRaidActionReply_t, MPI_POINTER pMpiRaidActionReply_t;
|
||||
|
||||
|
||||
/* RAID Volume reply ActionStatus values */
|
||||
|
||||
#define MPI_RAID_ACTION_ASTATUS_SUCCESS (0x0000)
|
||||
#define MPI_RAID_ACTION_ASTATUS_INVALID_ACTION (0x0001)
|
||||
#define MPI_RAID_ACTION_ASTATUS_FAILURE (0x0002)
|
||||
#define MPI_RAID_ACTION_ASTATUS_IN_PROGRESS (0x0003)
|
||||
|
||||
|
||||
/* RAID Volume reply RAID Volume Indicator structure */
|
||||
|
||||
typedef struct _MPI_RAID_VOL_INDICATOR
|
||||
{
|
||||
U64 TotalBlocks; /* 00h */
|
||||
U64 BlocksRemaining; /* 08h */
|
||||
} MPI_RAID_VOL_INDICATOR, MPI_POINTER PTR_MPI_RAID_VOL_INDICATOR,
|
||||
MpiRaidVolIndicator_t, MPI_POINTER pMpiRaidVolIndicator_t;
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* SCSI IO RAID Passthrough Request */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_SCSI_IO_RAID_PT_REQUEST
|
||||
{
|
||||
U8 PhysDiskNum; /* 00h */
|
||||
U8 Reserved1; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 CDBLength; /* 04h */
|
||||
U8 SenseBufferLength; /* 05h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U8 LUN[8]; /* 0Ch */
|
||||
U32 Control; /* 14h */
|
||||
U8 CDB[16]; /* 18h */
|
||||
U32 DataLength; /* 28h */
|
||||
U32 SenseBufferLowAddr; /* 2Ch */
|
||||
SGE_IO_UNION SGL; /* 30h */
|
||||
} MSG_SCSI_IO_RAID_PT_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_RAID_PT_REQUEST,
|
||||
SCSIIORaidPassthroughRequest_t, MPI_POINTER pSCSIIORaidPassthroughRequest_t;
|
||||
|
||||
|
||||
/* SCSI IO RAID Passthrough reply structure */
|
||||
|
||||
typedef struct _MSG_SCSI_IO_RAID_PT_REPLY
|
||||
{
|
||||
U8 PhysDiskNum; /* 00h */
|
||||
U8 Reserved1; /* 01h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 CDBLength; /* 04h */
|
||||
U8 SenseBufferLength; /* 05h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U8 SCSIStatus; /* 0Ch */
|
||||
U8 SCSIState; /* 0Dh */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 TransferCount; /* 14h */
|
||||
U32 SenseCount; /* 18h */
|
||||
U32 ResponseInfo; /* 1Ch */
|
||||
} MSG_SCSI_IO_RAID_PT_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_RAID_PT_REPLY,
|
||||
SCSIIORaidPassthroughReply_t, MPI_POINTER pSCSIIORaidPassthroughReply_t;
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
409
sys/dev/mpt/mpilib/mpi_targ.h
Normal file
409
sys/dev/mpt/mpilib/mpi_targ.h
Normal file
@ -0,0 +1,409 @@
|
||||
/* $FreeBSD$ */
|
||||
/*
|
||||
* Copyright (c) 2000-2001 LSI Logic Corporation.
|
||||
*
|
||||
*
|
||||
* Name: MPI_TARG.H
|
||||
* Title: MPI Target mode messages and structures
|
||||
* Creation Date: June 22, 2000
|
||||
*
|
||||
* MPI Version: 01.02.04
|
||||
*
|
||||
* Version History
|
||||
* ---------------
|
||||
*
|
||||
* Date Version Description
|
||||
* -------- -------- ------------------------------------------------------
|
||||
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
|
||||
* 06-06-00 01.00.01 Update version number for 1.0 release.
|
||||
* 06-22-00 01.00.02 Added _MSG_TARGET_CMD_BUFFER_POST_REPLY structure.
|
||||
* Corrected DECSRIPTOR typo to DESCRIPTOR.
|
||||
* 11-02-00 01.01.01 Original release for post 1.0 work
|
||||
* Modified target mode to use IoIndex instead of
|
||||
* HostIndex and IocIndex. Added Alias.
|
||||
* 01-09-01 01.01.02 Added defines for TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER
|
||||
* and TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER.
|
||||
* 02-20-01 01.01.03 Started using MPI_POINTER.
|
||||
* Added structures for MPI_TARGET_SCSI_SPI_CMD_BUFFER and
|
||||
* MPI_TARGET_FCP_CMD_BUFFER.
|
||||
* 03-27-01 01.01.04 Added structure offset comments.
|
||||
* 08-08-01 01.02.01 Original release for v1.2 work.
|
||||
* 09-28-01 01.02.02 Added structure for MPI_TARGET_SCSI_SPI_STATUS_IU.
|
||||
* Added PriorityReason field to some replies and
|
||||
* defined more PriorityReason codes.
|
||||
* Added some defines for to support previous version
|
||||
* of MPI.
|
||||
* 10-04-01 01.02.03 Added PriorityReason to MSG_TARGET_ERROR_REPLY.
|
||||
* 11-01-01 01.02.04 Added define for TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY.
|
||||
* --------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef MPI_TARG_H
|
||||
#define MPI_TARG_H
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* S C S I T a r g e t M e s s a g e s
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
typedef struct _CMD_BUFFER_DESCRIPTOR
|
||||
{
|
||||
U16 IoIndex; /* 00h */
|
||||
U16 Reserved; /* 02h */
|
||||
union /* 04h */
|
||||
{
|
||||
U32 PhysicalAddress32;
|
||||
U64 PhysicalAddress64;
|
||||
} _u;
|
||||
} CMD_BUFFER_DESCRIPTOR, MPI_POINTER PTR_CMD_BUFFER_DESCRIPTOR,
|
||||
CmdBufferDescriptor_t, MPI_POINTER pCmdBufferDescriptor_t;
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* Target Command Buffer Post Request */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_TARGET_CMD_BUFFER_POST_REQUEST
|
||||
{
|
||||
U8 BufferPostFlags; /* 00h */
|
||||
U8 BufferCount; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 BufferLength; /* 04h */
|
||||
U8 Reserved; /* 05h */
|
||||
U8 Reserved1; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
CMD_BUFFER_DESCRIPTOR Buffer[1]; /* 0Ch */
|
||||
} MSG_TARGET_CMD_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REQUEST,
|
||||
TargetCmdBufferPostRequest_t, MPI_POINTER pTargetCmdBufferPostRequest_t;
|
||||
|
||||
#define CMD_BUFFER_POST_FLAGS_PORT_MASK (0x01)
|
||||
#define CMD_BUFFER_POST_FLAGS_ADDR_MODE_MASK (0x80)
|
||||
#define CMD_BUFFER_POST_FLAGS_ADDR_MODE_32 (0)
|
||||
#define CMD_BUFFER_POST_FLAGS_ADDR_MODE_64 (1)
|
||||
#define CMD_BUFFER_POST_FLAGS_64_BIT_ADDR (0x80)
|
||||
|
||||
#define CMD_BUFFER_POST_IO_INDEX_MASK (0x00003FFF)
|
||||
#define CMD_BUFFER_POST_IO_INDEX_MASK_0100 (0x000003FF) /* obsolete */
|
||||
|
||||
|
||||
typedef struct _MSG_TARGET_CMD_BUFFER_POST_REPLY
|
||||
{
|
||||
U8 BufferPostFlags; /* 00h */
|
||||
U8 BufferCount; /* 01h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U8 BufferLength; /* 04h */
|
||||
U8 Reserved; /* 05h */
|
||||
U8 Reserved1; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved2; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
} MSG_TARGET_CMD_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REPLY,
|
||||
TargetCmdBufferPostReply_t, MPI_POINTER pTargetCmdBufferPostReply_t;
|
||||
|
||||
/* the following structure is obsolete as of MPI v1.2 */
|
||||
typedef struct _MSG_PRIORITY_CMD_RECEIVED_REPLY
|
||||
{
|
||||
U16 Reserved; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved1; /* 04h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U8 PriorityReason; /* 0Ch */
|
||||
U8 Reserved3; /* 0Dh */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 ReplyWord; /* 14h */
|
||||
} MSG_PRIORITY_CMD_RECEIVED_REPLY, MPI_POINTER PTR_MSG_PRIORITY_CMD_RECEIVED_REPLY,
|
||||
PriorityCommandReceivedReply_t, MPI_POINTER pPriorityCommandReceivedReply_t;
|
||||
|
||||
#define PRIORITY_REASON_NO_DISCONNECT (0x00)
|
||||
#define PRIORITY_REASON_SCSI_TASK_MANAGEMENT (0x01)
|
||||
#define PRIORITY_REASON_CMD_PARITY_ERR (0x02)
|
||||
#define PRIORITY_REASON_MSG_OUT_PARITY_ERR (0x03)
|
||||
#define PRIORITY_REASON_LQ_CRC_ERR (0x04)
|
||||
#define PRIORITY_REASON_CMD_CRC_ERR (0x05)
|
||||
#define PRIORITY_REASON_PROTOCOL_ERR (0x06)
|
||||
#define PRIORITY_REASON_DATA_OUT_PARITY_ERR (0x07)
|
||||
#define PRIORITY_REASON_DATA_OUT_CRC_ERR (0x08)
|
||||
#define PRIORITY_REASON_UNKNOWN (0xFF)
|
||||
|
||||
|
||||
typedef struct _MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY
|
||||
{
|
||||
U16 Reserved; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved1; /* 04h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U8 PriorityReason; /* 0Ch */
|
||||
U8 Reserved3; /* 0Dh */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 ReplyWord; /* 14h */
|
||||
} MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
|
||||
MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
|
||||
TargetCmdBufferPostErrorReply_t, MPI_POINTER pTargetCmdBufferPostErrorReply_t;
|
||||
|
||||
|
||||
typedef struct _MPI_TARGET_FCP_CMD_BUFFER
|
||||
{
|
||||
U8 FcpLun[8]; /* 00h */
|
||||
U8 FcpCntl[4]; /* 08h */
|
||||
U8 FcpCdb[16]; /* 0Ch */
|
||||
U32 FcpDl; /* 1Ch */
|
||||
} MPI_TARGET_FCP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_CMD_BUFFER,
|
||||
MpiTargetFcpCmdBuffer, MPI_POINTER pMpiTargetFcpCmdBuffer;
|
||||
|
||||
|
||||
typedef struct _MPI_TARGET_SCSI_SPI_CMD_BUFFER
|
||||
{
|
||||
/* SPI L_Q information unit */
|
||||
U8 L_QType; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U16 Tag; /* 02h */
|
||||
U8 LogicalUnitNumber[8]; /* 04h */
|
||||
U32 DataLength; /* 0Ch */
|
||||
/* SPI command information unit */
|
||||
U8 ReservedFirstByteOfCommandIU; /* 10h */
|
||||
U8 TaskAttribute; /* 11h */
|
||||
U8 TaskManagementFlags; /* 12h */
|
||||
U8 AdditionalCDBLength; /* 13h */
|
||||
U8 CDB[16]; /* 14h */
|
||||
} MPI_TARGET_SCSI_SPI_CMD_BUFFER,
|
||||
MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_CMD_BUFFER,
|
||||
MpiTargetScsiSpiCmdBuffer, MPI_POINTER pMpiTargetScsiSpiCmdBuffer;
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* Target Assist Request */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_TARGET_ASSIST_REQUEST
|
||||
{
|
||||
U8 StatusCode; /* 00h */
|
||||
U8 TargetAssistFlags; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 QueueTag; /* 04h */
|
||||
U8 Reserved; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U32 ReplyWord; /* 0Ch */
|
||||
U8 LUN[8]; /* 10h */
|
||||
U32 RelativeOffset; /* 18h */
|
||||
U32 DataLength; /* 1Ch */
|
||||
SGE_IO_UNION SGL[1]; /* 20h */
|
||||
} MSG_TARGET_ASSIST_REQUEST, MPI_POINTER PTR_MSG_TARGET_ASSIST_REQUEST,
|
||||
TargetAssistRequest_t, MPI_POINTER pTargetAssistRequest_t;
|
||||
|
||||
#define TARGET_ASSIST_FLAGS_DATA_DIRECTION (0x01)
|
||||
#define TARGET_ASSIST_FLAGS_AUTO_STATUS (0x02)
|
||||
#define TARGET_ASSIST_FLAGS_HIGH_PRIORITY (0x04)
|
||||
#define TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER (0x80)
|
||||
|
||||
|
||||
typedef struct _MSG_TARGET_ERROR_REPLY
|
||||
{
|
||||
U16 Reserved; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved1; /* 04h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U8 PriorityReason; /* 0Ch */
|
||||
U8 Reserved3; /* 0Dh */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 ReplyWord; /* 14h */
|
||||
U32 TransferCount; /* 18h */
|
||||
} MSG_TARGET_ERROR_REPLY, MPI_POINTER PTR_MSG_TARGET_ERROR_REPLY,
|
||||
TargetErrorReply_t, MPI_POINTER pTargetErrorReply_t;
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* Target Status Send Request */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_TARGET_STATUS_SEND_REQUEST
|
||||
{
|
||||
U8 StatusCode; /* 00h */
|
||||
U8 StatusFlags; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 QueueTag; /* 04h */
|
||||
U8 Reserved; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U32 ReplyWord; /* 0Ch */
|
||||
U8 LUN[8]; /* 10h */
|
||||
SGE_SIMPLE_UNION StatusDataSGE; /* 18h */
|
||||
} MSG_TARGET_STATUS_SEND_REQUEST, MPI_POINTER PTR_MSG_TARGET_STATUS_SEND_REQUEST,
|
||||
TargetStatusSendRequest_t, MPI_POINTER pTargetStatusSendRequest_t;
|
||||
|
||||
#define TARGET_STATUS_SEND_FLAGS_AUTO_GOOD_STATUS (0x01)
|
||||
#define TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY (0x04)
|
||||
#define TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER (0x80)
|
||||
|
||||
typedef struct _MPI_TARGET_FCP_RSP_BUFFER
|
||||
{
|
||||
U8 Reserved0[8]; /* 00h */
|
||||
U8 FcpStatus; /* 08h */
|
||||
U8 FcpFlags; /* 09h */
|
||||
U8 Reserved1[2]; /* 0Ah */
|
||||
U32 FcpResid; /* 0Ch */
|
||||
U32 FcpSenseLength; /* 10h */
|
||||
U32 FcpResponseLength; /* 14h */
|
||||
U8 FcpResponseData[8]; /* 18h */
|
||||
U8 FcpSenseData[32]; /* Pad to 64 bytes */ /* 20h */
|
||||
} MPI_TARGET_FCP_RSP_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_RSP_BUFFER,
|
||||
MpiTargetFcpRspBuffer, MPI_POINTER pMpiTargetFcpRspBuffer;
|
||||
|
||||
typedef struct _MPI_TARGET_SCSI_SPI_STATUS_IU
|
||||
{
|
||||
U8 Reserved0; /* 00h */
|
||||
U8 Reserved1; /* 01h */
|
||||
U8 Valid; /* 02h */
|
||||
U8 Status; /* 03h */
|
||||
U32 SenseDataListLength; /* 04h */
|
||||
U32 PktFailuresListLength; /* 08h */
|
||||
U8 SenseData[52]; /* Pad the IU to 64 bytes */ /* 0Ch */
|
||||
} MPI_TARGET_SCSI_SPI_STATUS_IU, MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_STATUS_IU,
|
||||
TargetScsiSpiStatusIU_t, MPI_POINTER pTargetScsiSpiStatusIU_t;
|
||||
|
||||
/****************************************************************************/
|
||||
/* Target Mode Abort Request */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef struct _MSG_TARGET_MODE_ABORT_REQUEST
|
||||
{
|
||||
U8 AbortType; /* 00h */
|
||||
U8 Reserved; /* 01h */
|
||||
U8 ChainOffset; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved1; /* 04h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U32 ReplyWord; /* 0Ch */
|
||||
U32 MsgContextToAbort; /* 10h */
|
||||
} MSG_TARGET_MODE_ABORT, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT,
|
||||
TargetModeAbort_t, MPI_POINTER pTargetModeAbort_t;
|
||||
|
||||
#define TARGET_MODE_ABORT_TYPE_ALL_CMD_BUFFERS (0x00)
|
||||
#define TARGET_MODE_ABORT_TYPE_ALL_IO (0x01)
|
||||
#define TARGET_MODE_ABORT_TYPE_EXACT_IO (0x02)
|
||||
#define TARGET_MODE_ABORT_TYPE_EXACT_IO_REQUEST (0x03)
|
||||
|
||||
/* Target Mode Abort Reply */
|
||||
|
||||
typedef struct _MSG_TARGET_MODE_ABORT_REPLY
|
||||
{
|
||||
U16 Reserved; /* 00h */
|
||||
U8 MsgLength; /* 02h */
|
||||
U8 Function; /* 03h */
|
||||
U16 Reserved1; /* 04h */
|
||||
U8 Reserved2; /* 06h */
|
||||
U8 MsgFlags; /* 07h */
|
||||
U32 MsgContext; /* 08h */
|
||||
U16 Reserved3; /* 0Ch */
|
||||
U16 IOCStatus; /* 0Eh */
|
||||
U32 IOCLogInfo; /* 10h */
|
||||
U32 AbortCount; /* 14h */
|
||||
} MSG_TARGET_MODE_ABORT_REPLY, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT_REPLY,
|
||||
TargetModeAbortReply_t, MPI_POINTER pTargetModeAbortReply_t;
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* Target Mode Context Reply */
|
||||
/****************************************************************************/
|
||||
|
||||
#define TARGET_MODE_REPLY_IO_INDEX_MASK (0x00003FFF)
|
||||
#define TARGET_MODE_REPLY_IO_INDEX_SHIFT (0)
|
||||
#define TARGET_MODE_REPLY_INITIATOR_INDEX_MASK (0x03FFC000)
|
||||
#define TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT (14)
|
||||
#define TARGET_MODE_REPLY_ALIAS_MASK (0x0C000000)
|
||||
#define TARGET_MODE_REPLY_ALIAS_SHIFT (26)
|
||||
#define TARGET_MODE_REPLY_PORT_MASK (0x10000000)
|
||||
#define TARGET_MODE_REPLY_PORT_SHIFT (28)
|
||||
|
||||
|
||||
#define GET_IO_INDEX(x) (((x) & TARGET_MODE_REPLY_IO_INDEX_MASK) \
|
||||
>> TARGET_MODE_REPLY_IO_INDEX_SHIFT)
|
||||
|
||||
#define SET_IO_INDEX(t, i) \
|
||||
((t) = ((t) & ~TARGET_MODE_REPLY_IO_INDEX_MASK) | \
|
||||
(((i) << TARGET_MODE_REPLY_IO_INDEX_SHIFT) & \
|
||||
TARGET_MODE_REPLY_IO_INDEX_MASK))
|
||||
|
||||
#define GET_INITIATOR_INDEX(x) (((x) & TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) \
|
||||
>> TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT)
|
||||
|
||||
#define SET_INITIATOR_INDEX(t, ii) \
|
||||
((t) = ((t) & ~TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) | \
|
||||
(((ii) << TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT) & \
|
||||
TARGET_MODE_REPLY_INITIATOR_INDEX_MASK))
|
||||
|
||||
#define GET_ALIAS(x) (((x) & TARGET_MODE_REPLY_ALIAS_MASK) \
|
||||
>> TARGET_MODE_REPLY_ALIAS_SHIFT)
|
||||
|
||||
#define SET_ALIAS(t, a) ((t) = ((t) & ~TARGET_MODE_REPLY_ALIAS_MASK) | \
|
||||
(((a) << TARGET_MODE_REPLY_ALIAS_SHIFT) & \
|
||||
TARGET_MODE_REPLY_ALIAS_MASK))
|
||||
|
||||
#define GET_PORT(x) (((x) & TARGET_MODE_REPLY_PORT_MASK) \
|
||||
>> TARGET_MODE_REPLY_PORT_SHIFT)
|
||||
|
||||
#define SET_PORT(t, p) ((t) = ((t) & ~TARGET_MODE_REPLY_PORT_MASK) | \
|
||||
(((p) << TARGET_MODE_REPLY_PORT_SHIFT) & \
|
||||
TARGET_MODE_REPLY_PORT_MASK))
|
||||
|
||||
/* the following obsolete values are for MPI v1.0 support */
|
||||
#define TARGET_MODE_REPLY_0100_MASK_HOST_INDEX (0x000003FF)
|
||||
#define TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX (0)
|
||||
#define TARGET_MODE_REPLY_0100_MASK_IOC_INDEX (0x001FF800)
|
||||
#define TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX (11)
|
||||
#define TARGET_MODE_REPLY_0100_PORT_MASK (0x00400000)
|
||||
#define TARGET_MODE_REPLY_0100_PORT_SHIFT (22)
|
||||
#define TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX (0x1F800000)
|
||||
#define TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX (23)
|
||||
|
||||
#define GET_HOST_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) \
|
||||
>> TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX)
|
||||
|
||||
#define SET_HOST_INDEX_0100(t, hi) \
|
||||
((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) | \
|
||||
(((hi) << TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX) & \
|
||||
TARGET_MODE_REPLY_0100_MASK_HOST_INDEX))
|
||||
|
||||
#define GET_IOC_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) \
|
||||
>> TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX)
|
||||
|
||||
#define SET_IOC_INDEX_0100(t, ii) \
|
||||
((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) | \
|
||||
(((ii) << TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX) & \
|
||||
TARGET_MODE_REPLY_0100_MASK_IOC_INDEX))
|
||||
|
||||
#define GET_INITIATOR_INDEX_0100(x) \
|
||||
(((x) & TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) \
|
||||
>> TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX)
|
||||
|
||||
#define SET_INITIATOR_INDEX_0100(t, ii) \
|
||||
((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) | \
|
||||
(((ii) << TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX) & \
|
||||
TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX))
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
91
sys/dev/mpt/mpilib/mpi_type.h
Normal file
91
sys/dev/mpt/mpilib/mpi_type.h
Normal file
@ -0,0 +1,91 @@
|
||||
/* $FreeBSD$ */
|
||||
/*
|
||||
* Copyright (c) 2000-2001 LSI Logic Corporation.
|
||||
*
|
||||
*
|
||||
* Name: MPI_TYPE.H
|
||||
* Title: MPI Basic type definitions
|
||||
* Creation Date: June 6, 2000
|
||||
*
|
||||
* MPI Version: 01.02.01
|
||||
*
|
||||
* Version History
|
||||
* ---------------
|
||||
*
|
||||
* Date Version Description
|
||||
* -------- -------- ------------------------------------------------------
|
||||
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
|
||||
* 06-06-00 01.00.01 Update version number for 1.0 release.
|
||||
* 11-02-00 01.01.01 Original release for post 1.0 work
|
||||
* 02-20-01 01.01.02 Added define and ifdef for MPI_POINTER.
|
||||
* 08-08-01 01.02.01 Original release for v1.2 work.
|
||||
* --------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef MPI_TYPE_H
|
||||
#define MPI_TYPE_H
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Define MPI_POINTER if it hasn't already been defined. By default MPI_POINTER
|
||||
* is defined to be a near pointer. MPI_POINTER can be defined as a far pointer
|
||||
* by defining MPI_POINTER as "far *" before this header file is included.
|
||||
*/
|
||||
#ifndef MPI_POINTER
|
||||
#define MPI_POINTER *
|
||||
#endif
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
*
|
||||
* B a s i c T y p e s
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
typedef signed char S8;
|
||||
typedef unsigned char U8;
|
||||
typedef signed short S16;
|
||||
typedef unsigned short U16;
|
||||
|
||||
#if defined(unix) || defined(__arm) || defined(ALPHA) || defined(__GNUC__)
|
||||
|
||||
typedef signed int S32;
|
||||
typedef unsigned int U32;
|
||||
|
||||
#else
|
||||
|
||||
typedef signed long S32;
|
||||
typedef unsigned long U32;
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
typedef struct _S64
|
||||
{
|
||||
U32 Low;
|
||||
S32 High;
|
||||
} S64;
|
||||
|
||||
typedef struct _U64
|
||||
{
|
||||
U32 Low;
|
||||
U32 High;
|
||||
} U64;
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* Pointers */
|
||||
/****************************************************************************/
|
||||
|
||||
typedef S8 *PS8;
|
||||
typedef U8 *PU8;
|
||||
typedef S16 *PS16;
|
||||
typedef U16 *PU16;
|
||||
typedef S32 *PS32;
|
||||
typedef U32 *PU32;
|
||||
typedef S64 *PS64;
|
||||
typedef U64 *PU64;
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
694
sys/dev/mpt/mpt.c
Normal file
694
sys/dev/mpt/mpt.c
Normal file
@ -0,0 +1,694 @@
|
||||
/* $FreeBSD$ */
|
||||
/*
|
||||
* Generic routines for LSI '909 FC adapters.
|
||||
* FreeBSD Version.
|
||||
*
|
||||
* Copyright (c) 2000, 2001 by Greg Ansley
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice immediately at the beginning of the file, without modification,
|
||||
* this list of conditions, and the following disclaimer.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
/*
|
||||
* Additional Copyright (c) 2002 by Matthew Jacob under same license.
|
||||
*/
|
||||
|
||||
#include <dev/mpt/mpt_freebsd.h>
|
||||
#include <dev/mpt/mpt.h>
|
||||
#define MPT_MAX_TRYS 3
|
||||
#define MPT_MAX_WAIT 300000
|
||||
|
||||
static int maxwait_ack = 0;
|
||||
static int maxwait_int = 0;
|
||||
static int maxwait_state = 0;
|
||||
|
||||
static __inline u_int32_t mpt_rd_db(struct mpt_softc *mpt);
|
||||
static __inline u_int32_t mpt_rd_intr(struct mpt_softc *mpt);
|
||||
|
||||
static __inline u_int32_t
|
||||
mpt_rd_db(struct mpt_softc *mpt)
|
||||
{
|
||||
return mpt_read(mpt, MPT_OFFSET_DOORBELL);
|
||||
}
|
||||
|
||||
static __inline u_int32_t
|
||||
mpt_rd_intr(struct mpt_softc *mpt)
|
||||
{
|
||||
return mpt_read(mpt, MPT_OFFSET_INTR_STATUS);
|
||||
}
|
||||
|
||||
/* Busy wait for a door bell to be read by IOC */
|
||||
static int
|
||||
mpt_wait_db_ack(struct mpt_softc *mpt)
|
||||
{
|
||||
int i;
|
||||
for (i=0; i < MPT_MAX_WAIT; i++) {
|
||||
if (!MPT_DB_IS_BUSY(mpt_rd_intr(mpt))) {
|
||||
maxwait_ack = i > maxwait_ack ? i : maxwait_ack;
|
||||
return MPT_OK;
|
||||
}
|
||||
|
||||
DELAY(100);
|
||||
}
|
||||
return MPT_FAIL;
|
||||
}
|
||||
|
||||
/* Busy wait for a door bell interrupt */
|
||||
static int
|
||||
mpt_wait_db_int(struct mpt_softc *mpt)
|
||||
{
|
||||
int i;
|
||||
for (i=0; i < MPT_MAX_WAIT; i++) {
|
||||
if (MPT_DB_INTR(mpt_rd_intr(mpt))) {
|
||||
maxwait_int = i > maxwait_int ? i : maxwait_int;
|
||||
return MPT_OK;
|
||||
}
|
||||
DELAY(100);
|
||||
}
|
||||
return MPT_FAIL;
|
||||
}
|
||||
|
||||
/* Wait for IOC to transition to a give state */
|
||||
void
|
||||
mpt_check_doorbell(struct mpt_softc *mpt)
|
||||
{
|
||||
u_int32_t db = mpt_rd_db(mpt);
|
||||
if (MPT_STATE(db) != MPT_DB_STATE_RUNNING) {
|
||||
device_printf(mpt->dev, "Device not running!\n");
|
||||
mpt_print_db(db);
|
||||
}
|
||||
}
|
||||
|
||||
/* Wait for IOC to transition to a give state */
|
||||
static int
|
||||
mpt_wait_state(struct mpt_softc *mpt, enum DB_STATE_BITS state)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < MPT_MAX_WAIT; i++) {
|
||||
u_int32_t db = mpt_rd_db(mpt);
|
||||
if (MPT_STATE(db) == state) {
|
||||
maxwait_state = i > maxwait_state ? i : maxwait_state;
|
||||
return (MPT_OK);
|
||||
}
|
||||
DELAY(100);
|
||||
}
|
||||
return (MPT_FAIL);
|
||||
}
|
||||
|
||||
|
||||
/* Issue the reset COMMAND to the IOC */
|
||||
int
|
||||
mpt_soft_reset(struct mpt_softc *mpt)
|
||||
{
|
||||
if (mpt->verbose) {
|
||||
device_printf(mpt->dev,"soft reset\n");
|
||||
}
|
||||
|
||||
/* Have to use hard reset if we are not in Running state */
|
||||
if (MPT_STATE(mpt_rd_db(mpt)) != MPT_DB_STATE_RUNNING) {
|
||||
device_printf(mpt->dev,
|
||||
"soft reset failed: device not running\n");
|
||||
return MPT_FAIL;
|
||||
}
|
||||
|
||||
/* If door bell is in use we don't have a chance of getting
|
||||
* a word in since the IOC probably crashed in message
|
||||
* processing. So don't waste our time.
|
||||
*/
|
||||
if (MPT_DB_IS_IN_USE(mpt_rd_db(mpt))) {
|
||||
device_printf(mpt->dev, "soft reset failed: doorbell wedged\n");
|
||||
return MPT_FAIL;
|
||||
}
|
||||
|
||||
/* Send the reset request to the IOC */
|
||||
mpt_write(mpt, MPT_OFFSET_DOORBELL,
|
||||
MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET << MPI_DOORBELL_FUNCTION_SHIFT);
|
||||
if (mpt_wait_db_ack(mpt) != MPT_OK) {
|
||||
device_printf(mpt->dev, "soft reset failed: ack timeout\n");
|
||||
return MPT_FAIL;
|
||||
}
|
||||
|
||||
/* Wait for the IOC to reload and come out of reset state */
|
||||
if (mpt_wait_state(mpt, MPT_DB_STATE_READY) != MPT_OK) {
|
||||
device_printf(mpt->dev,
|
||||
"soft reset failed: device did not start running\n");
|
||||
return MPT_FAIL;
|
||||
}
|
||||
|
||||
return MPT_OK;
|
||||
}
|
||||
|
||||
/* This is a magic diagnostic reset that resets all the ARM
|
||||
* processors in the chip.
|
||||
*/
|
||||
void
|
||||
mpt_hard_reset(struct mpt_softc *mpt)
|
||||
{
|
||||
/* This extra read comes for the Linux source
|
||||
* released by LSI. It's function is undocumented!
|
||||
*/
|
||||
if (mpt->verbose) {
|
||||
device_printf(mpt->dev, "hard reset\n");
|
||||
}
|
||||
mpt_read(mpt, MPT_OFFSET_FUBAR);
|
||||
|
||||
/* Enable diagnostic registers */
|
||||
mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPT_DIAG_SEQUENCE_1);
|
||||
mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPT_DIAG_SEQUENCE_2);
|
||||
mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPT_DIAG_SEQUENCE_3);
|
||||
mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPT_DIAG_SEQUENCE_4);
|
||||
mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPT_DIAG_SEQUENCE_5);
|
||||
|
||||
/* Diag. port is now active so we can now hit the reset bit */
|
||||
mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, MPT_DIAG_RESET_IOC);
|
||||
|
||||
DELAY(10000);
|
||||
|
||||
/* Disable Diagnostic Register */
|
||||
mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFF);
|
||||
|
||||
/* Restore the config register values */
|
||||
/* Hard resets are known to screw up the BAR for diagnostic
|
||||
memory accesses (Mem1). */
|
||||
mpt_set_config_regs(mpt);
|
||||
if (mpt->mpt2 != NULL) {
|
||||
mpt_set_config_regs(mpt->mpt2);
|
||||
}
|
||||
|
||||
/* Note that if there is no valid firmware to run, the doorbell will
|
||||
remain in the reset state (0x00000000) */
|
||||
}
|
||||
|
||||
/*
|
||||
* Reset the IOC when needed. Try software command first then if needed
|
||||
* poke at the magic diagnostic reset. Note that a hard reset resets
|
||||
* *both* IOCs on dual function chips (FC929 && LSI1030) as well as
|
||||
* fouls up the PCI configuration registers.
|
||||
*/
|
||||
int
|
||||
mpt_reset(struct mpt_softc *mpt)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* Try a soft reset */
|
||||
if ((ret = mpt_soft_reset(mpt)) != MPT_OK) {
|
||||
/* Failed; do a hard reset */
|
||||
mpt_hard_reset(mpt);
|
||||
|
||||
/* Wait for the IOC to reload and come out of reset state */
|
||||
ret = mpt_wait_state(mpt, MPT_DB_STATE_READY);
|
||||
if (ret != MPT_OK) {
|
||||
device_printf(mpt->dev, "failed to reset device\n");
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Return a command buffer to the free queue */
|
||||
void
|
||||
mpt_free_request(struct mpt_softc *mpt, request_t *req)
|
||||
{
|
||||
if (req == NULL || req != &mpt->requests[req->index]) {
|
||||
panic("mpt_free_request bad req ptr\n");
|
||||
return;
|
||||
}
|
||||
req->ccb = NULL;
|
||||
req->debug = REQ_FREE;
|
||||
SLIST_INSERT_HEAD(&mpt->request_free_list, req, link);
|
||||
}
|
||||
|
||||
/* Get a command buffer from the free queue */
|
||||
request_t *
|
||||
mpt_get_request(struct mpt_softc *mpt)
|
||||
{
|
||||
request_t *req;
|
||||
req = SLIST_FIRST(&mpt->request_free_list);
|
||||
if (req != NULL) {
|
||||
if (req != &mpt->requests[req->index]) {
|
||||
panic("mpt_get_request: corrupted request free list\n");
|
||||
}
|
||||
if (req->ccb != NULL) {
|
||||
panic("mpt_get_request: corrupted request free list (ccb)\n");
|
||||
}
|
||||
SLIST_REMOVE_HEAD(&mpt->request_free_list, link);
|
||||
req->debug = REQ_IN_PROGRESS;
|
||||
}
|
||||
return req;
|
||||
}
|
||||
|
||||
/* Pass the command to the IOC */
|
||||
void
|
||||
mpt_send_cmd(struct mpt_softc *mpt, request_t *req)
|
||||
{
|
||||
req->sequence = mpt->sequence++;
|
||||
if (mpt->verbose > 1) {
|
||||
u_int32_t *pReq;
|
||||
pReq = req->req_vbuf;
|
||||
device_printf(mpt->dev, "Send Request %d (0x%x):\n",
|
||||
req->index, req->req_pbuf);
|
||||
device_printf(mpt->dev, "%08X %08X %08X %08X\n",
|
||||
pReq[0], pReq[1], pReq[2], pReq[3]);
|
||||
device_printf(mpt->dev, "%08X %08X %08X %08X\n",
|
||||
pReq[4], pReq[5], pReq[6], pReq[7]);
|
||||
device_printf(mpt->dev, "%08X %08X %08X %08X\n",
|
||||
pReq[8], pReq[9], pReq[10], pReq[11]);
|
||||
device_printf(mpt->dev, "%08X %08X %08X %08X\n",
|
||||
pReq[12], pReq[13], pReq[14], pReq[15]);
|
||||
}
|
||||
bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap,
|
||||
BUS_DMASYNC_PREWRITE);
|
||||
req->debug = REQ_ON_CHIP;
|
||||
mpt_write(mpt, MPT_OFFSET_REQUEST_Q, (u_int32_t) req->req_pbuf);
|
||||
}
|
||||
|
||||
/*
|
||||
* Give the reply buffer back to the IOC after we have
|
||||
* finished processing it.
|
||||
*/
|
||||
void
|
||||
mpt_free_reply(struct mpt_softc *mpt, u_int32_t ptr)
|
||||
{
|
||||
mpt_write(mpt, MPT_OFFSET_REPLY_Q, ptr);
|
||||
}
|
||||
|
||||
/* Get a reply from the IOC */
|
||||
u_int32_t
|
||||
mpt_pop_reply_queue(struct mpt_softc *mpt)
|
||||
{
|
||||
return mpt_read(mpt, MPT_OFFSET_REPLY_Q);
|
||||
}
|
||||
|
||||
/*
|
||||
* Send a command to the IOC via the handshake register.
|
||||
*
|
||||
* Only done at initialization time and for certain unusual
|
||||
* commands such as device/bus reset as specified by LSI.
|
||||
*/
|
||||
int
|
||||
mpt_send_handshake_cmd(struct mpt_softc *mpt, size_t len, void *cmd)
|
||||
{
|
||||
int i;
|
||||
u_int32_t data, *data32;
|
||||
|
||||
/* Check condition of the IOC */
|
||||
data = mpt_rd_db(mpt);
|
||||
if (((MPT_STATE(data) != MPT_DB_STATE_READY) &&
|
||||
(MPT_STATE(data) != MPT_DB_STATE_RUNNING) &&
|
||||
(MPT_STATE(data) != MPT_DB_STATE_FAULT)) ||
|
||||
( MPT_DB_IS_IN_USE(data) )) {
|
||||
device_printf(mpt->dev,
|
||||
"handshake aborted due to invalid doorbell state\n");
|
||||
mpt_print_db(data);
|
||||
return(EBUSY);
|
||||
}
|
||||
|
||||
/* We move things in 32 bit chunks */
|
||||
len = (len + 3) >> 2;
|
||||
data32 = cmd;
|
||||
|
||||
/* Clear any left over pending doorbell interupts */
|
||||
if (MPT_DB_INTR(mpt_rd_intr(mpt)))
|
||||
mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
|
||||
|
||||
/*
|
||||
* Tell the handshake reg. we are going to send a command
|
||||
* and how long it is going to be.
|
||||
*/
|
||||
data = (MPI_FUNCTION_HANDSHAKE << MPI_DOORBELL_FUNCTION_SHIFT) |
|
||||
(len << MPI_DOORBELL_ADD_DWORDS_SHIFT);
|
||||
mpt_write(mpt, MPT_OFFSET_DOORBELL, data);
|
||||
|
||||
/* Wait for the chip to notice */
|
||||
if (mpt_wait_db_int(mpt) != MPT_OK) {
|
||||
device_printf(mpt->dev, "mpt_send_handshake_cmd timeout1!\n");
|
||||
return ETIMEDOUT;
|
||||
}
|
||||
|
||||
/* Clear the interrupt */
|
||||
mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
|
||||
|
||||
if (mpt_wait_db_ack(mpt) != MPT_OK) {
|
||||
device_printf(mpt->dev, "mpt_send_handshake_cmd timeout2!\n");
|
||||
return ETIMEDOUT;
|
||||
}
|
||||
|
||||
/* Send the command */
|
||||
for (i = 0; i < len; i++) {
|
||||
mpt_write(mpt, MPT_OFFSET_DOORBELL, *data32++);
|
||||
if (mpt_wait_db_ack(mpt) != MPT_OK) {
|
||||
device_printf(mpt->dev,
|
||||
"mpt_send_handshake_cmd timeout! index = %d\n", i);
|
||||
return ETIMEDOUT;
|
||||
}
|
||||
}
|
||||
return MPT_OK;
|
||||
}
|
||||
|
||||
/* Get the response from the handshake register */
|
||||
int
|
||||
mpt_recv_handshake_reply(struct mpt_softc *mpt, size_t reply_len, void *reply)
|
||||
{
|
||||
int left, reply_left;
|
||||
u_int16_t *data16;
|
||||
MSG_DEFAULT_REPLY *hdr;
|
||||
|
||||
/* We move things out in 16 bit chunks */
|
||||
reply_len >>= 1;
|
||||
data16 = (u_int16_t *)reply;
|
||||
|
||||
hdr = (MSG_DEFAULT_REPLY *)reply;
|
||||
|
||||
/* Get first word */
|
||||
if (mpt_wait_db_int(mpt) != MPT_OK) {
|
||||
device_printf(mpt->dev, "mpt_recv_handshake_cmd timeout1!\n");
|
||||
return ETIMEDOUT;
|
||||
}
|
||||
*data16++ = mpt_read(mpt, MPT_OFFSET_DOORBELL) & MPT_DB_DATA_MASK;
|
||||
mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
|
||||
|
||||
/* Get Second Word */
|
||||
if (mpt_wait_db_int(mpt) != MPT_OK) {
|
||||
device_printf(mpt->dev, "mpt_recv_handshake_cmd timeout2!\n");
|
||||
return ETIMEDOUT;
|
||||
}
|
||||
*data16++ = mpt_read(mpt, MPT_OFFSET_DOORBELL) & MPT_DB_DATA_MASK;
|
||||
mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
|
||||
|
||||
/* With the second word, we can now look at the length */
|
||||
if (mpt->verbose > 1 && ((reply_len >> 1) != hdr->MsgLength)) {
|
||||
device_printf(mpt->dev,
|
||||
"reply length does not match message length: "
|
||||
"got 0x%02x, expected 0x%02x\n",
|
||||
hdr->MsgLength << 2, reply_len << 1);
|
||||
}
|
||||
|
||||
/* Get rest of the reply; but don't overflow the provided buffer */
|
||||
left = (hdr->MsgLength << 1) - 2;
|
||||
reply_left = reply_len - 2;
|
||||
while (left--) {
|
||||
u_int16_t datum;
|
||||
|
||||
if (mpt_wait_db_int(mpt) != MPT_OK) {
|
||||
device_printf(mpt->dev,
|
||||
"mpt_recv_handshake_cmd timeout3!\n");
|
||||
return ETIMEDOUT;
|
||||
}
|
||||
datum = mpt_read(mpt, MPT_OFFSET_DOORBELL);
|
||||
|
||||
if (reply_left-- > 0)
|
||||
*data16++ = datum & MPT_DB_DATA_MASK;
|
||||
|
||||
mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
|
||||
}
|
||||
|
||||
/* One more wait & clear at the end */
|
||||
if (mpt_wait_db_int(mpt) != MPT_OK) {
|
||||
device_printf(mpt->dev, "mpt_recv_handshake_cmd timeout4!\n");
|
||||
return ETIMEDOUT;
|
||||
}
|
||||
mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
|
||||
|
||||
if ((hdr->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
|
||||
if (mpt->verbose > 1)
|
||||
mpt_print_reply(hdr);
|
||||
return (MPT_FAIL | hdr->IOCStatus);
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/* Get API statistics from the chip */
|
||||
static int
|
||||
mpt_get_iocfacts(struct mpt_softc *mpt, MSG_IOC_FACTS_REPLY *freplp)
|
||||
{
|
||||
MSG_IOC_FACTS f_req;
|
||||
int error;
|
||||
|
||||
bzero(&f_req, sizeof f_req);
|
||||
f_req.Function = MPI_FUNCTION_IOC_FACTS;
|
||||
f_req.MsgContext = 0x12071942;
|
||||
error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req);
|
||||
if (error)
|
||||
return(error);
|
||||
error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp);
|
||||
return (error);
|
||||
}
|
||||
|
||||
/*
|
||||
* Send the initialization request. This is where we specify how many
|
||||
* SCSI busses and how many devices per bus we wish to emulate.
|
||||
* This is also the command that specifies the max size of the reply
|
||||
* frames from the IOC that we will be allocating.
|
||||
*/
|
||||
static int
|
||||
mpt_send_ioc_init(struct mpt_softc *mpt, u_int32_t who)
|
||||
{
|
||||
int error = 0;
|
||||
MSG_IOC_INIT init;
|
||||
MSG_IOC_INIT_REPLY reply;
|
||||
|
||||
bzero(&init, sizeof init);
|
||||
init.WhoInit = who;
|
||||
init.Function = MPI_FUNCTION_IOC_INIT;
|
||||
if (mpt->is_fc) {
|
||||
init.MaxDevices = 255;
|
||||
} else {
|
||||
init.MaxDevices = 16;
|
||||
}
|
||||
init.MaxBuses = 1;
|
||||
init.ReplyFrameSize = MPT_REPLY_SIZE;
|
||||
init.MsgContext = 0x12071941;
|
||||
|
||||
if ((error = mpt_send_handshake_cmd(mpt, sizeof init, &init)) != 0) {
|
||||
return(error);
|
||||
}
|
||||
|
||||
error = mpt_recv_handshake_reply(mpt, sizeof reply, &reply);
|
||||
return (error);
|
||||
}
|
||||
|
||||
/* Send the port enable to allow the IOC to join the FC loop */
|
||||
static int
|
||||
mpt_send_port_enable(struct mpt_softc *mpt, int port)
|
||||
{
|
||||
int count;
|
||||
request_t *req;
|
||||
MSG_PORT_ENABLE *enable_req;
|
||||
|
||||
req = mpt_get_request(mpt);
|
||||
|
||||
enable_req = req->req_vbuf;
|
||||
bzero(enable_req, sizeof *enable_req);
|
||||
|
||||
enable_req->Function = MPI_FUNCTION_PORT_ENABLE;
|
||||
enable_req->MsgContext = req->index | 0x80000000;
|
||||
enable_req->PortNumber = port;
|
||||
|
||||
mpt_check_doorbell(mpt);
|
||||
if (mpt->verbose > 1) {
|
||||
device_printf(mpt->dev, "enabling port %d\n", port);
|
||||
}
|
||||
mpt_send_cmd(mpt, req);
|
||||
|
||||
count = 0;
|
||||
do {
|
||||
DELAY(500);
|
||||
mpt_intr(mpt);
|
||||
if (++count == 1000) {
|
||||
device_printf(mpt->dev, "port enable timed out\n");
|
||||
return (-1);
|
||||
}
|
||||
} while (req->debug == REQ_ON_CHIP);
|
||||
mpt_free_request(mpt, req);
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Enable/Disable asynchronous event reporting.
|
||||
*
|
||||
* NB: this is the first command we send via shared memory
|
||||
* instead of the handshake register.
|
||||
*/
|
||||
static int
|
||||
mpt_send_event_request(struct mpt_softc *mpt, int onoff)
|
||||
{
|
||||
request_t *req;
|
||||
MSG_EVENT_NOTIFY *enable_req;
|
||||
|
||||
req = mpt_get_request(mpt);
|
||||
|
||||
enable_req = req->req_vbuf;
|
||||
bzero(enable_req, sizeof *enable_req);
|
||||
|
||||
enable_req->Function = MPI_FUNCTION_EVENT_NOTIFICATION;
|
||||
enable_req->MsgContext = req->index | 0x80000000;
|
||||
enable_req->Switch = onoff;
|
||||
|
||||
mpt_check_doorbell(mpt);
|
||||
if (mpt->verbose > 1) {
|
||||
device_printf(mpt->dev, "%sabling async events\n",
|
||||
onoff? "en" : "dis");
|
||||
}
|
||||
mpt_send_cmd(mpt, req);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Un-mask the interupts on the chip.
|
||||
*/
|
||||
void
|
||||
mpt_enable_ints(struct mpt_softc *mpt)
|
||||
{
|
||||
/* Unmask every thing except door bell int */
|
||||
mpt_write(mpt, MPT_OFFSET_INTR_MASK, MPT_INTR_DB_MASK);
|
||||
}
|
||||
|
||||
/*
|
||||
* Mask the interupts on the chip.
|
||||
*/
|
||||
void
|
||||
mpt_disable_ints(struct mpt_softc *mpt)
|
||||
{
|
||||
/* Mask all interrupts */
|
||||
mpt_write(mpt, MPT_OFFSET_INTR_MASK,
|
||||
MPT_INTR_REPLY_MASK | MPT_INTR_DB_MASK);
|
||||
}
|
||||
|
||||
/* (Re)Initialize the chip for use */
|
||||
int
|
||||
mpt_init(struct mpt_softc *mpt, u_int32_t who)
|
||||
{
|
||||
int try;
|
||||
MSG_IOC_FACTS_REPLY facts;
|
||||
u_int32_t pptr;
|
||||
int val;
|
||||
|
||||
/* Put all request buffers (back) on the free list */
|
||||
SLIST_INIT(&mpt->request_free_list);
|
||||
for (val = 0; val < MPT_MAX_REQUESTS; val++) {
|
||||
mpt_free_request(mpt, &mpt->requests[val]);
|
||||
}
|
||||
|
||||
if (mpt->verbose > 1) {
|
||||
device_printf(mpt->dev, "doorbell req = %s\n",
|
||||
mpt_ioc_diag(mpt_read(mpt, MPT_OFFSET_DOORBELL)));
|
||||
}
|
||||
|
||||
/*
|
||||
* Start by making sure we're not at FAULT or RESET state
|
||||
*/
|
||||
switch (mpt_rd_db(mpt) & MPT_DB_STATE_MASK) {
|
||||
case MPT_DB_STATE_RESET:
|
||||
case MPT_DB_STATE_FAULT:
|
||||
if (mpt_reset(mpt) != MPT_OK) {
|
||||
return (EIO);
|
||||
}
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
for (try = 0; try < MPT_MAX_TRYS; try++) {
|
||||
/*
|
||||
* No need to reset if the IOC is already in the READY state.
|
||||
*
|
||||
* Force reset if initialization failed previously.
|
||||
* Note that a hard_reset of the second channel of a '929
|
||||
* will stop operation of the first channel. Hopefully, if the
|
||||
* first channel is ok, the second will not require a hard
|
||||
* reset.
|
||||
*/
|
||||
if ((mpt_rd_db(mpt) & MPT_DB_STATE_MASK) !=
|
||||
MPT_DB_STATE_READY) {
|
||||
if (mpt_reset(mpt) != MPT_OK) {
|
||||
DELAY(10000);
|
||||
continue;
|
||||
}
|
||||
}
|
||||
|
||||
if (mpt_get_iocfacts(mpt, &facts) != MPT_OK) {
|
||||
device_printf(mpt->dev, "mpt_get_iocfacts failed\n");
|
||||
continue;
|
||||
} else if (mpt->verbose > 1) {
|
||||
device_printf(mpt->dev,
|
||||
"mpt_get_iocfacts: GlobalCredits=%d BlockSize=%u "
|
||||
"Request Frame Size %u\n", facts.GlobalCredits,
|
||||
facts.BlockSize, facts.RequestFrameSize);
|
||||
}
|
||||
mpt->mpt_global_credits = facts.GlobalCredits;
|
||||
mpt->blk_size = facts.BlockSize;
|
||||
mpt->request_frame_size = facts.RequestFrameSize;
|
||||
|
||||
if (mpt_send_ioc_init(mpt, who) != MPT_OK) {
|
||||
device_printf(mpt->dev, "mpt_send_ioc_init failed\n");
|
||||
continue;
|
||||
} else if (mpt->verbose > 1) {
|
||||
device_printf(mpt->dev, "mpt_send_ioc_init ok\n");
|
||||
}
|
||||
|
||||
if (mpt_wait_state(mpt, MPT_DB_STATE_RUNNING) != MPT_OK) {
|
||||
device_printf(mpt->dev,
|
||||
"IOC failed to go to run state\n");
|
||||
continue;
|
||||
} else if (mpt->verbose > 1) {
|
||||
device_printf(mpt->dev, "IOC now at RUNSTATE\n");
|
||||
}
|
||||
|
||||
/*
|
||||
* Give it reply buffers
|
||||
*
|
||||
* Do *not* except global credits.
|
||||
*/
|
||||
for (val = 0, pptr = mpt->reply_phys;
|
||||
(pptr + MPT_REPLY_SIZE) < (mpt->reply_phys + PAGE_SIZE);
|
||||
pptr += MPT_REPLY_SIZE) {
|
||||
mpt_free_reply(mpt, pptr);
|
||||
if (++val == mpt->mpt_global_credits - 1)
|
||||
break;
|
||||
}
|
||||
|
||||
mpt_send_event_request(mpt, 1);
|
||||
|
||||
if (mpt_send_port_enable(mpt, 0) != MPT_OK) {
|
||||
device_printf(mpt->dev, "failed to enable port 0\n");
|
||||
continue;
|
||||
} else if (mpt->verbose > 1) {
|
||||
device_printf(mpt->dev, "enabled port 0\n");
|
||||
}
|
||||
|
||||
/* Everything worked */
|
||||
break;
|
||||
}
|
||||
|
||||
if (try >= MPT_MAX_TRYS) {
|
||||
device_printf(mpt->dev, "failed to initialize IOC\n");
|
||||
return (EIO);
|
||||
}
|
||||
|
||||
if (mpt->verbose > 1) {
|
||||
device_printf(mpt->dev, "enabling interrupts\n");
|
||||
}
|
||||
|
||||
mpt_enable_ints(mpt);
|
||||
return (0);
|
||||
}
|
||||
187
sys/dev/mpt/mpt.h
Normal file
187
sys/dev/mpt/mpt.h
Normal file
@ -0,0 +1,187 @@
|
||||
/* $FreeBSD$ */
|
||||
/*
|
||||
* Generic defines for LSI '909 FC adapters.
|
||||
* FreeBSD Version.
|
||||
*
|
||||
* Copyright (c) 2000, 2001 by Greg Ansley
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice immediately at the beginning of the file, without modification,
|
||||
* this list of conditions, and the following disclaimer.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
/*
|
||||
* Additional Copyright (c) 2002 by Matthew Jacob under same license.
|
||||
*/
|
||||
|
||||
#ifndef _MPT_H_
|
||||
#define _MPT_H_
|
||||
#include <dev/mpt/mpt_freebsd.h>
|
||||
#define MPT_OK (0)
|
||||
#define MPT_FAIL (0x10000)
|
||||
|
||||
/* Register Offset to chip registers */
|
||||
#define MPT_OFFSET_DOORBELL 0x00
|
||||
#define MPT_OFFSET_SEQUENCE 0x04
|
||||
#define MPT_OFFSET_DIAGNOSTIC 0x08
|
||||
#define MPT_OFFSET_TEST 0x0C
|
||||
#define MPT_OFFSET_INTR_STATUS 0x30
|
||||
#define MPT_OFFSET_INTR_MASK 0x34
|
||||
#define MPT_OFFSET_REQUEST_Q 0x40
|
||||
#define MPT_OFFSET_REPLY_Q 0x44
|
||||
#define MPT_OFFSET_HOST_INDEX 0x50
|
||||
#define MPT_OFFSET_FUBAR 0x90
|
||||
|
||||
#define MPT_DIAG_SEQUENCE_1 0x04
|
||||
#define MPT_DIAG_SEQUENCE_2 0x0b
|
||||
#define MPT_DIAG_SEQUENCE_3 0x02
|
||||
#define MPT_DIAG_SEQUENCE_4 0x07
|
||||
#define MPT_DIAG_SEQUENCE_5 0x0d
|
||||
|
||||
/* Bit Maps for DOORBELL register */
|
||||
enum DB_STATE_BITS {
|
||||
MPT_DB_STATE_RESET = 0x00000000,
|
||||
MPT_DB_STATE_READY = 0x10000000,
|
||||
MPT_DB_STATE_RUNNING = 0x20000000,
|
||||
MPT_DB_STATE_FAULT = 0x40000000,
|
||||
MPT_DB_STATE_MASK = 0xf0000000
|
||||
};
|
||||
|
||||
#define MPT_STATE(v) ((enum DB_STATE_BITS)((v) & MPT_DB_STATE_MASK))
|
||||
|
||||
#define MPT_DB_LENGTH_SHIFT (16)
|
||||
#define MPT_DB_DATA_MASK (0xffff)
|
||||
|
||||
#define MPT_DB_DB_USED 0x08000000
|
||||
#define MPT_DB_IS_IN_USE(v) (((v) & MPT_DB_DB_USED) != 0)
|
||||
|
||||
/*
|
||||
* "Whom" initializor values
|
||||
*/
|
||||
#define MPT_DB_INIT_NOONE 0x00
|
||||
#define MPT_DB_INIT_BIOS 0x01
|
||||
#define MPT_DB_INIT_ROMBIOS 0x02
|
||||
#define MPT_DB_INIT_PCIPEER 0x03
|
||||
#define MPT_DB_INIT_HOST 0x04
|
||||
#define MPT_DB_INIT_MANUFACTURE 0x05
|
||||
|
||||
#define MPT_WHO(v) \
|
||||
((v & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT)
|
||||
|
||||
/* Function Maps for DOORBELL register */
|
||||
enum DB_FUNCTION_BITS {
|
||||
MPT_FUNC_IOC_RESET = 0x40000000,
|
||||
MPT_FUNC_UNIT_RESET = 0x41000000,
|
||||
MPT_FUNC_HANDSHAKE = 0x42000000,
|
||||
MPT_FUNC_REPLY_REMOVE = 0x43000000,
|
||||
MPT_FUNC_MASK = 0xff000000
|
||||
};
|
||||
|
||||
/* Function Maps for INTERRUPT request register */
|
||||
enum _MPT_INTR_REQ_BITS {
|
||||
MPT_INTR_DB_BUSY = 0x80000000,
|
||||
MPT_INTR_REPLY_READY = 0x00000008,
|
||||
MPT_INTR_DB_READY = 0x00000001
|
||||
};
|
||||
|
||||
#define MPT_DB_IS_BUSY(v) (((v) & MPT_INTR_DB_BUSY) != 0)
|
||||
#define MPT_DB_INTR(v) (((v) & MPT_INTR_DB_READY) != 0)
|
||||
#define MPT_REPLY_INTR(v) (((v) & MPT_INTR_REPLY_READY) != 0)
|
||||
|
||||
/* Function Maps for INTERRUPT make register */
|
||||
enum _MPT_INTR_MASK_BITS {
|
||||
MPT_INTR_REPLY_MASK = 0x00000008,
|
||||
MPT_INTR_DB_MASK = 0x00000001
|
||||
};
|
||||
|
||||
/* Function Maps for DIAGNOSTIC make register */
|
||||
enum _MPT_DIAG_BITS {
|
||||
MPT_DIAG_ENABLED = 0x00000080,
|
||||
MPT_DIAG_FLASHBAD = 0x00000040,
|
||||
MPT_DIAG_RESET_HIST = 0x00000020,
|
||||
MPT_DIAG_TTLI = 0x00000008,
|
||||
MPT_DIAG_RESET_IOC = 0x00000004,
|
||||
MPT_DIAG_ARM_DISABLE = 0x00000002,
|
||||
MPT_DIAG_DME = 0x00000001
|
||||
};
|
||||
|
||||
/* Magic addresses in diagnostic memory space */
|
||||
#define MPT_DIAG_IOP_BASE (0x00000000)
|
||||
#define MPT_DIAG_IOP_SIZE (0x00002000)
|
||||
#define MPT_DIAG_GPIO (0x00030010)
|
||||
#define MPT_DIAG_IOPQ_REG_BASE0 (0x00050004)
|
||||
#define MPT_DIAG_IOPQ_REG_BASE1 (0x00051004)
|
||||
#define MPT_DIAG_MEM_CFG_BASE (0x00040000)
|
||||
#define MPT_DIAG_CTX0_BASE (0x000E0000)
|
||||
#define MPT_DIAG_CTX0_SIZE (0x00002000)
|
||||
#define MPT_DIAG_CTX1_BASE (0x001E0000)
|
||||
#define MPT_DIAG_CTX1_SIZE (0x00002000)
|
||||
#define MPT_DIAG_FLASH_BASE (0x00800000)
|
||||
#define MPT_DIAG_RAM_BASE (0x01000000)
|
||||
#define MPT_DIAG_RAM_SIZE (0x00400000)
|
||||
|
||||
/* GPIO bit assignments */
|
||||
#define MPT_DIAG_GPIO_SCL (0x00010000)
|
||||
#define MPT_DIAG_GPIO_SDA_OUT (0x00008000)
|
||||
#define MPT_DIAG_GPIO_SDA_IN (0x00004000)
|
||||
|
||||
#define MPT_REPLY_EMPTY (0xffffffff) /* Reply Queue Empty Symbol */
|
||||
#define MPT_CONTEXT_REPLY (0x80000000)
|
||||
#define MPT_CONTEXT_MASK (~0xE0000000)
|
||||
|
||||
#include "dev/mpt/mpilib/mpi_type.h"
|
||||
#include "dev/mpt/mpilib/mpi.h"
|
||||
#include "dev/mpt/mpilib/mpi_cnfg.h"
|
||||
#include "dev/mpt/mpilib/mpi_fc.h"
|
||||
#include "dev/mpt/mpilib/mpi_init.h"
|
||||
#include "dev/mpt/mpilib/mpi_ioc.h"
|
||||
#include "dev/mpt/mpilib/mpi_lan.h"
|
||||
#include "dev/mpt/mpilib/mpi_targ.h"
|
||||
|
||||
#ifdef _KERNEL
|
||||
int mpt_soft_reset(struct mpt_softc *mpt);
|
||||
void mpt_hard_reset(struct mpt_softc *mpt);
|
||||
int mpt_recv_handshake_reply(struct mpt_softc *mpt, size_t reply_len, void *reply);
|
||||
|
||||
|
||||
void mpt_send_cmd(struct mpt_softc *mpt, request_t *req);
|
||||
void mpt_free_reply(struct mpt_softc *mpt, u_int32_t ptr);
|
||||
void mpt_enable_ints(struct mpt_softc *mpt);
|
||||
void mpt_disable_ints(struct mpt_softc *mpt);
|
||||
u_int32_t mpt_pop_reply_queue(struct mpt_softc *mpt);
|
||||
int mpt_init(struct mpt_softc *mpt, u_int32_t who);
|
||||
int mpt_reset(struct mpt_softc *mpt);
|
||||
int mpt_send_handshake_cmd(struct mpt_softc *mpt, size_t len, void *cmd);
|
||||
request_t * mpt_get_request(struct mpt_softc *mpt);
|
||||
void mpt_free_request(struct mpt_softc *mpt, request_t *req);
|
||||
int mpt_intr(void *dummy);
|
||||
void mpt_check_doorbell(struct mpt_softc* mpt);
|
||||
|
||||
/* mpt_debug.c functions */
|
||||
void mpt_print_reply(void *vmsg);
|
||||
void mpt_print_db(u_int32_t mb);
|
||||
void mpt_print_config_reply(void *vmsg);
|
||||
char *mpt_ioc_diag(u_int32_t diag);
|
||||
char *mpt_req_state(enum mpt_req_state state);
|
||||
void mpt_print_scsi_io_request(MSG_SCSI_IO_REQUEST *msg);
|
||||
void mpt_print_config_request(void *vmsg);
|
||||
void mpt_print_request(void *vmsg);
|
||||
#endif /* _KERNEL */
|
||||
|
||||
#endif /* _MPT_H_ */
|
||||
594
sys/dev/mpt/mpt_debug.c
Normal file
594
sys/dev/mpt/mpt_debug.c
Normal file
@ -0,0 +1,594 @@
|
||||
/* $FreeBSD$ */
|
||||
/*
|
||||
* Debug routines for LSI '909 FC adapters.
|
||||
* FreeBSD Version.
|
||||
*
|
||||
* Copyright (c) 2000, 2001 by Greg Ansley
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice immediately at the beginning of the file, without modification,
|
||||
* this list of conditions, and the following disclaimer.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
/*
|
||||
* Additional Copyright (c) 2002 by Matthew Jacob under same license.
|
||||
*/
|
||||
|
||||
#include <dev/mpt/mpt.h>
|
||||
|
||||
struct Error_Map {
|
||||
int Error_Code;
|
||||
char *Error_String;
|
||||
};
|
||||
|
||||
static const struct Error_Map IOC_Status[] = {
|
||||
{ MPI_IOCSTATUS_SUCCESS, "Success" },
|
||||
{ MPI_IOCSTATUS_INVALID_FUNCTION, "IOC: Invalid Function" },
|
||||
{ MPI_IOCSTATUS_BUSY, "IOC: Busy" },
|
||||
{ MPI_IOCSTATUS_INVALID_SGL, "IOC: Invalid SGL" },
|
||||
{ MPI_IOCSTATUS_INTERNAL_ERROR, "IOC: Internal Error" },
|
||||
{ MPI_IOCSTATUS_RESERVED, "IOC: Reserved" },
|
||||
{ MPI_IOCSTATUS_INSUFFICIENT_RESOURCES, "IOC: Insufficient Resources" },
|
||||
{ MPI_IOCSTATUS_INVALID_FIELD, "IOC: Invalid Field" },
|
||||
{ MPI_IOCSTATUS_INVALID_STATE, "IOC: Invalid State" },
|
||||
{ MPI_IOCSTATUS_CONFIG_INVALID_ACTION, "Invalid Action" },
|
||||
{ MPI_IOCSTATUS_CONFIG_INVALID_TYPE, "Invalid Type" },
|
||||
{ MPI_IOCSTATUS_CONFIG_INVALID_PAGE, "Invalid Page" },
|
||||
{ MPI_IOCSTATUS_CONFIG_INVALID_DATA, "Invalid Data" },
|
||||
{ MPI_IOCSTATUS_CONFIG_NO_DEFAULTS, "No Defaults" },
|
||||
{ MPI_IOCSTATUS_CONFIG_CANT_COMMIT, "Can't Commit" },
|
||||
{ MPI_IOCSTATUS_SCSI_RECOVERED_ERROR, "SCSI: Recoverd Error" },
|
||||
{ MPI_IOCSTATUS_SCSI_INVALID_BUS, "SCSI: Invalid Bus" },
|
||||
{ MPI_IOCSTATUS_SCSI_INVALID_TARGETID, "SCSI: Invalid Target ID" },
|
||||
{ MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE, "SCSI: Device Not There" },
|
||||
{ MPI_IOCSTATUS_SCSI_DATA_OVERRUN, "SCSI: Data Overrun" },
|
||||
{ MPI_IOCSTATUS_SCSI_DATA_UNDERRUN, "SCSI: Data Underrun" },
|
||||
{ MPI_IOCSTATUS_SCSI_IO_DATA_ERROR, "SCSI: Data Error" },
|
||||
{ MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR, "SCSI: Protocol Error" },
|
||||
{ MPI_IOCSTATUS_SCSI_TASK_TERMINATED, "SCSI: Task Terminated" },
|
||||
{ MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH, "SCSI: Residual Mismatch" },
|
||||
{ MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED, "SCSI: Task Management Failed" },
|
||||
{ MPI_IOCSTATUS_SCSI_IOC_TERMINATED, "SCSI: IOC Bus Reset" },
|
||||
{ MPI_IOCSTATUS_SCSI_EXT_TERMINATED, "SCSI: External Bus Reset" },
|
||||
{ MPI_IOCSTATUS_TARGET_PRIORITY_IO, "SCSI Target: Priority I/O" },
|
||||
{ MPI_IOCSTATUS_TARGET_INVALID_PORT, "SCSI Target: Invalid Port" },
|
||||
{ MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX, "SCSI Target: Invalid IOC Index" },
|
||||
{ MPI_IOCSTATUS_TARGET_ABORTED, "SCSI Target: Aborted" },
|
||||
{ MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE, "SCSI Target: No Connection (Retryable)" },
|
||||
{ MPI_IOCSTATUS_TARGET_NO_CONNECTION, "SCSI Target: No Connection" },
|
||||
{ MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH,"SCSI Target: Transfer Count Mismatch" },
|
||||
{ MPI_IOCSTATUS_TARGET_FC_ABORTED, "FC: Aborted" },
|
||||
{ MPI_IOCSTATUS_TARGET_FC_RX_ID_INVALID, "FC: Recieve ID Invalid" },
|
||||
{ MPI_IOCSTATUS_TARGET_FC_DID_INVALID, "FC: Recieve DID Invalid" },
|
||||
{ MPI_IOCSTATUS_TARGET_FC_NODE_LOGGED_OUT,"FC: Node Logged Out" },
|
||||
{ MPI_IOCSTATUS_LAN_DEVICE_NOT_FOUND, "LAN: Device Not Found" },
|
||||
{ MPI_IOCSTATUS_LAN_DEVICE_FAILURE, "LAN: Device Not Failure" },
|
||||
{ MPI_IOCSTATUS_LAN_TRANSMIT_ERROR, "LAN: Transmit Error" },
|
||||
{ MPI_IOCSTATUS_LAN_TRANSMIT_ABORTED, "LAN: Transmit Aborted" },
|
||||
{ MPI_IOCSTATUS_LAN_RECEIVE_ERROR, "LAN: Recieve Error" },
|
||||
{ MPI_IOCSTATUS_LAN_RECEIVE_ABORTED, "LAN: Recieve Aborted" },
|
||||
{ MPI_IOCSTATUS_LAN_PARTIAL_PACKET, "LAN: Partial Packet" },
|
||||
{ MPI_IOCSTATUS_LAN_CANCELED, "LAN: Canceled" },
|
||||
{ -1, 0},
|
||||
};
|
||||
|
||||
static const struct Error_Map IOC_Func[] = {
|
||||
{ MPI_FUNCTION_SCSI_IO_REQUEST, "SCSI IO Request" },
|
||||
{ MPI_FUNCTION_SCSI_TASK_MGMT, "SCSI Task Management" },
|
||||
{ MPI_FUNCTION_IOC_INIT, "IOC Init" },
|
||||
{ MPI_FUNCTION_IOC_FACTS, "IOC Facts" },
|
||||
{ MPI_FUNCTION_CONFIG, "Config" },
|
||||
{ MPI_FUNCTION_PORT_FACTS, "Port Facts" },
|
||||
{ MPI_FUNCTION_PORT_ENABLE, "Port Enable" },
|
||||
{ MPI_FUNCTION_EVENT_NOTIFICATION, "Event Notification" },
|
||||
{ MPI_FUNCTION_FW_DOWNLOAD, "FW Download" },
|
||||
{ MPI_FUNCTION_TARGET_CMD_BUFFER_POST, "SCSI Target Command Buffer" },
|
||||
{ MPI_FUNCTION_TARGET_ASSIST, "Target Assist" },
|
||||
{ MPI_FUNCTION_TARGET_STATUS_SEND, "Target Status Send" },
|
||||
{ MPI_FUNCTION_TARGET_MODE_ABORT, "Target Mode Abort" },
|
||||
{ MPI_FUNCTION_TARGET_FC_BUF_POST_LINK_SRVC, "FC: Link Service Buffers" },
|
||||
{ MPI_FUNCTION_TARGET_FC_RSP_LINK_SRVC, "FC: Link Service Response" },
|
||||
{ MPI_FUNCTION_TARGET_FC_EX_SEND_LINK_SRVC, "FC: Send Extended Link Service" },
|
||||
{ MPI_FUNCTION_TARGET_FC_ABORT, "FC: Abort" },
|
||||
{ MPI_FUNCTION_LAN_SEND, "LAN Send" },
|
||||
{ MPI_FUNCTION_LAN_RECEIVE, "LAN Recieve" },
|
||||
{ MPI_FUNCTION_LAN_RESET, "LAN Reset" },
|
||||
{ -1, 0},
|
||||
};
|
||||
|
||||
static const struct Error_Map IOC_Event[] = {
|
||||
{ MPI_EVENT_NONE, "None" },
|
||||
{ MPI_EVENT_LOG_DATA, "LogData" },
|
||||
{ MPI_EVENT_STATE_CHANGE, "State Change" },
|
||||
{ MPI_EVENT_UNIT_ATTENTION, "Unit Attention" },
|
||||
{ MPI_EVENT_IOC_BUS_RESET, "IOC Bus Reset" },
|
||||
{ MPI_EVENT_EXT_BUS_RESET, "External Bus Reset" },
|
||||
{ MPI_EVENT_RESCAN, "Rescan" },
|
||||
{ MPI_EVENT_LINK_STATUS_CHANGE, "Link Status Change" },
|
||||
{ MPI_EVENT_LOOP_STATE_CHANGE, "Loop State Change" },
|
||||
{ MPI_EVENT_LOGOUT, "Logout" },
|
||||
{ MPI_EVENT_EVENT_CHANGE, "EventChange" },
|
||||
{ -1, 0},
|
||||
};
|
||||
|
||||
static const struct Error_Map IOC_SCSIState[] = {
|
||||
{ MPI_SCSI_STATE_AUTOSENSE_VALID, "AutoSense_Valid" },
|
||||
{ MPI_SCSI_STATE_AUTOSENSE_FAILED, "AutoSense_Failed" },
|
||||
{ MPI_SCSI_STATE_NO_SCSI_STATUS, "No_SCSI_Status" },
|
||||
{ MPI_SCSI_STATE_TERMINATED, "State_Terminated" },
|
||||
{ MPI_SCSI_STATE_RESPONSE_INFO_VALID, "Repsonse_Info_Valid" },
|
||||
{ MPI_SCSI_STATE_QUEUE_TAG_REJECTED, "Queue Tag Rejected" },
|
||||
{ -1, 0},
|
||||
};
|
||||
|
||||
static const struct Error_Map IOC_SCSIStatus[] = {
|
||||
{ SCSI_STATUS_OK, "OK" },
|
||||
{ SCSI_STATUS_CHECK_COND, "Check Condition" },
|
||||
{ SCSI_STATUS_COND_MET, "Check Condition Met" },
|
||||
{ SCSI_STATUS_BUSY, "Busy" },
|
||||
{ SCSI_STATUS_INTERMED, "Intermidiate Condition" },
|
||||
{ SCSI_STATUS_INTERMED_COND_MET, "Intermidiate Condition Met" },
|
||||
{ SCSI_STATUS_RESERV_CONFLICT, "Reservation Conflict" },
|
||||
{ SCSI_STATUS_CMD_TERMINATED, "Command Terminated" },
|
||||
{ SCSI_STATUS_QUEUE_FULL, "Queue Full" },
|
||||
{ -1, 0},
|
||||
};
|
||||
|
||||
static const struct Error_Map IOC_Diag[] = {
|
||||
{ MPT_DIAG_ENABLED, "DWE" },
|
||||
{ MPT_DIAG_FLASHBAD, "FLASH_Bad" },
|
||||
{ MPT_DIAG_TTLI, "TTLI" },
|
||||
{ MPT_DIAG_RESET_IOC, "Reset" },
|
||||
{ MPT_DIAG_ARM_DISABLE, "DisARM" },
|
||||
{ MPT_DIAG_DME, "DME" },
|
||||
{ -1, 0 },
|
||||
};
|
||||
|
||||
|
||||
static void mpt_dump_sgl(SGE_IO_UNION *sgl);
|
||||
|
||||
static char *
|
||||
mpt_ioc_status(int code)
|
||||
{
|
||||
const struct Error_Map *status = IOC_Status;
|
||||
static char buf[64];
|
||||
while (status->Error_Code >= 0) {
|
||||
if (status->Error_Code == (code & MPI_IOCSTATUS_MASK))
|
||||
return status->Error_String;
|
||||
status++;
|
||||
}
|
||||
snprintf(buf, sizeof buf, "Unknown (0x%08x)", code);
|
||||
return buf;
|
||||
}
|
||||
|
||||
char *
|
||||
mpt_ioc_diag(u_int32_t code)
|
||||
{
|
||||
const struct Error_Map *status = IOC_Diag;
|
||||
static char buf[128];
|
||||
char *ptr = buf;
|
||||
char *end = &buf[128];
|
||||
buf[0] = '\0';
|
||||
ptr += snprintf(buf, sizeof buf, "(0x%08x)", code);
|
||||
while (status->Error_Code >= 0) {
|
||||
if ((status->Error_Code & code) != 0)
|
||||
ptr += snprintf(ptr, (size_t)(end-ptr), "%s ",
|
||||
status->Error_String);
|
||||
status++;
|
||||
}
|
||||
return buf;
|
||||
}
|
||||
|
||||
static char *
|
||||
mpt_ioc_function(int code)
|
||||
{
|
||||
const struct Error_Map *status = IOC_Func;
|
||||
static char buf[64];
|
||||
while (status->Error_Code >= 0) {
|
||||
if (status->Error_Code == code)
|
||||
return status->Error_String;
|
||||
status++;
|
||||
}
|
||||
snprintf(buf, sizeof buf, "Unknown (0x%08x)", code);
|
||||
return buf;
|
||||
}
|
||||
static char *
|
||||
mpt_ioc_event(int code)
|
||||
{
|
||||
const struct Error_Map *status = IOC_Event;
|
||||
static char buf[64];
|
||||
while (status->Error_Code >= 0) {
|
||||
if (status->Error_Code == code)
|
||||
return status->Error_String;
|
||||
status++;
|
||||
}
|
||||
snprintf(buf, sizeof buf, "Unknown (0x%08x)", code);
|
||||
return buf;
|
||||
}
|
||||
static char *
|
||||
mpt_scsi_state(int code)
|
||||
{
|
||||
const struct Error_Map *status = IOC_SCSIState;
|
||||
static char buf[128];
|
||||
char *ptr = buf;
|
||||
char *end = &buf[128];
|
||||
buf[0] = '\0';
|
||||
ptr += snprintf(buf, sizeof buf, "(0x%08x)", code);
|
||||
while (status->Error_Code >= 0) {
|
||||
if ((status->Error_Code & code) != 0)
|
||||
ptr += snprintf(ptr, (size_t)(end-ptr), "%s ",
|
||||
status->Error_String);
|
||||
status++;
|
||||
}
|
||||
return buf;
|
||||
}
|
||||
static char *
|
||||
mpt_scsi_status(int code)
|
||||
{
|
||||
const struct Error_Map *status = IOC_SCSIStatus;
|
||||
static char buf[64];
|
||||
while (status->Error_Code >= 0) {
|
||||
if (status->Error_Code == code)
|
||||
return status->Error_String;
|
||||
status++;
|
||||
}
|
||||
snprintf(buf, sizeof buf, "Unknown (0x%08x)", code);
|
||||
return buf;
|
||||
}
|
||||
static char *
|
||||
mpt_who(int who_init)
|
||||
{
|
||||
char *who;
|
||||
|
||||
switch (who_init) {
|
||||
case MPT_DB_INIT_NOONE: who = "No One"; break;
|
||||
case MPT_DB_INIT_BIOS: who = "BIOS"; break;
|
||||
case MPT_DB_INIT_ROMBIOS: who = "ROM BIOS"; break;
|
||||
case MPT_DB_INIT_PCIPEER: who = "PCI Peer"; break;
|
||||
case MPT_DB_INIT_HOST: who = "Host Driver"; break;
|
||||
case MPT_DB_INIT_MANUFACTURE: who = "Manufacturing"; break;
|
||||
default: who = "Unknown"; break;
|
||||
}
|
||||
return who;
|
||||
}
|
||||
|
||||
static char *
|
||||
mpt_state(u_int32_t mb)
|
||||
{
|
||||
char *text;
|
||||
|
||||
switch (MPT_STATE(mb)) {
|
||||
case MPT_DB_STATE_RESET: text = "Reset"; break;
|
||||
case MPT_DB_STATE_READY: text = "Ready"; break;
|
||||
case MPT_DB_STATE_RUNNING:text = "Running"; break;
|
||||
case MPT_DB_STATE_FAULT: text = "Fault"; break;
|
||||
default: text = "Unknown"; break;
|
||||
}
|
||||
return text;
|
||||
};
|
||||
|
||||
void
|
||||
mpt_print_db(u_int32_t mb)
|
||||
{
|
||||
printf("mpt mailbox: (0x%x) State %s WhoInit %s\n",
|
||||
mb, mpt_state(mb), mpt_who(MPT_WHO(mb)));
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Reply functions */
|
||||
/*****************************************************************************/
|
||||
static void
|
||||
mpt_print_reply_hdr(MSG_DEFAULT_REPLY *msg)
|
||||
{
|
||||
printf("%s Reply @ %p\n", mpt_ioc_function(msg->Function), msg);
|
||||
printf("\tIOC Status %s\n", mpt_ioc_status(msg->IOCStatus));
|
||||
printf("\tIOCLogInfo 0x%08x\n", msg->IOCLogInfo);
|
||||
printf("\tMsgLength 0x%02x\n", msg->MsgLength);
|
||||
printf("\tMsgFlags 0x%02x\n", msg->MsgFlags);
|
||||
printf("\tMsgContext 0x%08x\n", msg->MsgContext);
|
||||
}
|
||||
|
||||
static void
|
||||
mpt_print_init_reply(MSG_IOC_INIT_REPLY *msg)
|
||||
{
|
||||
mpt_print_reply_hdr((MSG_DEFAULT_REPLY *)msg);
|
||||
printf("\tWhoInit %s\n", mpt_who(msg->WhoInit));
|
||||
printf("\tMaxDevices 0x%02x\n", msg->MaxDevices);
|
||||
printf("\tMaxBuses 0x%02x\n", msg->MaxBuses);
|
||||
}
|
||||
|
||||
static void
|
||||
mpt_print_ioc_facts(MSG_IOC_FACTS_REPLY *msg)
|
||||
{
|
||||
mpt_print_reply_hdr((MSG_DEFAULT_REPLY *)msg);
|
||||
printf("\tIOCNumber %d\n", msg->IOCNumber);
|
||||
printf("\tMaxChainDepth %d\n", msg->MaxChainDepth);
|
||||
printf("\tWhoInit %s\n", mpt_who(msg->WhoInit));
|
||||
printf("\tBlockSize %d\n", msg->BlockSize);
|
||||
printf("\tFlags %d\n", msg->Flags);
|
||||
printf("\tReplyQueueDepth %d\n", msg->ReplyQueueDepth);
|
||||
printf("\tReqFrameSize 0x%04x\n", msg->RequestFrameSize);
|
||||
printf("\tFW Version 0x%04x\n", msg->FWVersion);
|
||||
printf("\tProduct ID 0x%04x\n", msg->ProductID);
|
||||
printf("\tCredits 0x%04x\n", msg->GlobalCredits);
|
||||
printf("\tPorts %d\n", msg->NumberOfPorts);
|
||||
printf("\tEventState 0x%02x\n", msg->EventState);
|
||||
printf("\tHostMFA_HA 0x%08x\n", msg->CurrentHostMfaHighAddr);
|
||||
printf("\tSenseBuf_HA 0x%08x\n",
|
||||
msg->CurrentSenseBufferHighAddr);
|
||||
printf("\tRepFrameSize 0x%04x\n", msg->CurReplyFrameSize);
|
||||
printf("\tMaxDevices 0x%02x\n", msg->MaxDevices);
|
||||
printf("\tMaxBuses 0x%02x\n", msg->MaxBuses);
|
||||
printf("\tFWImageSize 0x%04x\n", msg->FWImageSize);
|
||||
}
|
||||
|
||||
static void
|
||||
mpt_print_enable_reply(MSG_PORT_ENABLE_REPLY *msg)
|
||||
{
|
||||
mpt_print_reply_hdr((MSG_DEFAULT_REPLY *)msg);
|
||||
printf("\tPort: %d\n", msg->PortNumber);
|
||||
}
|
||||
|
||||
static void
|
||||
mpt_print_scsi_io_reply(MSG_SCSI_IO_REPLY *msg)
|
||||
{
|
||||
mpt_print_reply_hdr((MSG_DEFAULT_REPLY *)msg);
|
||||
printf("\tBus: %d\n", msg->Bus);
|
||||
printf("\tTargetID %d\n", msg->TargetID);
|
||||
printf("\tCDBLength %d\n", msg->CDBLength);
|
||||
printf("\tSCSI Status: %s\n", mpt_scsi_status(msg->SCSIStatus));
|
||||
printf("\tSCSI State: %s\n", mpt_scsi_state(msg->SCSIState));
|
||||
printf("\tTransferCnt 0x%04x\n", msg->TransferCount);
|
||||
printf("\tSenseCnt 0x%04x\n", msg->SenseCount);
|
||||
printf("\tResponseInfo 0x%08x\n", msg->ResponseInfo);
|
||||
}
|
||||
|
||||
|
||||
|
||||
static void
|
||||
mpt_print_event_notice(MSG_EVENT_NOTIFY_REPLY *msg)
|
||||
{
|
||||
mpt_print_reply_hdr((MSG_DEFAULT_REPLY *)msg);
|
||||
printf("\tEvent: %s\n", mpt_ioc_event(msg->Event));
|
||||
printf("\tEventContext 0x%04x\n", msg->EventContext);
|
||||
printf("\tAckRequired %d\n", msg->AckRequired);
|
||||
printf("\tEventDataLength %d\n", msg->EventDataLength);
|
||||
printf("\tContinuation %d\n", msg->MsgFlags & 0x80);
|
||||
switch(msg->Event) {
|
||||
case MPI_EVENT_LOG_DATA:
|
||||
printf("\tEvtLogData: 0x%04x\n", msg->Data[0]);
|
||||
break;
|
||||
|
||||
case MPI_EVENT_UNIT_ATTENTION:
|
||||
printf("\tTargetID: 0x%04x\n",
|
||||
msg->Data[0] & 0xff);
|
||||
printf("\tBus: 0x%04x\n",
|
||||
(msg->Data[0] >> 8) & 0xff);
|
||||
break;
|
||||
|
||||
case MPI_EVENT_IOC_BUS_RESET:
|
||||
case MPI_EVENT_EXT_BUS_RESET:
|
||||
case MPI_EVENT_RESCAN:
|
||||
printf("\tPort: %d\n",
|
||||
(msg->Data[0] >> 8) & 0xff);
|
||||
break;
|
||||
|
||||
case MPI_EVENT_LINK_STATUS_CHANGE:
|
||||
printf("\tLinkState: %d\n",
|
||||
msg->Data[0] & 0xff);
|
||||
printf("\tPort: %d\n",
|
||||
(msg->Data[1] >> 8) & 0xff);
|
||||
break;
|
||||
|
||||
case MPI_EVENT_LOOP_STATE_CHANGE:
|
||||
printf("\tType: %d\n",
|
||||
(msg->Data[0] >> 16) & 0xff);
|
||||
printf("\tChar3: 0x%02x\n",
|
||||
(msg->Data[0] >> 8) & 0xff);
|
||||
printf("\tChar4: 0x%02x\n",
|
||||
(msg->Data[0] ) & 0xff);
|
||||
printf("\tPort: %d\n",
|
||||
(msg->Data[1] >> 8) & 0xff);
|
||||
break;
|
||||
|
||||
case MPI_EVENT_LOGOUT:
|
||||
printf("\tN_PortId: 0x%04x\n", msg->Data[0]);
|
||||
printf("\tPort: %d\n",
|
||||
(msg->Data[1] >> 8) & 0xff);
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void
|
||||
mpt_print_reply(void *vmsg)
|
||||
{
|
||||
MSG_DEFAULT_REPLY *msg = vmsg;
|
||||
|
||||
switch (msg->Function) {
|
||||
case MPI_FUNCTION_EVENT_NOTIFICATION:
|
||||
mpt_print_event_notice((MSG_EVENT_NOTIFY_REPLY *)msg);
|
||||
break;
|
||||
case MPI_FUNCTION_PORT_ENABLE:
|
||||
mpt_print_enable_reply((MSG_PORT_ENABLE_REPLY *)msg);
|
||||
break;
|
||||
case MPI_FUNCTION_IOC_FACTS:
|
||||
mpt_print_ioc_facts((MSG_IOC_FACTS_REPLY *)msg);
|
||||
break;
|
||||
case MPI_FUNCTION_IOC_INIT:
|
||||
mpt_print_init_reply((MSG_IOC_INIT_REPLY *)msg);
|
||||
break;
|
||||
case MPI_FUNCTION_SCSI_IO_REQUEST:
|
||||
mpt_print_scsi_io_reply((MSG_SCSI_IO_REPLY *)msg);
|
||||
break;
|
||||
default:
|
||||
mpt_print_reply_hdr((MSG_DEFAULT_REPLY *)msg);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Request functions */
|
||||
/*****************************************************************************/
|
||||
static void
|
||||
mpt_print_request_hdr(MSG_REQUEST_HEADER *req)
|
||||
{
|
||||
printf("%s @ %p\n", mpt_ioc_function(req->Function), req);
|
||||
printf("\tChain Offset 0x%02x\n", req->ChainOffset);
|
||||
printf("\tMsgFlags 0x%02x\n", req->MsgFlags);
|
||||
printf("\tMsgContext 0x%08x\n", req->MsgContext);
|
||||
}
|
||||
|
||||
void
|
||||
mpt_print_scsi_io_request(MSG_SCSI_IO_REQUEST *orig_msg)
|
||||
{
|
||||
MSG_SCSI_IO_REQUEST local, *msg = &local;
|
||||
int i;
|
||||
|
||||
bcopy(orig_msg, msg, sizeof (MSG_SCSI_IO_REQUEST));
|
||||
mpt_print_request_hdr((MSG_REQUEST_HEADER *)msg);
|
||||
printf("\tBus: %d\n", msg->Bus);
|
||||
printf("\tTargetID %d\n", msg->TargetID);
|
||||
printf("\tSenseBufferLength %d\n", msg->SenseBufferLength);
|
||||
printf("\tLUN: 0x%0x\n", msg->LUN[1]);
|
||||
printf("\tControl 0x%08x ", msg->Control);
|
||||
#define MPI_PRINT_FIELD(x) \
|
||||
case MPI_SCSIIO_CONTROL_ ## x : \
|
||||
printf(" " #x " "); \
|
||||
break
|
||||
|
||||
switch (msg->Control & MPI_SCSIIO_CONTROL_DATADIRECTION_MASK) {
|
||||
MPI_PRINT_FIELD(NODATATRANSFER);
|
||||
MPI_PRINT_FIELD(WRITE);
|
||||
MPI_PRINT_FIELD(READ);
|
||||
default:
|
||||
printf(" Invalid DIR! ");
|
||||
break;
|
||||
}
|
||||
switch (msg->Control & MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK) {
|
||||
MPI_PRINT_FIELD(SIMPLEQ);
|
||||
MPI_PRINT_FIELD(HEADOFQ);
|
||||
MPI_PRINT_FIELD(ORDEREDQ);
|
||||
MPI_PRINT_FIELD(ACAQ);
|
||||
MPI_PRINT_FIELD(UNTAGGED);
|
||||
MPI_PRINT_FIELD(NO_DISCONNECT);
|
||||
default:
|
||||
printf(" Unknown attribute! ");
|
||||
break;
|
||||
}
|
||||
|
||||
printf("\n");
|
||||
#undef MPI_PRINT_FIELD
|
||||
|
||||
printf("\tDataLength\t0x%08x\n", msg->DataLength);
|
||||
printf("\tSenseBufAddr\t0x%08x\n", msg->SenseBufferLowAddr);
|
||||
printf("\tCDB[0:%d]\t", msg->CDBLength);
|
||||
for (i = 0; i < msg->CDBLength; i++)
|
||||
printf("%02x ", msg->CDB[i]);
|
||||
printf("\n");
|
||||
mpt_dump_sgl(&orig_msg->SGL);
|
||||
}
|
||||
|
||||
void
|
||||
mpt_print_request(void *vreq)
|
||||
{
|
||||
MSG_REQUEST_HEADER *req = vreq;
|
||||
|
||||
switch (req->Function) {
|
||||
case MPI_FUNCTION_SCSI_IO_REQUEST:
|
||||
mpt_print_scsi_io_request((MSG_SCSI_IO_REQUEST *)req);
|
||||
break;
|
||||
default:
|
||||
mpt_print_request_hdr(req);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
char *
|
||||
mpt_req_state(enum mpt_req_state state)
|
||||
{
|
||||
char *text;
|
||||
|
||||
switch (state) {
|
||||
case REQ_FREE: text = "Free"; break;
|
||||
case REQ_IN_PROGRESS: text = "In Progress"; break;
|
||||
case REQ_ON_CHIP: text = "On Chip"; break;
|
||||
case REQ_TIMEOUT: text = "Timeout"; break;
|
||||
default: text = "Unknown"; break;
|
||||
}
|
||||
return text;
|
||||
};
|
||||
|
||||
static void
|
||||
mpt_dump_sgl(SGE_IO_UNION *su)
|
||||
{
|
||||
SGE_SIMPLE32 *se = (SGE_SIMPLE32 *) su;
|
||||
int iCount, flags;
|
||||
|
||||
iCount = MPT_SGL_MAX;
|
||||
do {
|
||||
int iprt;
|
||||
|
||||
printf("\t");
|
||||
flags = MPI_SGE_GET_FLAGS(se->FlagsLength);
|
||||
switch (flags & MPI_SGE_FLAGS_ELEMENT_MASK) {
|
||||
case MPI_SGE_FLAGS_SIMPLE_ELEMENT:
|
||||
{
|
||||
printf("SE32 %p: Addr=0x%0x FlagsLength=0x%0x\n",
|
||||
se, se->Address, se->FlagsLength);
|
||||
printf(" ");
|
||||
break;
|
||||
}
|
||||
case MPI_SGE_FLAGS_CHAIN_ELEMENT:
|
||||
{
|
||||
SGE_CHAIN32 *ce = (SGE_CHAIN32 *) se;
|
||||
printf("CE32 %p: Addr=0x%0x NxtChnO=0x%x Flgs=0x%x "
|
||||
"Len=0x%0x\n", ce, ce->Address, ce->NextChainOffset,
|
||||
ce->Flags, ce->Length);
|
||||
flags = 0;
|
||||
break;
|
||||
}
|
||||
case MPI_SGE_FLAGS_TRANSACTION_ELEMENT:
|
||||
printf("TE32 @ %p\n", se);
|
||||
flags = 0;
|
||||
break;
|
||||
}
|
||||
iprt = 0;
|
||||
#define MPT_PRINT_FLAG(x) \
|
||||
if (flags & MPI_SGE_FLAGS_ ## x ) { \
|
||||
if (iprt == 0) { \
|
||||
printf("\t"); \
|
||||
} \
|
||||
printf(" "); \
|
||||
printf( #x ); \
|
||||
iprt++; \
|
||||
}
|
||||
MPT_PRINT_FLAG(LOCAL_ADDRESS);
|
||||
MPT_PRINT_FLAG(HOST_TO_IOC);
|
||||
MPT_PRINT_FLAG(64_BIT_ADDRESSING);
|
||||
MPT_PRINT_FLAG(LAST_ELEMENT);
|
||||
MPT_PRINT_FLAG(END_OF_BUFFER);
|
||||
MPT_PRINT_FLAG(END_OF_LIST);
|
||||
#undef MPT_PRINT_FLAG
|
||||
if (iprt)
|
||||
printf("\n");
|
||||
se++;
|
||||
iCount -= 1;
|
||||
} while ((flags & MPI_SGE_FLAGS_END_OF_LIST) == 0 && iCount != 0);
|
||||
}
|
||||
1223
sys/dev/mpt/mpt_freebsd.c
Normal file
1223
sys/dev/mpt/mpt_freebsd.c
Normal file
File diff suppressed because it is too large
Load Diff
235
sys/dev/mpt/mpt_freebsd.h
Normal file
235
sys/dev/mpt/mpt_freebsd.h
Normal file
@ -0,0 +1,235 @@
|
||||
/* $FreeBSD$ */
|
||||
/*
|
||||
* LSI MPT Host Adapter FreeBSD Wrapper Definitions (CAM version)
|
||||
*
|
||||
* Copyright (c) 2000, 2001 by Greg Ansley, Adam Prewett
|
||||
*
|
||||
* Partially derived from Matty Jacobs ISP driver.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice immediately at the beginning of the file, without modification,
|
||||
* this list of conditions, and the following disclaimer.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
*/
|
||||
/*
|
||||
* Additional Copyright (c) 2002 by Matthew Jacob under same license.
|
||||
*/
|
||||
|
||||
#ifndef _MPT_FREEBSD_H_
|
||||
#define _MPT_FREEBSD_H_
|
||||
#include <sys/ioccom.h>
|
||||
|
||||
#ifdef _KERNEL
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/queue.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/proc.h>
|
||||
#include <sys/bus.h>
|
||||
|
||||
#include <machine/bus_memio.h>
|
||||
#include <machine/bus_pio.h>
|
||||
#include <machine/bus.h>
|
||||
#include <machine/clock.h>
|
||||
#include <machine/cpu.h>
|
||||
|
||||
#include <cam/cam.h>
|
||||
#include <cam/cam_debug.h>
|
||||
#include <cam/cam_ccb.h>
|
||||
#include <cam/cam_sim.h>
|
||||
#include <cam/cam_xpt.h>
|
||||
#include <cam/cam_xpt_sim.h>
|
||||
#include <cam/cam_debug.h>
|
||||
#include <cam/scsi/scsi_all.h>
|
||||
#include <cam/scsi/scsi_message.h>
|
||||
#include "opt_ddb.h"
|
||||
#define INLINE __inline
|
||||
|
||||
/* Max MPT Reply we are willing to accept (must be power of 2) */
|
||||
#define MPT_REPLY_SIZE 128
|
||||
|
||||
#define MPT_MAX_REQUESTS 256 /* XXX: should be derived from GlobalCredits */
|
||||
#define MPT_REQUEST_AREA 512
|
||||
#define MPT_SENSE_SIZE 32 /* included in MPT_REQUEST_SIZE */
|
||||
#define MPT_REQ_MEM_SIZE (MPT_MAX_REQUESTS * MPT_REQUEST_AREA)
|
||||
|
||||
/*
|
||||
* We cannot tell prior to getting IOC facts how big the IOC's request
|
||||
* area is. Because of this we cannot tell at compile time how many
|
||||
* simple SG elements we can fit within an IOC request prior to having
|
||||
* to put in a chain element.
|
||||
*
|
||||
* Experimentally we know that the Ultra4 parts have a 96 byte request
|
||||
* element size and the Fibre Channel units have a 144 byte request
|
||||
* element size. Therefore, if we have 512-32 (== 480) bytes of request
|
||||
* area to play with, we have room for between 3 and 5 request sized
|
||||
* regions- the first of which is the command plus a simple SG list,
|
||||
* the rest of which are chained continuation SG lists. Given that the
|
||||
* normal request we use is 48 bytes w/o the first SG element, we can
|
||||
* assume we have 480-48 == 432 bytes to have simple SG elements and/or
|
||||
* chain elements. If we assume 32 bit addressing, this works out to
|
||||
* 54 SG or chain elements. If we assume 5 chain elements, then we have
|
||||
* a maximum of 49 seperate actual SG segments.
|
||||
*/
|
||||
|
||||
#define MPT_SGL_MAX 49
|
||||
|
||||
#define MPT_RQSL(mpt) (mpt->request_frame_size << 2)
|
||||
#define MPT_NSGL(mpt) (MPT_RQSL(mpt) / sizeof (SGE_SIMPLE32))
|
||||
|
||||
#define MPT_NSGL_FIRST(mpt) \
|
||||
(((mpt->request_frame_size << 2) - \
|
||||
sizeof (MSG_SCSI_IO_REQUEST) - \
|
||||
sizeof (SGE_IO_UNION)) / sizeof (SGE_SIMPLE32))
|
||||
|
||||
/*
|
||||
* Convert a physical address returned from IOC to kvm address
|
||||
* needed to access the data.
|
||||
*/
|
||||
#define MPT_REPLY_PTOV(m, x) \
|
||||
((void *)(m->reply + ((x << 1) - (u_int32_t)(m->reply_phys))))
|
||||
|
||||
#define ccb_mpt_ptr sim_priv.entries[0].ptr
|
||||
#define ccb_req_ptr sim_priv.entries[1].ptr
|
||||
|
||||
enum mpt_req_state {
|
||||
REQ_FREE, REQ_IN_PROGRESS, REQ_TIMEOUT, REQ_ON_CHIP, REQ_DONE
|
||||
};
|
||||
typedef struct req_entry {
|
||||
u_int16_t index; /* Index of this entry */
|
||||
union ccb *ccb; /* Request that generated this command */
|
||||
void *req_vbuf; /* Virtual Address of Entry */
|
||||
void *sense_vbuf; /* Virtual Address of sense data */
|
||||
u_int32_t req_pbuf; /* Physical Address of Entry */
|
||||
u_int32_t sense_pbuf; /* Physical Address of sense data */
|
||||
bus_dmamap_t dmap; /* DMA map for data buffer */
|
||||
SLIST_ENTRY(req_entry) link; /* Pointer to next in list */
|
||||
enum mpt_req_state debug; /* Debuging */
|
||||
u_int32_t sequence; /* Sequence Number */
|
||||
|
||||
} request_t;
|
||||
|
||||
|
||||
/* Structure for saving proper values for modifyable PCI configuration registers */
|
||||
struct mpt_pci_cfg {
|
||||
u_int16_t Command;
|
||||
u_int16_t LatencyTimer_LineSize;
|
||||
u_int32_t IO_BAR;
|
||||
u_int32_t Mem0_BAR[2];
|
||||
u_int32_t Mem1_BAR[2];
|
||||
u_int32_t ROM_BAR;
|
||||
u_int8_t IntLine;
|
||||
u_int32_t PMCSR;
|
||||
};
|
||||
|
||||
struct mpt_softc {
|
||||
device_t dev;
|
||||
int unit;
|
||||
struct mtx lock;
|
||||
|
||||
/* Operational flags, set during initialization */
|
||||
int verbose; /* print debug messages */
|
||||
|
||||
struct resource *pci_irq; /* Interrupt map for chip */
|
||||
void *ih; /* Interupt handle */
|
||||
|
||||
/* First Memory Region (Device MEM) */
|
||||
struct resource *pci_reg; /* Register map for chip */
|
||||
int pci_reg_id; /* Resource ID */
|
||||
bus_space_tag_t pci_st; /* Bus tag for registers */
|
||||
bus_space_handle_t pci_sh; /* Bus handle for registers */
|
||||
vm_offset_t pci_pa; /* Physical Address */
|
||||
|
||||
/* Second Memory Region (Diagnostic memory window) */
|
||||
/* (only used for diagnostic purposes) */
|
||||
struct resource *pci_mem; /* Register map for chip */
|
||||
int pci_mem_id; /* Resource ID */
|
||||
bus_space_tag_t pci_mst; /* Bus tag for registers */
|
||||
bus_space_handle_t pci_msh; /* Bus handle for registers */
|
||||
|
||||
/* DMA Memory for IOCTLs */
|
||||
void *ioctl_mem_va; /* Virtual Addr */
|
||||
u_int32_t ioctl_mem_pa; /* Physical Addr */
|
||||
bus_dmamap_t ioctl_mem_map; /* DMA map for buffer */
|
||||
bus_dma_tag_t ioctl_mem_tag; /* DMA tag for memory alloc */
|
||||
int open; /* only allow one open at a time */
|
||||
|
||||
bus_dma_tag_t parent_dmat; /* DMA tag for parent PCI bus */
|
||||
|
||||
bus_dma_tag_t reply_dmat; /* DMA tag for reply memory */
|
||||
bus_dmamap_t reply_dmap; /* DMA map for reply memory */
|
||||
char *reply; /* Virtual address of reply memory */
|
||||
u_int32_t reply_phys; /* Physical address of reply memory */
|
||||
|
||||
u_int32_t
|
||||
: 29,
|
||||
disabled : 1,
|
||||
is_fc : 1,
|
||||
bus : 1; /* FC929/1030 have two busses */
|
||||
|
||||
u_int32_t blk_size; /* Block size transfers to IOC */
|
||||
u_int16_t mpt_global_credits;
|
||||
u_int16_t request_frame_size;
|
||||
|
||||
bus_dma_tag_t buffer_dmat; /* DMA tag for mapping data buffers */
|
||||
|
||||
bus_dma_tag_t request_dmat; /* DMA tag for request memroy */
|
||||
bus_dmamap_t request_dmap; /* DMA map for request memroy */
|
||||
char *request; /* Virtual address of Request memory */
|
||||
u_int32_t request_phys; /* Physical address of Request memory */
|
||||
|
||||
request_t requests[MPT_MAX_REQUESTS];
|
||||
SLIST_HEAD(req_queue, req_entry) request_free_list;
|
||||
|
||||
struct cam_sim *sim;
|
||||
struct cam_path *path;
|
||||
|
||||
u_int32_t sequence; /* Sequence Number */
|
||||
u_int32_t timeouts; /* timeout count */
|
||||
u_int32_t success; /* timeout successes afer timeout */
|
||||
|
||||
/* Opposing port in a 929, or NULL */
|
||||
struct mpt_softc *mpt2;
|
||||
|
||||
/* Saved values for the PCI configuration registers */
|
||||
struct mpt_pci_cfg pci_cfg;
|
||||
};
|
||||
|
||||
static INLINE void
|
||||
mpt_write(struct mpt_softc *mpt, size_t offset, u_int32_t val)
|
||||
{
|
||||
bus_space_write_4(mpt->pci_st, mpt->pci_sh, offset, val);
|
||||
}
|
||||
|
||||
static INLINE u_int32_t
|
||||
mpt_read(struct mpt_softc *mpt, int offset)
|
||||
{
|
||||
return bus_space_read_4(mpt->pci_st, mpt->pci_sh, offset);
|
||||
}
|
||||
|
||||
void mpt_cam_attach(struct mpt_softc *mpt);
|
||||
void mpt_cam_detach(struct mpt_softc *mpt);
|
||||
void mpt_done(struct mpt_softc *mpt, u_int32_t reply);
|
||||
void mpt_notify(struct mpt_softc *mpt, void *vmsg);
|
||||
|
||||
/* mpt_pci.c declarations */
|
||||
void mpt_set_config_regs(struct mpt_softc *mpt);
|
||||
|
||||
#endif /*_KERNEL */
|
||||
#endif /* _MPT_FREEBSD_H */
|
||||
638
sys/dev/mpt/mpt_pci.c
Normal file
638
sys/dev/mpt/mpt_pci.c
Normal file
@ -0,0 +1,638 @@
|
||||
/* $FreeBSD$ */
|
||||
/*
|
||||
* PCI specific probe and attach routines for LSI '909 FC adapters.
|
||||
* FreeBSD Version.
|
||||
*
|
||||
* Copyright (c) 2000, 2001 by Greg Ansley
|
||||
* Partially derived from Matt Jacob's ISP driver.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice immediately at the beginning of the file, without modification,
|
||||
* this list of conditions, and the following disclaimer.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
/*
|
||||
* Additional Copyright (c) 2002 by Matthew Jacob under same license.
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/conf.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/mbuf.h>
|
||||
#include <sys/module.h>
|
||||
#include <pci/pcireg.h>
|
||||
#include <pci/pcivar.h>
|
||||
|
||||
#include <machine/bus_memio.h>
|
||||
#include <machine/bus_pio.h>
|
||||
#include <machine/bus.h>
|
||||
#include <machine/resource.h>
|
||||
#include <sys/rman.h>
|
||||
|
||||
#include <dev/mpt/mpt.h>
|
||||
#include <dev/mpt/mpt_freebsd.h>
|
||||
|
||||
#ifndef PCI_VENDOR_LSI
|
||||
#define PCI_VENDOR_LSI 0x1000
|
||||
#endif
|
||||
|
||||
#ifndef PCI_PRODUCT_LSI_FC909
|
||||
#define PCI_PRODUCT_LSI_FC909 0x0620
|
||||
#endif
|
||||
|
||||
#ifndef PCI_PRODUCT_LSI_FC929
|
||||
#define PCI_PRODUCT_LSI_FC929 0x0622
|
||||
#endif
|
||||
|
||||
#ifndef PCI_PRODUCT_LSI_1030
|
||||
#define PCI_PRODUCT_LSI_1030 0x0030
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#define MEM_MAP_REG 0x14
|
||||
#define MEM_MAP_SRAM 0x1C
|
||||
|
||||
static int mpt_probe(device_t);
|
||||
static int mpt_attach(device_t);
|
||||
static void mpt_free_bus_resources(struct mpt_softc *mpt);
|
||||
static int mpt_detach(device_t);
|
||||
static int mpt_shutdown(device_t);
|
||||
static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
|
||||
static void mpt_dma_mem_free(struct mpt_softc *mpt);
|
||||
static void mpt_read_config_regs(struct mpt_softc *mpt);
|
||||
|
||||
static device_method_t mpt_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, mpt_probe),
|
||||
DEVMETHOD(device_attach, mpt_attach),
|
||||
DEVMETHOD(device_detach, mpt_detach),
|
||||
DEVMETHOD(device_shutdown, mpt_shutdown),
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t mpt_driver = {
|
||||
"mpt", mpt_methods, sizeof (struct mpt_softc)
|
||||
};
|
||||
static devclass_t mpt_devclass;
|
||||
DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
|
||||
MODULE_VERSION(mpt, 1);
|
||||
|
||||
int
|
||||
mpt_intr(void *dummy)
|
||||
{
|
||||
u_int32_t reply;
|
||||
struct mpt_softc *mpt = (struct mpt_softc *)dummy;
|
||||
|
||||
reply = mpt_pop_reply_queue(mpt);
|
||||
while (reply != MPT_REPLY_EMPTY) {
|
||||
if (mpt->verbose > 1) {
|
||||
if ((reply & MPT_CONTEXT_REPLY) != 0) {
|
||||
/* Address reply; IOC has something to say */
|
||||
mpt_print_reply(MPT_REPLY_PTOV(mpt, reply));
|
||||
} else {
|
||||
/* Context reply ; all went well */
|
||||
device_printf(mpt->dev,
|
||||
"context %u reply OK\n", reply);
|
||||
}
|
||||
}
|
||||
mpt_done(mpt, reply);
|
||||
reply = mpt_pop_reply_queue(mpt);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
mpt_probe(device_t dev)
|
||||
{
|
||||
char *desc;
|
||||
|
||||
if (pci_get_vendor(dev) != PCI_VENDOR_LSI)
|
||||
return (ENXIO);
|
||||
|
||||
switch ((pci_get_device(dev) & ~1)) {
|
||||
case PCI_PRODUCT_LSI_FC909:
|
||||
desc = "LSILogic FC909 FC Adapter";
|
||||
break;
|
||||
case PCI_PRODUCT_LSI_FC929:
|
||||
desc = "LSILogic FC929 FC Adapter";
|
||||
break;
|
||||
case PCI_PRODUCT_LSI_1030:
|
||||
desc = "LSILogic 1030 Ultra4 Adapter";
|
||||
break;
|
||||
default:
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
device_set_desc(dev, desc);
|
||||
return (0);
|
||||
}
|
||||
|
||||
#ifdef RELENG_4
|
||||
static void
|
||||
mpt_set_options(struct mpt_softc *mpt)
|
||||
{
|
||||
int bitmap;
|
||||
|
||||
bitmap = 0;
|
||||
if (getenv_int("mpt_disable", &bitmap)) {
|
||||
if (bitmap & (1 << mpt->unit)) {
|
||||
mpt->disabled = 1;
|
||||
}
|
||||
}
|
||||
|
||||
bitmap = 0;
|
||||
if (getenv_int("mpt_debug", &bitmap)) {
|
||||
if (bitmap & (1 << mpt->unit)) {
|
||||
mpt->verbose = 2;
|
||||
}
|
||||
}
|
||||
|
||||
cmd = pci_read_config(dev, PCIR_COMMAND, 2);
|
||||
}
|
||||
#else
|
||||
static void
|
||||
mpt_set_options(struct mpt_softc *mpt)
|
||||
{
|
||||
int tval;
|
||||
|
||||
tval = 0;
|
||||
if (resource_int_value(device_get_name(mpt->dev),
|
||||
device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
|
||||
mpt->disabled = 1;
|
||||
}
|
||||
tval = 0;
|
||||
if (resource_int_value(device_get_name(mpt->dev),
|
||||
device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
|
||||
mpt->verbose += tval;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
static int
|
||||
mpt_attach(device_t dev)
|
||||
{
|
||||
int iqd;
|
||||
u_int32_t data, cmd;
|
||||
struct mpt_softc *mpt;
|
||||
|
||||
/* Allocate the softc structure */
|
||||
mpt = (struct mpt_softc*) device_get_softc(dev);
|
||||
if (mpt == NULL) {
|
||||
device_printf(dev, "cannot allocate softc\n");
|
||||
return (ENOMEM);
|
||||
}
|
||||
bzero(mpt, sizeof (struct mpt_softc));
|
||||
switch ((pci_get_device(dev) & ~1)) {
|
||||
case PCI_PRODUCT_LSI_FC909:
|
||||
case PCI_PRODUCT_LSI_FC929:
|
||||
mpt->is_fc = 1;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
mpt->dev = dev;
|
||||
mpt->unit = device_get_unit(dev);
|
||||
mpt_set_options(mpt);
|
||||
mpt->verbose += (bootverbose != 0)? 1 : 0;
|
||||
|
||||
/* Make sure memory access decoders are enabled */
|
||||
cmd = pci_read_config(dev, PCIR_COMMAND, 2);
|
||||
if ((cmd & PCIM_CMD_MEMEN) == 0) {
|
||||
device_printf(dev, "Memory accesses disabled");
|
||||
goto bad;
|
||||
}
|
||||
|
||||
/*
|
||||
* Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
|
||||
*/
|
||||
cmd |=
|
||||
PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
|
||||
PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
|
||||
pci_write_config(dev, PCIR_COMMAND, cmd, 2);
|
||||
|
||||
/*
|
||||
* Make sure we've disabled the ROM.
|
||||
*/
|
||||
data = pci_read_config(dev, PCIR_BIOS, 4);
|
||||
data &= ~1;
|
||||
pci_write_config(dev, PCIR_BIOS, data, 4);
|
||||
|
||||
|
||||
/* Is this part a dual? */
|
||||
if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929) {
|
||||
/* Yes; is the previous device the counterpart? */
|
||||
if (mpt->unit) {
|
||||
mpt->mpt2 = (struct mpt_softc *)
|
||||
devclass_get_softc(mpt_devclass, mpt->unit-1);
|
||||
|
||||
if ((mpt->mpt2->mpt2 == NULL)
|
||||
&& (pci_get_vendor(mpt->mpt2->dev) == PCI_VENDOR_LSI)
|
||||
&& ((pci_get_device(mpt->mpt2->dev) & ~1) == PCI_PRODUCT_LSI_FC929) ) {
|
||||
/* Yes */
|
||||
mpt->mpt2->mpt2 = mpt;
|
||||
if (mpt->verbose) {
|
||||
device_printf(dev, "Detected dual\n");
|
||||
}
|
||||
} else {
|
||||
/* Nope */
|
||||
mpt->mpt2 = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Set up the memory regions */
|
||||
/* Allocate kernel virtual memory for the 9x9's Mem0 region */
|
||||
mpt->pci_reg_id = MEM_MAP_REG;
|
||||
mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
|
||||
&mpt->pci_reg_id, 0, ~0, 0, RF_ACTIVE);
|
||||
if (mpt->pci_reg == NULL) {
|
||||
device_printf(dev, "unable to map any ports\n");
|
||||
goto bad;
|
||||
}
|
||||
mpt->pci_st = rman_get_bustag(mpt->pci_reg);
|
||||
mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
|
||||
/* Get the Physical Address */
|
||||
mpt->pci_pa = rman_get_start(mpt->pci_reg);
|
||||
|
||||
/* Get a handle to the interrupt */
|
||||
iqd = 0;
|
||||
mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0,
|
||||
1, RF_ACTIVE | RF_SHAREABLE);
|
||||
if (mpt->pci_irq == NULL) {
|
||||
device_printf(dev, "could not allocate interrupt\n");
|
||||
goto bad;
|
||||
}
|
||||
|
||||
/* Register the interrupt handler */
|
||||
if (bus_setup_intr(dev, mpt->pci_irq,
|
||||
INTR_TYPE_CAM, (void (*)(void *))mpt_intr,
|
||||
mpt, &mpt->ih)) {
|
||||
device_printf(dev, "could not setup interrupt\n");
|
||||
goto bad;
|
||||
}
|
||||
|
||||
/* Disable interrupts at the part */
|
||||
mpt_disable_ints(mpt);
|
||||
|
||||
/* Allocate dma memory */
|
||||
if (mpt_dma_mem_alloc(mpt)) {
|
||||
device_printf(dev, "Could not allocate DMA memory\n");
|
||||
goto bad;
|
||||
}
|
||||
|
||||
/* Initialize character device */
|
||||
/* currently closed */
|
||||
mpt->open = 0;
|
||||
|
||||
/* Save the PCI config register values */
|
||||
/* Hard resets are known to screw up the BAR for diagnostic
|
||||
memory accesses (Mem1). */
|
||||
/* Using Mem1 is known to make the chip stop responding to
|
||||
configuration space transfers, so we need to save it now */
|
||||
mpt_read_config_regs(mpt);
|
||||
|
||||
/* Initialize the hardware */
|
||||
if (mpt->disabled == 0) {
|
||||
if (mpt_init(mpt, MPT_DB_INIT_HOST) != 0)
|
||||
goto bad;
|
||||
|
||||
/* Attach to CAM */
|
||||
mpt_cam_attach(mpt);
|
||||
}
|
||||
|
||||
/* Done */
|
||||
return (0);
|
||||
|
||||
bad:
|
||||
mpt_dma_mem_free(mpt);
|
||||
mpt_free_bus_resources(mpt);
|
||||
|
||||
/*
|
||||
* but return zero to preserve unit numbering
|
||||
*/
|
||||
return (0);
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Free bus resources
|
||||
*/
|
||||
static void
|
||||
mpt_free_bus_resources(struct mpt_softc *mpt)
|
||||
{
|
||||
if (mpt->ih) {
|
||||
bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
|
||||
mpt->ih = 0;
|
||||
}
|
||||
|
||||
if (mpt->pci_irq) {
|
||||
bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq);
|
||||
mpt->pci_irq = 0;
|
||||
}
|
||||
|
||||
if (mpt->pci_reg) {
|
||||
bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_reg_id,
|
||||
mpt->pci_reg);
|
||||
mpt->pci_reg = 0;
|
||||
}
|
||||
if (mpt->pci_mem) {
|
||||
bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_id,
|
||||
mpt->pci_mem);
|
||||
mpt->pci_mem = 0;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Disconnect ourselves from the system.
|
||||
*/
|
||||
static int
|
||||
mpt_detach(device_t dev)
|
||||
{
|
||||
struct mpt_softc *mpt;
|
||||
mpt = (struct mpt_softc*) device_get_softc(dev);
|
||||
|
||||
device_printf(mpt->dev,"mpt_detach!\n");
|
||||
|
||||
if (mpt) {
|
||||
mpt_disable_ints(mpt);
|
||||
mpt_cam_detach(mpt);
|
||||
mpt_reset(mpt);
|
||||
mpt_dma_mem_free(mpt);
|
||||
mpt_free_bus_resources(mpt);
|
||||
}
|
||||
return(0);
|
||||
}
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Disable the hardware
|
||||
*/
|
||||
static int
|
||||
mpt_shutdown(device_t dev)
|
||||
{
|
||||
struct mpt_softc *mpt;
|
||||
mpt = (struct mpt_softc*) device_get_softc(dev);
|
||||
|
||||
if (mpt) {
|
||||
mpt_reset(mpt);
|
||||
}
|
||||
return(0);
|
||||
}
|
||||
|
||||
|
||||
struct imush {
|
||||
struct mpt_softc *mpt;
|
||||
int error;
|
||||
u_int32_t phys;
|
||||
};
|
||||
|
||||
static void
|
||||
mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error)
|
||||
{
|
||||
struct imush *imushp = (struct imush *) arg;
|
||||
imushp->error = error;
|
||||
imushp->phys = segs->ds_addr;
|
||||
}
|
||||
|
||||
|
||||
static int
|
||||
mpt_dma_mem_alloc(struct mpt_softc *mpt)
|
||||
{
|
||||
int i, error;
|
||||
u_char *vptr;
|
||||
u_int32_t pptr, end;
|
||||
struct imush im;
|
||||
device_t dev = mpt->dev;
|
||||
|
||||
/* Check if we alreay have allocated the reply memory */
|
||||
if (mpt->reply_phys != NULL)
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* Create a dma tag for this device
|
||||
*
|
||||
* Align at page boundaries, limit to 32-bit addressing
|
||||
* (The chip supports 64-bit addressing, but this driver doesn't)
|
||||
*/
|
||||
if (bus_dma_tag_create(NULL, PAGE_SIZE, 0, BUS_SPACE_MAXADDR_32BIT,
|
||||
BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE_32BIT,
|
||||
BUS_SPACE_MAXSIZE_32BIT, BUS_SPACE_UNRESTRICTED, 0,
|
||||
&mpt->parent_dmat) != 0) {
|
||||
device_printf(dev, "cannot create parent dma tag\n");
|
||||
return (1);
|
||||
}
|
||||
|
||||
/* Create a child tag for reply buffers */
|
||||
if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
|
||||
0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
|
||||
NULL, NULL, PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
|
||||
&mpt->reply_dmat) != 0) {
|
||||
device_printf(dev, "cannot create a dma tag for replies\n");
|
||||
return (1);
|
||||
}
|
||||
|
||||
/* Allocate some DMA accessable memory for replies */
|
||||
if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
|
||||
BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
|
||||
device_printf(dev, "cannot allocate %d bytes of reply memory\n",
|
||||
PAGE_SIZE);
|
||||
return (1);
|
||||
}
|
||||
|
||||
im.mpt = mpt;
|
||||
im.error = 0;
|
||||
|
||||
/* Load and lock it into "bus space" */
|
||||
bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
|
||||
PAGE_SIZE, mpt_map_rquest, &im, 0);
|
||||
|
||||
if (im.error) {
|
||||
device_printf(dev,
|
||||
"error %d loading dma map for DMA reply queue\n", im.error);
|
||||
return (1);
|
||||
}
|
||||
mpt->reply_phys = im.phys;
|
||||
|
||||
/* Create a child tag for data buffers */
|
||||
if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
|
||||
0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
|
||||
NULL, NULL, MAXBSIZE, MPT_SGL_MAX, BUS_SPACE_MAXSIZE_32BIT, 0,
|
||||
&mpt->buffer_dmat) != 0) {
|
||||
device_printf(dev,
|
||||
"cannot create a dma tag for data buffers\n");
|
||||
return (1);
|
||||
}
|
||||
|
||||
/* Create a child tag for request buffers */
|
||||
if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
|
||||
0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
|
||||
NULL, NULL, MPT_REQ_MEM_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
|
||||
&mpt->request_dmat) != 0) {
|
||||
device_printf(dev, "cannot create a dma tag for requests\n");
|
||||
return (1);
|
||||
}
|
||||
|
||||
/* Allocate some DMA accessable memory for requests */
|
||||
if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
|
||||
BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
|
||||
device_printf(dev,
|
||||
"cannot allocate %d bytes of request memory\n",
|
||||
MPT_REQ_MEM_SIZE);
|
||||
return (1);
|
||||
}
|
||||
|
||||
im.mpt = mpt;
|
||||
im.error = 0;
|
||||
|
||||
/* Load and lock it into "bus space" */
|
||||
bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
|
||||
MPT_REQ_MEM_SIZE, mpt_map_rquest, &im, 0);
|
||||
|
||||
if (im.error) {
|
||||
device_printf(dev,
|
||||
"error %d loading dma map for DMA request queue\n",
|
||||
im.error);
|
||||
return (1);
|
||||
}
|
||||
mpt->request_phys = im.phys;
|
||||
|
||||
i = 0;
|
||||
pptr = mpt->request_phys;
|
||||
vptr = mpt->request;
|
||||
end = pptr + MPT_REQ_MEM_SIZE;
|
||||
while(pptr < end) {
|
||||
request_t *req = &mpt->requests[i];
|
||||
req->index = i++;
|
||||
|
||||
/* Store location of Request Data */
|
||||
req->req_pbuf = pptr;
|
||||
req->req_vbuf = vptr;
|
||||
|
||||
pptr += MPT_REQUEST_AREA;
|
||||
vptr += MPT_REQUEST_AREA;
|
||||
|
||||
req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
|
||||
req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
|
||||
|
||||
error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
|
||||
if (error) {
|
||||
device_printf(dev,
|
||||
"error %d creating per-cmd DMA maps\n", error);
|
||||
return (1);
|
||||
}
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* Deallocate memory that was allocated by mpt_dma_mem_alloc
|
||||
*/
|
||||
static void
|
||||
mpt_dma_mem_free(struct mpt_softc *mpt)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* Make sure we aren't double destroying */
|
||||
if (mpt->reply_dmat == 0) {
|
||||
if (mpt->verbose)
|
||||
device_printf(mpt->dev,"Already released dma memory\n");
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < MPT_MAX_REQUESTS; i++) {
|
||||
bus_dmamap_destroy(mpt->buffer_dmat, mpt->requests[i].dmap);
|
||||
}
|
||||
bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
|
||||
bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
|
||||
bus_dma_tag_destroy(mpt->request_dmat);
|
||||
bus_dma_tag_destroy(mpt->buffer_dmat);
|
||||
bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
|
||||
bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
|
||||
bus_dma_tag_destroy(mpt->reply_dmat);
|
||||
bus_dma_tag_destroy(mpt->parent_dmat);
|
||||
mpt->reply_dmat = 0;
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* Reads modifiable (via PCI transactions) config registers */
|
||||
static void
|
||||
mpt_read_config_regs(struct mpt_softc *mpt)
|
||||
{
|
||||
mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
|
||||
mpt->pci_cfg.LatencyTimer_LineSize =
|
||||
pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
|
||||
mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_MAPS, 4);
|
||||
mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0x4, 4);
|
||||
mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x8, 4);
|
||||
mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0xC, 4);
|
||||
mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x10, 4);
|
||||
mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
|
||||
mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
|
||||
mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
|
||||
}
|
||||
|
||||
/* Sets modifiable config registers */
|
||||
void
|
||||
mpt_set_config_regs(struct mpt_softc *mpt)
|
||||
{
|
||||
u_int32_t val;
|
||||
|
||||
#define MPT_CHECK(reg, offset, size) \
|
||||
val = pci_read_config(mpt->dev, offset, size); \
|
||||
if (mpt->pci_cfg.reg != val) { \
|
||||
device_printf(mpt->dev, \
|
||||
"Restoring " #reg " to 0x%X from 0x%X\n", \
|
||||
mpt->pci_cfg.reg, val); \
|
||||
}
|
||||
|
||||
if (mpt->verbose) {
|
||||
MPT_CHECK(Command, PCIR_COMMAND, 2);
|
||||
MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
|
||||
MPT_CHECK(IO_BAR, PCIR_MAPS, 4);
|
||||
MPT_CHECK(Mem0_BAR[0], PCIR_MAPS+0x4, 4);
|
||||
MPT_CHECK(Mem0_BAR[1], PCIR_MAPS+0x8, 4);
|
||||
MPT_CHECK(Mem1_BAR[0], PCIR_MAPS+0xC, 4);
|
||||
MPT_CHECK(Mem1_BAR[1], PCIR_MAPS+0x10, 4);
|
||||
MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
|
||||
MPT_CHECK(IntLine, PCIR_INTLINE, 1);
|
||||
MPT_CHECK(PMCSR, 0x44, 4);
|
||||
}
|
||||
#undef MPT_CHECK
|
||||
|
||||
pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
|
||||
pci_write_config(mpt->dev, PCIR_CACHELNSZ,
|
||||
mpt->pci_cfg.LatencyTimer_LineSize, 2);
|
||||
pci_write_config(mpt->dev, PCIR_MAPS, mpt->pci_cfg.IO_BAR, 4);
|
||||
pci_write_config(mpt->dev, PCIR_MAPS+0x4, mpt->pci_cfg.Mem0_BAR[0], 4);
|
||||
pci_write_config(mpt->dev, PCIR_MAPS+0x8, mpt->pci_cfg.Mem0_BAR[1], 4);
|
||||
pci_write_config(mpt->dev, PCIR_MAPS+0xC, mpt->pci_cfg.Mem1_BAR[0], 4);
|
||||
pci_write_config(mpt->dev, PCIR_MAPS+0x10, mpt->pci_cfg.Mem1_BAR[1], 4);
|
||||
pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
|
||||
pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
|
||||
pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
|
||||
}
|
||||
@ -86,6 +86,7 @@ device ahc # AHA2940 and onboard AIC7xxx devices
|
||||
device ahd # AHA39320 and onboard AIC79xx devices
|
||||
device amd # AMD 53C974 (Tekram DC-390(T))
|
||||
device isp # Qlogic family
|
||||
device mpt # LSI-Logic MPT-Fusion
|
||||
#device ncr # NCR/Symbios Logic
|
||||
device sym # NCR/Symbios Logic (newer chipsets + those of `ncr')
|
||||
|
||||
|
||||
@ -92,6 +92,7 @@ device adv # Advansys SCSI adapters
|
||||
device ahc # AHA2940 and onboard AIC7xxx devices
|
||||
device amd # AMD 53C974 (Tekram DC-390(T))
|
||||
device isp # Qlogic family
|
||||
#device mpt # LSI-Logic MPT-Fusion (unknown whether works)
|
||||
#device ncr # NCR/Symbios Logic
|
||||
device sym # NCR/Symbios Logic (newer chipsets + those of `ncr')
|
||||
|
||||
|
||||
@ -88,6 +88,7 @@ device atapicd # ATAPI CDROM drives
|
||||
# SCSI Controllers
|
||||
device ahc # AHA2940 and onboard AIC7xxx devices
|
||||
device isp # Qlogic family
|
||||
#device mpt # LSI-Logic MPT-Fusion (not yet)
|
||||
device ispfw # Firmware module for Qlogic host adapters
|
||||
#device ncr # NCR/Symbios Logic
|
||||
device sym # NCR/Symbios Logic (newer chipsets + those of `ncr')
|
||||
|
||||
Loading…
Reference in New Issue
Block a user