[mips/broadcom] Add initial code for interrupts on the Broadcom MIPS processor
Broadcom MIPS processor doesn't reset TI flag if additional manipulation is done. Thanks to @sobomax!
This commit is contained in:
Adrian Chadd
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647bedd5da
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9c60232add
123
sys/mips/broadcom/bcm_mipscore.c
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123
sys/mips/broadcom/bcm_mipscore.c
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/*-
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* Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/module.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/rman.h>
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#include <sys/stddef.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <dev/bhnd/bhnd.h>
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#include <dev/bhnd/bhndvar.h>
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#include <dev/bhnd/bhnd_ids.h>
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#include "bcm_mipscore.h"
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static const struct resource_spec mipscore_rspec[MIPSCORE_MAX_RSPEC] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ -1, -1, 0 }
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};
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struct bhnd_device mipscore_match[] = {
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BHND_MIPS_DEVICE(MIPS, "BHND MIPS processor", NULL),
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BHND_MIPS_DEVICE(MIPS33, "BHND MIPS3302 processor", NULL),
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BHND_MIPS_DEVICE(MIPS74K, "BHND MIPS74K processor", NULL),
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BHND_DEVICE_END
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};
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static int
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mipscore_probe(device_t dev)
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{
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const struct bhnd_device *id;
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id = bhnd_device_lookup(dev, mipscore_match, sizeof(mipscore_match[0]));
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if (id == NULL)
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return (ENXIO);
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bhnd_set_default_core_desc(dev);
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return (BUS_PROBE_DEFAULT);
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}
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static int
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mipscore_attach(device_t dev)
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{
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struct mipscore_softc *sc;
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struct resource *res;
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uint32_t intmask;
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uint16_t devid;
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int error;
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sc = device_get_softc(dev);
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devid = bhnd_get_device(dev);
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sc->devid = devid;
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sc->dev = dev;
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/* Allocate bus resources */
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memcpy(sc->rspec, mipscore_rspec, sizeof(sc->rspec));
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error = bhnd_alloc_resources(dev, sc->rspec, sc->res);
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if (error)
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return (error);
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res = sc->res[0]->res;
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if (res == NULL)
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return (ENXIO);
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if (devid == BHND_COREID_MIPS74K) {
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intmask = (1 << 31);
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/* Use intmask5 register to route the timer interrupt */
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bus_write_4(res, offsetof(struct mipscore_regs, intmask[5]),
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intmask);
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}
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return (0);
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}
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static device_method_t mipscore_methods[] = {
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DEVMETHOD(device_probe, mipscore_probe),
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DEVMETHOD(device_attach, mipscore_attach),
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DEVMETHOD_END
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};
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devclass_t bhnd_mipscore_devclass;
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DEFINE_CLASS_0(bhnd_mipscore, mipscore_driver, mipscore_methods,
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sizeof(struct mipscore_softc));
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DRIVER_MODULE(bhnd_mipscore, bhnd, mipscore_driver, bhnd_mipscore_devclass,
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0, 0);
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MODULE_VERSION(bhnd_mipscore, 1);
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60
sys/mips/broadcom/bcm_mipscore.h
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60
sys/mips/broadcom/bcm_mipscore.h
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@ -0,0 +1,60 @@
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/*-
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* Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
|
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*
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* $FreeBSD$
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*/
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#ifndef _BHND_CORES_MIPS_MIPSCOREVAR_H_
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#define _BHND_CORES_MIPS_MIPSCOREVAR_H_
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#define MIPSCORE_MAX_RSPEC 2
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struct mipscore_softc {
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device_t dev; /* CPU device */
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uint32_t devid;
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struct resource_spec rspec[MIPSCORE_MAX_RSPEC];
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struct bhnd_resource *res[MIPSCORE_MAX_RSPEC];
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};
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struct mipscore_regs {
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uint32_t corecontrol;
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uint32_t exceptionbase;
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uint32_t PAD1[1]; /* unmapped address */
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uint32_t biststatus;
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uint32_t intstatus;
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uint32_t intmask[6];
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uint32_t nmimask;
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uint32_t PAD2[4]; /* unmapped addresses */
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uint32_t gpioselect;
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uint32_t gpiooutput;
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uint32_t gpioenable;
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uint32_t PAD3[101]; /* unmapped addresses */
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uint32_t clkcontrolstatus;
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};
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#endif /* _BHND_CORES_MIPS_MIPSCOREVAR_H_ */
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