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Note that the AR724x PCIe registers are actually from the PCI_CTRL

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register range.
This commit is contained in:
adrian 2015-03-21 05:59:45 +00:00
parent 98bf77d34d
commit 9ce94e7c25
1 changed files with 1 additions and 1 deletions
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2
sys/mips/atheros/ar724xreg.h
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@ -78,7 +78,7 @@
#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000F0000)
#define AR724X_PCI_CTRL_SIZE 0x100
/* PCI config registers */
/* PCI config registers - AR724X_PCI_CTRL_BASE */
#define AR724X_PCI_APP 0x180f0000
#define AR724X_PCI_APP_LTSSM_ENABLE (1 << 0)
#define AR724X_PCI_RESET 0x180f0018