From 9e98ab079b6c30a95751201c83cd58a036646b00 Mon Sep 17 00:00:00 2001 From: se Date: Mon, 18 Sep 1995 21:48:39 +0000 Subject: [PATCH] Revert most changes of previous commit. Changes relative to 1.12: - Put extra instruction between outl()/inl() sequence to prevent the old value being read back because of the bus capacitance. - Additional check for existence of register at CONF2_ENABLE_PORT. --- sys/amd64/pci/pci_bus.c | 70 ++++++++++++++++++++++++++++---------- sys/amd64/pci/pci_cfgreg.c | 70 ++++++++++++++++++++++++++++---------- sys/i386/isa/pcibus.c | 70 ++++++++++++++++++++++++++++---------- sys/i386/pci/pci_bus.c | 70 ++++++++++++++++++++++++++++---------- sys/i386/pci/pci_cfgreg.c | 70 ++++++++++++++++++++++++++++---------- sys/i386/pci/pci_pir.c | 70 ++++++++++++++++++++++++++++---------- 6 files changed, 312 insertions(+), 108 deletions(-) diff --git a/sys/amd64/pci/pci_bus.c b/sys/amd64/pci/pci_bus.c index 786fb82420d6..43346bdc75e3 100644 --- a/sys/amd64/pci/pci_bus.c +++ b/sys/amd64/pci/pci_bus.c @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pcibus.c,v 1.12 1995/09/14 20:27:31 se Exp $ +** $Id: pcibus.c,v 1.13 1995/09/15 21:43:45 se Exp $ ** ** pci bus subroutines for i386 architecture. ** @@ -35,8 +35,6 @@ *************************************************************************** */ -#define __PCIBUS_C___ "pl4 95/03/21" - #include #include #include @@ -85,6 +83,9 @@ **----------------------------------------------------------------- */ +static int +pcibus_check (void); + static void pcibus_setup (void); @@ -144,11 +145,11 @@ DATA_SET (pcibus_set, i386pci); #define CONF1_DATA_PORT 0x0cfc #define CONF1_ENABLE 0x80000000ul - -#define CONF1_ENABLE_CHK 0x80000001ul -#define CONF1_ENABLE_MSK 0x80000001ul -#define CONF1_ENABLE_RES 0x80000000ul - +#define CONF1_ENABLE_CHK1 0xF0000001ul +#define CONF1_ENABLE_MSK1 0x80000001ul +#define CONF1_ENABLE_RES1 0x80000000ul +#define CONF1_ENABLE_CHK2 0xfffffffful +#define CONF1_ENABLE_RES2 0x80fffffcul #define CONF2_ENABLE_PORT 0x0cf8 #define CONF2_FORWARD_PORT 0x0cfa @@ -157,6 +158,17 @@ DATA_SET (pcibus_set, i386pci); #define CONF2_ENABLE_RES 0x0e +static int +pcibus_check (void) +{ + u_char device; + + for (device = 0; device < pci_maxdevice; device++) { + if (pcibus_read (pcibus_tag (0,device,0), 0) != 0xfffffffful) + return 1; + } + return 0; +} static void pcibus_setup (void) @@ -169,20 +181,16 @@ pcibus_setup (void) */ oldval = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK); - outl (CONF1_DATA_PORT, 0); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK1); + outb (CONF1_ADDR_PORT +3, 0); result = inl (CONF1_ADDR_PORT); outl (CONF1_ADDR_PORT, oldval); - if (bootverbose && (result != 0xfffffffful)) - printf ("pcibus_setup: " - "wrote 0x%08x, read back 0x%08x, expected 0x%08x\n", - CONF1_ENABLE_CHK, result, CONF1_ENABLE_RES); - - if ((result & CONF1_ENABLE_MSK) == CONF1_ENABLE_RES) { + if ((result & CONF1_ENABLE_MSK1) == CONF1_ENABLE_RES1) { pci_mechanism = 1; pci_maxdevice = 32; - return; + if (pcibus_check()) + return; }; /*--------------------------------------- @@ -195,19 +203,45 @@ pcibus_setup (void) result = inb (CONF2_ENABLE_PORT); outb (CONF2_ENABLE_PORT, 0); + outb (CONF2_FORWARD_PORT, 0); if ((result == CONF2_ENABLE_RES) && !inb (CONF2_ENABLE_PORT) && !inb (CONF2_FORWARD_PORT)) { pci_mechanism = 2; pci_maxdevice = 16; - return; + if (pcibus_check()) + return; }; + + /*----------------------------------------------------- + ** Well, is it Configuration mode 1, after all ? + **----------------------------------------------------- + */ + + oldval = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK2); + outl (CONF1_DATA_PORT, 0); + result = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, oldval); + + if (result == CONF1_ENABLE_RES2) { + pci_mechanism = 1; + pci_maxdevice = 32; + if (pcibus_check()) + return; + } + /*--------------------------------------- ** No PCI bus host bridge found **--------------------------------------- */ + if (bootverbose && (result != 0xfffffffful)) + printf ("pcibus_setup: " + "wrote 0x%08x, read back 0x%08x, expected 0x%08x\n", + CONF1_ENABLE_CHK2, result, CONF1_ENABLE_RES2); + pci_mechanism = 0; pci_maxdevice = 0; } diff --git a/sys/amd64/pci/pci_cfgreg.c b/sys/amd64/pci/pci_cfgreg.c index 786fb82420d6..43346bdc75e3 100644 --- a/sys/amd64/pci/pci_cfgreg.c +++ b/sys/amd64/pci/pci_cfgreg.c @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pcibus.c,v 1.12 1995/09/14 20:27:31 se Exp $ +** $Id: pcibus.c,v 1.13 1995/09/15 21:43:45 se Exp $ ** ** pci bus subroutines for i386 architecture. ** @@ -35,8 +35,6 @@ *************************************************************************** */ -#define __PCIBUS_C___ "pl4 95/03/21" - #include #include #include @@ -85,6 +83,9 @@ **----------------------------------------------------------------- */ +static int +pcibus_check (void); + static void pcibus_setup (void); @@ -144,11 +145,11 @@ DATA_SET (pcibus_set, i386pci); #define CONF1_DATA_PORT 0x0cfc #define CONF1_ENABLE 0x80000000ul - -#define CONF1_ENABLE_CHK 0x80000001ul -#define CONF1_ENABLE_MSK 0x80000001ul -#define CONF1_ENABLE_RES 0x80000000ul - +#define CONF1_ENABLE_CHK1 0xF0000001ul +#define CONF1_ENABLE_MSK1 0x80000001ul +#define CONF1_ENABLE_RES1 0x80000000ul +#define CONF1_ENABLE_CHK2 0xfffffffful +#define CONF1_ENABLE_RES2 0x80fffffcul #define CONF2_ENABLE_PORT 0x0cf8 #define CONF2_FORWARD_PORT 0x0cfa @@ -157,6 +158,17 @@ DATA_SET (pcibus_set, i386pci); #define CONF2_ENABLE_RES 0x0e +static int +pcibus_check (void) +{ + u_char device; + + for (device = 0; device < pci_maxdevice; device++) { + if (pcibus_read (pcibus_tag (0,device,0), 0) != 0xfffffffful) + return 1; + } + return 0; +} static void pcibus_setup (void) @@ -169,20 +181,16 @@ pcibus_setup (void) */ oldval = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK); - outl (CONF1_DATA_PORT, 0); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK1); + outb (CONF1_ADDR_PORT +3, 0); result = inl (CONF1_ADDR_PORT); outl (CONF1_ADDR_PORT, oldval); - if (bootverbose && (result != 0xfffffffful)) - printf ("pcibus_setup: " - "wrote 0x%08x, read back 0x%08x, expected 0x%08x\n", - CONF1_ENABLE_CHK, result, CONF1_ENABLE_RES); - - if ((result & CONF1_ENABLE_MSK) == CONF1_ENABLE_RES) { + if ((result & CONF1_ENABLE_MSK1) == CONF1_ENABLE_RES1) { pci_mechanism = 1; pci_maxdevice = 32; - return; + if (pcibus_check()) + return; }; /*--------------------------------------- @@ -195,19 +203,45 @@ pcibus_setup (void) result = inb (CONF2_ENABLE_PORT); outb (CONF2_ENABLE_PORT, 0); + outb (CONF2_FORWARD_PORT, 0); if ((result == CONF2_ENABLE_RES) && !inb (CONF2_ENABLE_PORT) && !inb (CONF2_FORWARD_PORT)) { pci_mechanism = 2; pci_maxdevice = 16; - return; + if (pcibus_check()) + return; }; + + /*----------------------------------------------------- + ** Well, is it Configuration mode 1, after all ? + **----------------------------------------------------- + */ + + oldval = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK2); + outl (CONF1_DATA_PORT, 0); + result = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, oldval); + + if (result == CONF1_ENABLE_RES2) { + pci_mechanism = 1; + pci_maxdevice = 32; + if (pcibus_check()) + return; + } + /*--------------------------------------- ** No PCI bus host bridge found **--------------------------------------- */ + if (bootverbose && (result != 0xfffffffful)) + printf ("pcibus_setup: " + "wrote 0x%08x, read back 0x%08x, expected 0x%08x\n", + CONF1_ENABLE_CHK2, result, CONF1_ENABLE_RES2); + pci_mechanism = 0; pci_maxdevice = 0; } diff --git a/sys/i386/isa/pcibus.c b/sys/i386/isa/pcibus.c index 786fb82420d6..43346bdc75e3 100644 --- a/sys/i386/isa/pcibus.c +++ b/sys/i386/isa/pcibus.c @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pcibus.c,v 1.12 1995/09/14 20:27:31 se Exp $ +** $Id: pcibus.c,v 1.13 1995/09/15 21:43:45 se Exp $ ** ** pci bus subroutines for i386 architecture. ** @@ -35,8 +35,6 @@ *************************************************************************** */ -#define __PCIBUS_C___ "pl4 95/03/21" - #include #include #include @@ -85,6 +83,9 @@ **----------------------------------------------------------------- */ +static int +pcibus_check (void); + static void pcibus_setup (void); @@ -144,11 +145,11 @@ DATA_SET (pcibus_set, i386pci); #define CONF1_DATA_PORT 0x0cfc #define CONF1_ENABLE 0x80000000ul - -#define CONF1_ENABLE_CHK 0x80000001ul -#define CONF1_ENABLE_MSK 0x80000001ul -#define CONF1_ENABLE_RES 0x80000000ul - +#define CONF1_ENABLE_CHK1 0xF0000001ul +#define CONF1_ENABLE_MSK1 0x80000001ul +#define CONF1_ENABLE_RES1 0x80000000ul +#define CONF1_ENABLE_CHK2 0xfffffffful +#define CONF1_ENABLE_RES2 0x80fffffcul #define CONF2_ENABLE_PORT 0x0cf8 #define CONF2_FORWARD_PORT 0x0cfa @@ -157,6 +158,17 @@ DATA_SET (pcibus_set, i386pci); #define CONF2_ENABLE_RES 0x0e +static int +pcibus_check (void) +{ + u_char device; + + for (device = 0; device < pci_maxdevice; device++) { + if (pcibus_read (pcibus_tag (0,device,0), 0) != 0xfffffffful) + return 1; + } + return 0; +} static void pcibus_setup (void) @@ -169,20 +181,16 @@ pcibus_setup (void) */ oldval = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK); - outl (CONF1_DATA_PORT, 0); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK1); + outb (CONF1_ADDR_PORT +3, 0); result = inl (CONF1_ADDR_PORT); outl (CONF1_ADDR_PORT, oldval); - if (bootverbose && (result != 0xfffffffful)) - printf ("pcibus_setup: " - "wrote 0x%08x, read back 0x%08x, expected 0x%08x\n", - CONF1_ENABLE_CHK, result, CONF1_ENABLE_RES); - - if ((result & CONF1_ENABLE_MSK) == CONF1_ENABLE_RES) { + if ((result & CONF1_ENABLE_MSK1) == CONF1_ENABLE_RES1) { pci_mechanism = 1; pci_maxdevice = 32; - return; + if (pcibus_check()) + return; }; /*--------------------------------------- @@ -195,19 +203,45 @@ pcibus_setup (void) result = inb (CONF2_ENABLE_PORT); outb (CONF2_ENABLE_PORT, 0); + outb (CONF2_FORWARD_PORT, 0); if ((result == CONF2_ENABLE_RES) && !inb (CONF2_ENABLE_PORT) && !inb (CONF2_FORWARD_PORT)) { pci_mechanism = 2; pci_maxdevice = 16; - return; + if (pcibus_check()) + return; }; + + /*----------------------------------------------------- + ** Well, is it Configuration mode 1, after all ? + **----------------------------------------------------- + */ + + oldval = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK2); + outl (CONF1_DATA_PORT, 0); + result = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, oldval); + + if (result == CONF1_ENABLE_RES2) { + pci_mechanism = 1; + pci_maxdevice = 32; + if (pcibus_check()) + return; + } + /*--------------------------------------- ** No PCI bus host bridge found **--------------------------------------- */ + if (bootverbose && (result != 0xfffffffful)) + printf ("pcibus_setup: " + "wrote 0x%08x, read back 0x%08x, expected 0x%08x\n", + CONF1_ENABLE_CHK2, result, CONF1_ENABLE_RES2); + pci_mechanism = 0; pci_maxdevice = 0; } diff --git a/sys/i386/pci/pci_bus.c b/sys/i386/pci/pci_bus.c index 786fb82420d6..43346bdc75e3 100644 --- a/sys/i386/pci/pci_bus.c +++ b/sys/i386/pci/pci_bus.c @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pcibus.c,v 1.12 1995/09/14 20:27:31 se Exp $ +** $Id: pcibus.c,v 1.13 1995/09/15 21:43:45 se Exp $ ** ** pci bus subroutines for i386 architecture. ** @@ -35,8 +35,6 @@ *************************************************************************** */ -#define __PCIBUS_C___ "pl4 95/03/21" - #include #include #include @@ -85,6 +83,9 @@ **----------------------------------------------------------------- */ +static int +pcibus_check (void); + static void pcibus_setup (void); @@ -144,11 +145,11 @@ DATA_SET (pcibus_set, i386pci); #define CONF1_DATA_PORT 0x0cfc #define CONF1_ENABLE 0x80000000ul - -#define CONF1_ENABLE_CHK 0x80000001ul -#define CONF1_ENABLE_MSK 0x80000001ul -#define CONF1_ENABLE_RES 0x80000000ul - +#define CONF1_ENABLE_CHK1 0xF0000001ul +#define CONF1_ENABLE_MSK1 0x80000001ul +#define CONF1_ENABLE_RES1 0x80000000ul +#define CONF1_ENABLE_CHK2 0xfffffffful +#define CONF1_ENABLE_RES2 0x80fffffcul #define CONF2_ENABLE_PORT 0x0cf8 #define CONF2_FORWARD_PORT 0x0cfa @@ -157,6 +158,17 @@ DATA_SET (pcibus_set, i386pci); #define CONF2_ENABLE_RES 0x0e +static int +pcibus_check (void) +{ + u_char device; + + for (device = 0; device < pci_maxdevice; device++) { + if (pcibus_read (pcibus_tag (0,device,0), 0) != 0xfffffffful) + return 1; + } + return 0; +} static void pcibus_setup (void) @@ -169,20 +181,16 @@ pcibus_setup (void) */ oldval = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK); - outl (CONF1_DATA_PORT, 0); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK1); + outb (CONF1_ADDR_PORT +3, 0); result = inl (CONF1_ADDR_PORT); outl (CONF1_ADDR_PORT, oldval); - if (bootverbose && (result != 0xfffffffful)) - printf ("pcibus_setup: " - "wrote 0x%08x, read back 0x%08x, expected 0x%08x\n", - CONF1_ENABLE_CHK, result, CONF1_ENABLE_RES); - - if ((result & CONF1_ENABLE_MSK) == CONF1_ENABLE_RES) { + if ((result & CONF1_ENABLE_MSK1) == CONF1_ENABLE_RES1) { pci_mechanism = 1; pci_maxdevice = 32; - return; + if (pcibus_check()) + return; }; /*--------------------------------------- @@ -195,19 +203,45 @@ pcibus_setup (void) result = inb (CONF2_ENABLE_PORT); outb (CONF2_ENABLE_PORT, 0); + outb (CONF2_FORWARD_PORT, 0); if ((result == CONF2_ENABLE_RES) && !inb (CONF2_ENABLE_PORT) && !inb (CONF2_FORWARD_PORT)) { pci_mechanism = 2; pci_maxdevice = 16; - return; + if (pcibus_check()) + return; }; + + /*----------------------------------------------------- + ** Well, is it Configuration mode 1, after all ? + **----------------------------------------------------- + */ + + oldval = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK2); + outl (CONF1_DATA_PORT, 0); + result = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, oldval); + + if (result == CONF1_ENABLE_RES2) { + pci_mechanism = 1; + pci_maxdevice = 32; + if (pcibus_check()) + return; + } + /*--------------------------------------- ** No PCI bus host bridge found **--------------------------------------- */ + if (bootverbose && (result != 0xfffffffful)) + printf ("pcibus_setup: " + "wrote 0x%08x, read back 0x%08x, expected 0x%08x\n", + CONF1_ENABLE_CHK2, result, CONF1_ENABLE_RES2); + pci_mechanism = 0; pci_maxdevice = 0; } diff --git a/sys/i386/pci/pci_cfgreg.c b/sys/i386/pci/pci_cfgreg.c index 786fb82420d6..43346bdc75e3 100644 --- a/sys/i386/pci/pci_cfgreg.c +++ b/sys/i386/pci/pci_cfgreg.c @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pcibus.c,v 1.12 1995/09/14 20:27:31 se Exp $ +** $Id: pcibus.c,v 1.13 1995/09/15 21:43:45 se Exp $ ** ** pci bus subroutines for i386 architecture. ** @@ -35,8 +35,6 @@ *************************************************************************** */ -#define __PCIBUS_C___ "pl4 95/03/21" - #include #include #include @@ -85,6 +83,9 @@ **----------------------------------------------------------------- */ +static int +pcibus_check (void); + static void pcibus_setup (void); @@ -144,11 +145,11 @@ DATA_SET (pcibus_set, i386pci); #define CONF1_DATA_PORT 0x0cfc #define CONF1_ENABLE 0x80000000ul - -#define CONF1_ENABLE_CHK 0x80000001ul -#define CONF1_ENABLE_MSK 0x80000001ul -#define CONF1_ENABLE_RES 0x80000000ul - +#define CONF1_ENABLE_CHK1 0xF0000001ul +#define CONF1_ENABLE_MSK1 0x80000001ul +#define CONF1_ENABLE_RES1 0x80000000ul +#define CONF1_ENABLE_CHK2 0xfffffffful +#define CONF1_ENABLE_RES2 0x80fffffcul #define CONF2_ENABLE_PORT 0x0cf8 #define CONF2_FORWARD_PORT 0x0cfa @@ -157,6 +158,17 @@ DATA_SET (pcibus_set, i386pci); #define CONF2_ENABLE_RES 0x0e +static int +pcibus_check (void) +{ + u_char device; + + for (device = 0; device < pci_maxdevice; device++) { + if (pcibus_read (pcibus_tag (0,device,0), 0) != 0xfffffffful) + return 1; + } + return 0; +} static void pcibus_setup (void) @@ -169,20 +181,16 @@ pcibus_setup (void) */ oldval = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK); - outl (CONF1_DATA_PORT, 0); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK1); + outb (CONF1_ADDR_PORT +3, 0); result = inl (CONF1_ADDR_PORT); outl (CONF1_ADDR_PORT, oldval); - if (bootverbose && (result != 0xfffffffful)) - printf ("pcibus_setup: " - "wrote 0x%08x, read back 0x%08x, expected 0x%08x\n", - CONF1_ENABLE_CHK, result, CONF1_ENABLE_RES); - - if ((result & CONF1_ENABLE_MSK) == CONF1_ENABLE_RES) { + if ((result & CONF1_ENABLE_MSK1) == CONF1_ENABLE_RES1) { pci_mechanism = 1; pci_maxdevice = 32; - return; + if (pcibus_check()) + return; }; /*--------------------------------------- @@ -195,19 +203,45 @@ pcibus_setup (void) result = inb (CONF2_ENABLE_PORT); outb (CONF2_ENABLE_PORT, 0); + outb (CONF2_FORWARD_PORT, 0); if ((result == CONF2_ENABLE_RES) && !inb (CONF2_ENABLE_PORT) && !inb (CONF2_FORWARD_PORT)) { pci_mechanism = 2; pci_maxdevice = 16; - return; + if (pcibus_check()) + return; }; + + /*----------------------------------------------------- + ** Well, is it Configuration mode 1, after all ? + **----------------------------------------------------- + */ + + oldval = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK2); + outl (CONF1_DATA_PORT, 0); + result = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, oldval); + + if (result == CONF1_ENABLE_RES2) { + pci_mechanism = 1; + pci_maxdevice = 32; + if (pcibus_check()) + return; + } + /*--------------------------------------- ** No PCI bus host bridge found **--------------------------------------- */ + if (bootverbose && (result != 0xfffffffful)) + printf ("pcibus_setup: " + "wrote 0x%08x, read back 0x%08x, expected 0x%08x\n", + CONF1_ENABLE_CHK2, result, CONF1_ENABLE_RES2); + pci_mechanism = 0; pci_maxdevice = 0; } diff --git a/sys/i386/pci/pci_pir.c b/sys/i386/pci/pci_pir.c index 786fb82420d6..43346bdc75e3 100644 --- a/sys/i386/pci/pci_pir.c +++ b/sys/i386/pci/pci_pir.c @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pcibus.c,v 1.12 1995/09/14 20:27:31 se Exp $ +** $Id: pcibus.c,v 1.13 1995/09/15 21:43:45 se Exp $ ** ** pci bus subroutines for i386 architecture. ** @@ -35,8 +35,6 @@ *************************************************************************** */ -#define __PCIBUS_C___ "pl4 95/03/21" - #include #include #include @@ -85,6 +83,9 @@ **----------------------------------------------------------------- */ +static int +pcibus_check (void); + static void pcibus_setup (void); @@ -144,11 +145,11 @@ DATA_SET (pcibus_set, i386pci); #define CONF1_DATA_PORT 0x0cfc #define CONF1_ENABLE 0x80000000ul - -#define CONF1_ENABLE_CHK 0x80000001ul -#define CONF1_ENABLE_MSK 0x80000001ul -#define CONF1_ENABLE_RES 0x80000000ul - +#define CONF1_ENABLE_CHK1 0xF0000001ul +#define CONF1_ENABLE_MSK1 0x80000001ul +#define CONF1_ENABLE_RES1 0x80000000ul +#define CONF1_ENABLE_CHK2 0xfffffffful +#define CONF1_ENABLE_RES2 0x80fffffcul #define CONF2_ENABLE_PORT 0x0cf8 #define CONF2_FORWARD_PORT 0x0cfa @@ -157,6 +158,17 @@ DATA_SET (pcibus_set, i386pci); #define CONF2_ENABLE_RES 0x0e +static int +pcibus_check (void) +{ + u_char device; + + for (device = 0; device < pci_maxdevice; device++) { + if (pcibus_read (pcibus_tag (0,device,0), 0) != 0xfffffffful) + return 1; + } + return 0; +} static void pcibus_setup (void) @@ -169,20 +181,16 @@ pcibus_setup (void) */ oldval = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK); - outl (CONF1_DATA_PORT, 0); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK1); + outb (CONF1_ADDR_PORT +3, 0); result = inl (CONF1_ADDR_PORT); outl (CONF1_ADDR_PORT, oldval); - if (bootverbose && (result != 0xfffffffful)) - printf ("pcibus_setup: " - "wrote 0x%08x, read back 0x%08x, expected 0x%08x\n", - CONF1_ENABLE_CHK, result, CONF1_ENABLE_RES); - - if ((result & CONF1_ENABLE_MSK) == CONF1_ENABLE_RES) { + if ((result & CONF1_ENABLE_MSK1) == CONF1_ENABLE_RES1) { pci_mechanism = 1; pci_maxdevice = 32; - return; + if (pcibus_check()) + return; }; /*--------------------------------------- @@ -195,19 +203,45 @@ pcibus_setup (void) result = inb (CONF2_ENABLE_PORT); outb (CONF2_ENABLE_PORT, 0); + outb (CONF2_FORWARD_PORT, 0); if ((result == CONF2_ENABLE_RES) && !inb (CONF2_ENABLE_PORT) && !inb (CONF2_FORWARD_PORT)) { pci_mechanism = 2; pci_maxdevice = 16; - return; + if (pcibus_check()) + return; }; + + /*----------------------------------------------------- + ** Well, is it Configuration mode 1, after all ? + **----------------------------------------------------- + */ + + oldval = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK2); + outl (CONF1_DATA_PORT, 0); + result = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, oldval); + + if (result == CONF1_ENABLE_RES2) { + pci_mechanism = 1; + pci_maxdevice = 32; + if (pcibus_check()) + return; + } + /*--------------------------------------- ** No PCI bus host bridge found **--------------------------------------- */ + if (bootverbose && (result != 0xfffffffful)) + printf ("pcibus_setup: " + "wrote 0x%08x, read back 0x%08x, expected 0x%08x\n", + CONF1_ENABLE_CHK2, result, CONF1_ENABLE_RES2); + pci_mechanism = 0; pci_maxdevice = 0; }