SRAM offset 0x0C04 is used by driver to inform the IPMI/ASF firmware
about the various driver events like load, unload, reset, suspend, restart, and ioctl operations. Define driver's event rather than using hard-coded values. We don't still send suspend/resume event to firmware. Previously bge(4) used BGE_SDI_STATUS to send events. Because driver has to access firmware mail box to inform current state, using BGE_SDI_STATUS register was wrong. The end result was the same as BGE_SDI_STATUS is 0x0C04. No functional changes.
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eca1a7f126
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@ -1314,10 +1314,12 @@ bge_sig_pre_reset(struct bge_softc *sc, int type)
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if (sc->bge_asf_mode & ASF_NEW_HANDSHAKE) {
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switch (type) {
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case BGE_RESET_START:
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bge_writemem_ind(sc, BGE_SDI_STATUS, 0x1); /* START */
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bge_writemem_ind(sc, BGE_SRAM_FW_DRV_STATE_MB,
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BGE_FW_DRV_STATE_START);
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break;
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case BGE_RESET_STOP:
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bge_writemem_ind(sc, BGE_SDI_STATUS, 0x2); /* UNLOAD */
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bge_writemem_ind(sc, BGE_SRAM_FW_DRV_STATE_MB,
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BGE_FW_DRV_STATE_UNLOAD);
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break;
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}
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}
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@ -1330,11 +1332,13 @@ bge_sig_post_reset(struct bge_softc *sc, int type)
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if (sc->bge_asf_mode & ASF_NEW_HANDSHAKE) {
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switch (type) {
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case BGE_RESET_START:
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bge_writemem_ind(sc, BGE_SDI_STATUS, 0x80000001);
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bge_writemem_ind(sc, BGE_SRAM_FW_DRV_STATE_MB,
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BGE_FW_DRV_STATE_START_DONE);
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/* START DONE */
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break;
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case BGE_RESET_STOP:
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bge_writemem_ind(sc, BGE_SDI_STATUS, 0x80000002);
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bge_writemem_ind(sc, BGE_SRAM_FW_DRV_STATE_MB,
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BGE_FW_DRV_STATE_UNLOAD_DONE);
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break;
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}
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}
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@ -1347,10 +1351,12 @@ bge_sig_legacy(struct bge_softc *sc, int type)
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if (sc->bge_asf_mode) {
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switch (type) {
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case BGE_RESET_START:
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bge_writemem_ind(sc, BGE_SDI_STATUS, 0x1); /* START */
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bge_writemem_ind(sc, BGE_SRAM_FW_DRV_STATE_MB,
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BGE_FW_DRV_STATE_START);
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break;
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case BGE_RESET_STOP:
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bge_writemem_ind(sc, BGE_SDI_STATUS, 0x2); /* UNLOAD */
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bge_writemem_ind(sc, BGE_SRAM_FW_DRV_STATE_MB,
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BGE_FW_DRV_STATE_UNLOAD);
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break;
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}
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}
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@ -77,6 +77,7 @@
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#define BGE_SRAM_FW_CMD_MB 0x00000B78
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#define BGE_SRAM_FW_CMD_LEN_MB 0x00000B7C
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#define BGE_SRAM_FW_CMD_DATA_MB 0x00000B80
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#define BGE_SRAM_FW_DRV_STATE_MB 0x00000C04
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#define BGE_SRAM_MAC_ADDR_HIGH_MB 0x00000C14
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#define BGE_SRAM_MAC_ADDR_LOW_MB 0x00000C18
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#define BGE_SOFTWARE_GENCOMM_END 0x00000FFF
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@ -93,6 +94,13 @@
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#define BGE_FW_DRV_ALIVE 0x00000001
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#define BGE_FW_PAUSE 0x00000002
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#define BGE_FW_DRV_STATE_START 0x00000001
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#define BGE_FW_DRV_STATE_START_DONE 0x80000001
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#define BGE_FW_DRV_STATE_UNLOAD 0x00000002
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#define BGE_FW_DRV_STATE_UNLOAD_DONE 0x80000002
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#define BGE_FW_DRV_STATE_WOL 0x00000003
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#define BGE_FW_DRV_STATE_SUSPEND 0x00000004
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/* Mappings for internal memory configuration */
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#define BGE_STD_RX_RINGS 0x00006000
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#define BGE_STD_RX_RINGS_END 0x00006FFF
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