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According to "Intel 64 and IA-32 Architectures Software Developer's Manual

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Volume 3B: System Programming Guide, Part 2", CPUs with family 0x6 and model
above or 0xE and CPUs with family 0xF and model above or 0x3 have invariant
TSC.
This commit is contained in:
Alexander Motin 2008-11-30 00:10:55 +00:00
parent e711c6f0d1
commit 9ee5eabc3f
1 changed files with 5 additions and 1 deletions
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6
sys/amd64/amd64/identcpu.c
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@ -368,7 +368,11 @@ printcpuinfo(void)
tsc_is_invariant = 1;
break;
case CPU_VENDOR_INTEL:
if (amd_pminfo & AMDPM_TSC_INVARIANT)
if ((amd_pminfo & AMDPM_TSC_INVARIANT) ||
(AMD64_CPU_FAMILY(cpu_id) == 0x6 &&
AMD64_CPU_MODEL(cpu_id) >= 0xe) ||
(AMD64_CPU_FAMILY(cpu_id) == 0xf &&
AMD64_CPU_MODEL(cpu_id) >= 0x3))
tsc_is_invariant = 1;
break;
}