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Alpha 8200 port: Until we fix things better, determine which alpha CPU

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platform we're running on so we know how many bits to reserve at the top
end for the 'hose' value. It turns out that there's *just* enough room
to support all possible hoses on TurboLaser.
Reviewed by:	gallatin@freebsd.org, dfr@free3bsd.org
This commit is contained in:
mjacob 2000-03-15 23:50:31 +00:00
parent 2b8f5a2c48
commit a0447a0084
2 changed files with 76 additions and 20 deletions
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48
sys/dev/pci/pci.c
View File

@ -56,6 +56,10 @@
#include <pci/pcivar.h>
#include <sys/pciio.h>
#ifdef __alpha__
#include <machine/rpb.h>
#endif
#ifdef APIC_IO
#include <machine/smp.h>
#endif /* APIC_IO */
@ -1034,17 +1038,41 @@ pci_add_map(device_t dev, pcicfgregs* cfg, int reg)
* can deal with multiple hoses
*/
if(cfg->hose){
if (base & 0x80000000) {
printf("base addr = 0x%lx\n", base);
printf("hacked addr = 0x%lx\n",
base | ((u_int64_t)cfg->hose << 31));
panic("hose encoding hack would clobber base addr");
if (cfg->hose) {
u_int32_t mask, shift, maxh;
switch (hwrpb->rpb_type) {
case ST_DEC_21000:
case ST_DEC_4100:
mask = 0xf8000000;
shift = 27;
maxh = 32;
break;
case ST_DEC_6600:
mask = 0x80000000;
shift = 31;
maxh = 2;
break;
default:
mask = 0;
shift = 0;
maxh = 0;
break;
}
if (cfg->hose > 1)
panic("only one hose supported!");
base |= ((u_int64_t)cfg->hose << 31);
if (base & mask) {
printf("base addr = 0x%llx\n", (long long) base);
printf("mask addr = 0x%lx\n", (long) mask);
printf("hacked addr = 0x%llx\n", (long long)
(base | ((u_int64_t)cfg->hose << shift)));
panic("hose encoding hack would clobber base addr");
/* NOTREACHED */
}
if (cfg->hose >= maxh) {
panic("Hose %d - can only encode %d hose(s)",
cfg->hose, maxh);
/* NOTREACHED */
}
base |= ((u_int64_t)cfg->hose << shift);
}
#endif
if (type == SYS_RES_IOPORT && !pci_porten(cfg))

48
sys/pci/pci.c
View File

@ -56,6 +56,10 @@
#include <pci/pcivar.h>
#include <sys/pciio.h>
#ifdef __alpha__
#include <machine/rpb.h>
#endif
#ifdef APIC_IO
#include <machine/smp.h>
#endif /* APIC_IO */
@ -1034,17 +1038,41 @@ pci_add_map(device_t dev, pcicfgregs* cfg, int reg)
* can deal with multiple hoses
*/
if(cfg->hose){
if (base & 0x80000000) {
printf("base addr = 0x%lx\n", base);
printf("hacked addr = 0x%lx\n",
base | ((u_int64_t)cfg->hose << 31));
panic("hose encoding hack would clobber base addr");
if (cfg->hose) {
u_int32_t mask, shift, maxh;
switch (hwrpb->rpb_type) {
case ST_DEC_21000:
case ST_DEC_4100:
mask = 0xf8000000;
shift = 27;
maxh = 32;
break;
case ST_DEC_6600:
mask = 0x80000000;
shift = 31;
maxh = 2;
break;
default:
mask = 0;
shift = 0;
maxh = 0;
break;
}
if (cfg->hose > 1)
panic("only one hose supported!");
base |= ((u_int64_t)cfg->hose << 31);
if (base & mask) {
printf("base addr = 0x%llx\n", (long long) base);
printf("mask addr = 0x%lx\n", (long) mask);
printf("hacked addr = 0x%llx\n", (long long)
(base | ((u_int64_t)cfg->hose << shift)));
panic("hose encoding hack would clobber base addr");
/* NOTREACHED */
}
if (cfg->hose >= maxh) {
panic("Hose %d - can only encode %d hose(s)",
cfg->hose, maxh);
/* NOTREACHED */
}
base |= ((u_int64_t)cfg->hose << shift);
}
#endif
if (type == SYS_RES_IOPORT && !pci_porten(cfg))