From a0f16159bd642d1541d7ba7ec2e1c28c39b761f0 Mon Sep 17 00:00:00 2001 From: Andrew Turner Date: Thu, 7 Sep 2017 15:24:47 +0000 Subject: [PATCH] Make the bit mask of ARMv8 ID registers to print sparse to keep values close, but without having to change all values when new registers are added. Sponsored by: DARPA, AFRL --- sys/arm64/arm64/identcpu.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c index fb1e1afa5351..d183519dd58d 100644 --- a/sys/arm64/arm64/identcpu.c +++ b/sys/arm64/arm64/identcpu.c @@ -88,14 +88,14 @@ struct cpu_desc cpu_desc[MAXCPU]; static u_int cpu_print_regs; #define PRINT_ID_AA64_AFR0 0x00000001 #define PRINT_ID_AA64_AFR1 0x00000002 -#define PRINT_ID_AA64_DFR0 0x00000004 -#define PRINT_ID_AA64_DFR1 0x00000008 -#define PRINT_ID_AA64_ISAR0 0x00000010 -#define PRINT_ID_AA64_ISAR1 0x00000020 -#define PRINT_ID_AA64_MMFR0 0x00000040 -#define PRINT_ID_AA64_MMFR1 0x00000080 -#define PRINT_ID_AA64_PFR0 0x00000100 -#define PRINT_ID_AA64_PFR1 0x00000200 +#define PRINT_ID_AA64_DFR0 0x00000010 +#define PRINT_ID_AA64_DFR1 0x00000020 +#define PRINT_ID_AA64_ISAR0 0x00000100 +#define PRINT_ID_AA64_ISAR1 0x00000200 +#define PRINT_ID_AA64_MMFR0 0x00001000 +#define PRINT_ID_AA64_MMFR1 0x00002000 +#define PRINT_ID_AA64_PFR0 0x00010000 +#define PRINT_ID_AA64_PFR1 0x00020000 struct cpu_parts { u_int part_id;