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This driver supports the SDL Communications RISCom/N2 ISA cards that is

Browse Source 
based on the HD64570 chip. Both the 1 and 2 port cards is supported.

Line speeds of up to 2Mbps is possible. At this speed about 95% of the
bandwidth is usable with 486DX processors.

The standard FreeBSD sppp code is used for the link level layer. The
default protocol used is PPP. The Cisco HDLC protocol can be used by
adding "link2" to the ifconfig line in /etc/sysconfig or where ever
ifconfig is run.

At the moment only the X.21 interface is tested. The others may need
tweaks to the clock selection code.
This commit is contained in:
jhay 1996-07-05 18:51:59 +00:00
parent 37de7c9701
commit a3554dc700
11 changed files with 5411 additions and 5 deletions
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125
share/man/man4/man4.i386/sr.4 Normal file
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.\"
.\" Copyright (c) 1996 John Hay. All rights reserved.
.\"
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\" notice, this list of conditions and the following disclaimer.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\" notice, this list of conditions and the following disclaimer in the
.\" documentation and/or other materials provided with the distribution.
.\" 3. All advertising materials mentioning features or use of this software
.\" must display the following acknowledgement:
.\" This product includes software developed by John Hay.
.\" 4. Neither the name of the author nor the names of any co-contributors
.\" may be used to endorse or promote products derived from this software
.\" without specific prior written permission.
.\"
.\" THIS SOFTWARE IS PROVIDED BY John Hay ``AS IS'' AND
.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
.\" ARE DISCLAIMED. IN NO EVENT SHALL John Hay BE LIABLE
.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
.\" SUCH DAMAGE.
.\"
.\" $Id$
.\"
.Dd July 4, 1996
.Dt SR 4 i386
.Os
.Sh NAME
.Nm sr
.Nd
synchronous RISCom/N2 device driver.
.Sh SYNOPSYS
.Cd "device sr0 at isa? port 0x300 net irq 10 iomem 0xd0000 vector arintr"
.Cd "device sr1 at isa? port 0x310 net irq 11 flags 0x1 iomem 0xd0000 vector arintr"
.Pp
.Cd "pseudo-device sppp"
.Sh DESCRIPTION
The
.Nm sr
driver supports the RISCom/N2 ISA cards that is based on the
HD64570 chip.
.Pp
Line speeds of up to 2Mbps is possible. At this speed about 95% of the
bandwidth is usable with 486DX processors.
.Pp
The standard FreeBSD sppp code is used for the link level layer. The
default protocol used is PPP. The Cisco HDLC protocol can be used by
adding
.Nm link2
to
.Nm ifconfig.
.Pp
The
.Nm flags
field is optional. If it isn't specified, the driver will
assume the following:
.Pp
.Bl -hang -offset indent
.It "The card has 2 ports."
.It "The clock for the serial ports is external and the transmitter uses"
the same clock as the receiver.
.El
.Pp
The
.Nm flags
are a bit field and can be used to force a different
behaviour than the default.
.Pp
.Bl -hang -offset indent
.It Em 0x01
The card has only one port.
.It Em 0x10
Use sepperate external clocks for transmit and receive on port 0.
.It Em 0x40
Use sepperate external clocks for transmit and receive on port 1.
.El
.Pp
.Sh NUMBERING
Only one line for each card is needed in the kernel configuration file.
The first card's ports will be installed from sr0. The numbering of the
next card will continue where the first stopped, eg. if the first card
is a two port card it will use sr0 and sr1. The next card will then
start at sr2.
.Pp
The card only supports IRQ 3, 4, 5, 7, 10, 11, 12 and 15.
.Pp
The iomem area is a 16Kb block and must start at a 16Kb boundary.
.Pp
.Sh DIAGNOSTICS
.Bl -diag
.It "sr%d: Warning illegal interrupt %d."
The card cannot use the specified interrupt. Choose a different one.
.El
.Sh FILES
.Bl -tag -width /sys/i386/isa/ic/hd64570.h -compact
.It Pa /sys/i386/isa/ic/hd64570.h
.It Pa /sys/i386/isa/if_srregs.h
.It Pa /sys/i386/isa/if_sr.c
.El
.Sh BUGS
At the moment only the X.21 interface is tested. The others
may need tweaks to the clock selection code.
.Pp
The code can probably stand some optimizing.
.Pp
There must be lots because this code is still very green. Please report
them to jhay@mikom.csir.co.za
.Sh SEE ALSO
.Xr ifconfig 8 ,
.Xr lsdev 8 ,
.Xr netintro 4 ,
.Xr ar 4 ,
.Xr cx 4
.Sh AUTHOR
The
.Nm sr
device driver was written by John Hay, jhay@mikom.csir.co.za.

4
sys/conf/NOTES
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@ -2,7 +2,7 @@
# LINT -- config file for checking all the sources, tries to pull in
# as much of the source tree as it can.
#
# $Id: LINT,v 1.271 1996/06/23 19:46:46 ache Exp $
# $Id: LINT,v 1.272 1996/06/26 19:42:06 gpalmer Exp $
#
# NB: You probably don't want to try running a kernel built from this
# file. Instead, you should start from GENERIC, and add options from
@ -660,6 +660,7 @@ options BREAK_TO_DEBUGGER #a BREAK on a comconsole goes to
# le: Digital Equipment EtherWorks 2 and EtherWorks 3 (DEPCA, DE100,
# DE101, DE200, DE201, DE202, DE203, DE204, DE205, DE422)
# lnc: Lance/PCnet cards (Isolan, Novell NE2100, NE32-VL)
# sr: RISCom/N2 hdlc sync 1/2 port V.35/X.21 serial driver (requires sppp)
# ze: IBM/National Semiconductor PCMCIA ethernet controller.
# zp: 3Com PCMCIA Etherlink III (It does not require shared memory for
# send/receive operation, but it needs 'iomem' to read/write the
@ -678,6 +679,7 @@ device ie0 at isa? port 0x360 net irq 7 iomem 0xd0000 vector ieintr
device ix0 at isa? port 0x300 net irq 10 iomem 0xd0000 iosiz 32768 vector ixintr
device le0 at isa? port 0x300 net irq 5 iomem 0xd0000 vector le_intr
device lnc0 at isa? port 0x300 net irq 10 drq 0 vector lncintr
device sr0 at isa? port 0x300 net irq 5 iomem 0xd0000 vector srintr
device ze0 at isa? port 0x300 net irq 5 iomem 0xd8000 vector zeintr
device zp0 at isa? port 0x300 net irq 10 iomem 0xd8000 vector zpintr

3
sys/conf/files.i386
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@ -1,7 +1,7 @@
# This file tells config what files go into building a kernel,
# files marked standard are always included.
#
# $Id: files.i386,v 1.135 1996/05/04 08:41:28 peter Exp $
# $Id: files.i386,v 1.136 1996/06/07 22:26:59 nate Exp $
#
aic7xxx_asm optional ahc device-driver \
dependency "$S/dev/aic7xxx/aic7xxx_asm.c" \
@ -105,6 +105,7 @@ i386/isa/if_ie.c optional ie device-driver
i386/isa/if_ix.c optional ix device-driver
i386/isa/if_le.c optional le device-driver
i386/isa/if_lnc.c optional lnc device-driver
i386/isa/if_sr.c optional sr device-driver
i386/isa/if_ze.c optional ze device-driver
i386/isa/if_zp.c optional zp device-driver
i386/isa/isa.c optional isa device-driver

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sys/dev/sr/if_srregs.h Normal file
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/*
* Copyright (c) 1995 John Hay. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by [your name]
* and [any other names deserving credit ]
* 4. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY [your name] AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
*/
#ifndef _IF_SRREGS_H_
#define _IF_SRREGS_H_
#define NCHAN 2 /* A HD64570 chip have 2 channels */
#define SR_BUF_SIZ 512
#define SR_TX_BLOCKS 2 /* Sepperate sets of tx buffers */
#define SRC_IO_SIZ 0x10 /* Actually a lie. It uses a lot more. */
#define SRC_WIN_SIZ 0x00004000
#define SRC_WIN_MSK (SRC_WIN_SIZ - 1)
#define SRC_WIN_SHFT 14
#define SR_FLAGS_NCHAN_MSK 0x0000000F
#define SR_FLAGS_0_CLK_MSK 0x00000030
#define SR_FLAGS_0_EXT_CLK 0x00000000 /* External RX clock shared by TX */
#define SR_FLAGS_0_EXT_SEP_CLK 0x00000010 /* Sepperate external clocks */
#define SR_FLAGS_0_INT_CLK 0x00000020 /* Internal clock */
#define SR_FLAGS_1_CLK_MSK 0x000000C0
#define SR_FLAGS_1_EXT_CLK 0x00000000 /* External RX clock shared by TX */
#define SR_FLAGS_1_EXT_SEP_CLK 0x00000040 /* Sepperate external clocks */
#define SR_FLAGS_1_INT_CLK 0x00000080 /* Internal clock */
#define SR_FLAGS_CLK_SHFT 4
#define SR_FLAGS_CLK_CHAN_SHFT 2
#define SR_FLAGS_EXT_CLK 0x00000000 /* External RX clock shared by TX */
#define SR_FLAGS_EXT_SEP_CLK 0x00000001 /* Sepperate external clocks */
#define SR_FLAGS_INT_CLK 0x00000002 /* Internal clock */
#define SR_PCR 0x00 /* RW, PC Control Register */
#define SR_BAR 0x02 /* RW, Base Address Register */
#define SR_PSR 0x04 /* RW, Page Scan Register */
#define SR_MCR 0x06 /* RW, Modem Control Register */
#define SR_PCR_SCARUN 0x01 /* !Reset */
#define SR_PCR_EN_VPM 0x02 /* Running above 1M */
#define SR_PCR_MEM_WIN 0x04 /* Open memory window */
#define SR_PCR_ISA16 0x08 /* 16 bit ISA mode */
#define SR_PCR_16M_SEL 0xF0 /* A20-A23 Addresses */
#define SR_PSR_PG_SEL 0x1F /* Page 0 - 31 select */
#define SR_PG_MSK 0x1F
#define SR_PSR_WIN_SIZ 0x60 /* Window size select */
#define SR_PSR_WIN_16K 0x00
#define SR_PSR_WIN_32K 0x20
#define SR_PSR_WIN_64K 0x40
#define SR_PSR_WIN_128K 0x60
#define SR_PSR_EN_SCA_DMA 0x80 /* Enable the SCA DMA */
#define SR_MCR_DTR0 0x01 /* Deactivate DTR0 */
#define SR_MCR_DTR1 0x02 /* Deactivate DTR1 */
#define SR_MCR_DSR0 0x04 /* DSR0 Status */
#define SR_MCR_DSR1 0x08 /* DSR1 Status */
#define SR_MCR_TE0 0x10 /* Enable RS422 TXD */
#define SR_MCR_TE1 0x20 /* Enable RS422 TXD */
#define SR_MCR_ETC0 0x40 /* Enable Ext Clock out */
#define SR_MCR_ETC1 0x80 /* Enable Ext Clock out */
#endif /* _IF_SRREGS_H_ */

4
sys/i386/conf/LINT
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@ -2,7 +2,7 @@
# LINT -- config file for checking all the sources, tries to pull in
# as much of the source tree as it can.
#
# $Id: LINT,v 1.271 1996/06/23 19:46:46 ache Exp $
# $Id: LINT,v 1.272 1996/06/26 19:42:06 gpalmer Exp $
#
# NB: You probably don't want to try running a kernel built from this
# file. Instead, you should start from GENERIC, and add options from
@ -660,6 +660,7 @@ options BREAK_TO_DEBUGGER #a BREAK on a comconsole goes to
# le: Digital Equipment EtherWorks 2 and EtherWorks 3 (DEPCA, DE100,
# DE101, DE200, DE201, DE202, DE203, DE204, DE205, DE422)
# lnc: Lance/PCnet cards (Isolan, Novell NE2100, NE32-VL)
# sr: RISCom/N2 hdlc sync 1/2 port V.35/X.21 serial driver (requires sppp)
# ze: IBM/National Semiconductor PCMCIA ethernet controller.
# zp: 3Com PCMCIA Etherlink III (It does not require shared memory for
# send/receive operation, but it needs 'iomem' to read/write the
@ -678,6 +679,7 @@ device ie0 at isa? port 0x360 net irq 7 iomem 0xd0000 vector ieintr
device ix0 at isa? port 0x300 net irq 10 iomem 0xd0000 iosiz 32768 vector ixintr
device le0 at isa? port 0x300 net irq 5 iomem 0xd0000 vector le_intr
device lnc0 at isa? port 0x300 net irq 10 drq 0 vector lncintr
device sr0 at isa? port 0x300 net irq 5 iomem 0xd0000 vector srintr
device ze0 at isa? port 0x300 net irq 5 iomem 0xd8000 vector zeintr
device zp0 at isa? port 0x300 net irq 10 iomem 0xd8000 vector zpintr

4
sys/i386/conf/NOTES
View File

@ -2,7 +2,7 @@
# LINT -- config file for checking all the sources, tries to pull in
# as much of the source tree as it can.
#
# $Id: LINT,v 1.271 1996/06/23 19:46:46 ache Exp $
# $Id: LINT,v 1.272 1996/06/26 19:42:06 gpalmer Exp $
#
# NB: You probably don't want to try running a kernel built from this
# file. Instead, you should start from GENERIC, and add options from
@ -660,6 +660,7 @@ options BREAK_TO_DEBUGGER #a BREAK on a comconsole goes to
# le: Digital Equipment EtherWorks 2 and EtherWorks 3 (DEPCA, DE100,
# DE101, DE200, DE201, DE202, DE203, DE204, DE205, DE422)
# lnc: Lance/PCnet cards (Isolan, Novell NE2100, NE32-VL)
# sr: RISCom/N2 hdlc sync 1/2 port V.35/X.21 serial driver (requires sppp)
# ze: IBM/National Semiconductor PCMCIA ethernet controller.
# zp: 3Com PCMCIA Etherlink III (It does not require shared memory for
# send/receive operation, but it needs 'iomem' to read/write the
@ -678,6 +679,7 @@ device ie0 at isa? port 0x360 net irq 7 iomem 0xd0000 vector ieintr
device ix0 at isa? port 0x300 net irq 10 iomem 0xd0000 iosiz 32768 vector ixintr
device le0 at isa? port 0x300 net irq 5 iomem 0xd0000 vector le_intr
device lnc0 at isa? port 0x300 net irq 10 drq 0 vector lncintr
device sr0 at isa? port 0x300 net irq 5 iomem 0xd0000 vector srintr
device ze0 at isa? port 0x300 net irq 5 iomem 0xd8000 vector zeintr
device zp0 at isa? port 0x300 net irq 10 iomem 0xd8000 vector zpintr

3
sys/i386/conf/files.i386
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@ -1,7 +1,7 @@
# This file tells config what files go into building a kernel,
# files marked standard are always included.
#
# $Id: files.i386,v 1.135 1996/05/04 08:41:28 peter Exp $
# $Id: files.i386,v 1.136 1996/06/07 22:26:59 nate Exp $
#
aic7xxx_asm optional ahc device-driver \
dependency "$S/dev/aic7xxx/aic7xxx_asm.c" \
@ -105,6 +105,7 @@ i386/isa/if_ie.c optional ie device-driver
i386/isa/if_ix.c optional ix device-driver
i386/isa/if_le.c optional le device-driver
i386/isa/if_lnc.c optional lnc device-driver
i386/isa/if_sr.c optional sr device-driver
i386/isa/if_ze.c optional ze device-driver
i386/isa/if_zp.c optional zp device-driver
i386/isa/isa.c optional isa device-driver

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sys/i386/isa/if_srregs.h Normal file
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/*
* Copyright (c) 1995 John Hay. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by [your name]
* and [any other names deserving credit ]
* 4. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY [your name] AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
*/
#ifndef _IF_SRREGS_H_
#define _IF_SRREGS_H_
#define NCHAN 2 /* A HD64570 chip have 2 channels */
#define SR_BUF_SIZ 512
#define SR_TX_BLOCKS 2 /* Sepperate sets of tx buffers */
#define SRC_IO_SIZ 0x10 /* Actually a lie. It uses a lot more. */
#define SRC_WIN_SIZ 0x00004000
#define SRC_WIN_MSK (SRC_WIN_SIZ - 1)
#define SRC_WIN_SHFT 14
#define SR_FLAGS_NCHAN_MSK 0x0000000F
#define SR_FLAGS_0_CLK_MSK 0x00000030
#define SR_FLAGS_0_EXT_CLK 0x00000000 /* External RX clock shared by TX */
#define SR_FLAGS_0_EXT_SEP_CLK 0x00000010 /* Sepperate external clocks */
#define SR_FLAGS_0_INT_CLK 0x00000020 /* Internal clock */
#define SR_FLAGS_1_CLK_MSK 0x000000C0
#define SR_FLAGS_1_EXT_CLK 0x00000000 /* External RX clock shared by TX */
#define SR_FLAGS_1_EXT_SEP_CLK 0x00000040 /* Sepperate external clocks */
#define SR_FLAGS_1_INT_CLK 0x00000080 /* Internal clock */
#define SR_FLAGS_CLK_SHFT 4
#define SR_FLAGS_CLK_CHAN_SHFT 2
#define SR_FLAGS_EXT_CLK 0x00000000 /* External RX clock shared by TX */
#define SR_FLAGS_EXT_SEP_CLK 0x00000001 /* Sepperate external clocks */
#define SR_FLAGS_INT_CLK 0x00000002 /* Internal clock */
#define SR_PCR 0x00 /* RW, PC Control Register */
#define SR_BAR 0x02 /* RW, Base Address Register */
#define SR_PSR 0x04 /* RW, Page Scan Register */
#define SR_MCR 0x06 /* RW, Modem Control Register */
#define SR_PCR_SCARUN 0x01 /* !Reset */
#define SR_PCR_EN_VPM 0x02 /* Running above 1M */
#define SR_PCR_MEM_WIN 0x04 /* Open memory window */
#define SR_PCR_ISA16 0x08 /* 16 bit ISA mode */
#define SR_PCR_16M_SEL 0xF0 /* A20-A23 Addresses */
#define SR_PSR_PG_SEL 0x1F /* Page 0 - 31 select */
#define SR_PG_MSK 0x1F
#define SR_PSR_WIN_SIZ 0x60 /* Window size select */
#define SR_PSR_WIN_16K 0x00
#define SR_PSR_WIN_32K 0x20
#define SR_PSR_WIN_64K 0x40
#define SR_PSR_WIN_128K 0x60
#define SR_PSR_EN_SCA_DMA 0x80 /* Enable the SCA DMA */
#define SR_MCR_DTR0 0x01 /* Deactivate DTR0 */
#define SR_MCR_DTR1 0x02 /* Deactivate DTR1 */
#define SR_MCR_DSR0 0x04 /* DSR0 Status */
#define SR_MCR_DSR1 0x08 /* DSR1 Status */
#define SR_MCR_TE0 0x10 /* Enable RS422 TXD */
#define SR_MCR_TE1 0x20 /* Enable RS422 TXD */
#define SR_MCR_ETC0 0x40 /* Enable Ext Clock out */
#define SR_MCR_ETC1 0x80 /* Enable Ext Clock out */
#endif /* _IF_SRREGS_H_ */