Enhance the interrupt capabilities of ti_pruss driver.
The existing ti_pruss driver for the PRUSS Hardware provided by the AM335x ARM CPU has basic interrupt capabilities. This updated driver provides some more options: - Sysctl based configuration for the interrupts (for some examples, see the test plan in the phabricator review cited below). - A device file (/dev/pruss0.irqN) for each enabled interrupt. This file can be read and the device blocks if no irq has happened or returns an uint64_t timestamp based on nanouptime(). - Each interrupt device file provides kqueue-based event notification, blocking read(), or select(). Submitted by: Manuel Stuhn <freebsdnewbie@freenet.de> Differential Revision: https://reviews.freebsd.org/D11959
This commit is contained in:
parent
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commit
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@ -1,5 +1,6 @@
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/*-
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* Copyright (c) 2013 Rui Paulo <rpaulo@FreeBSD.org>
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* Copyright (c) 2017 Manuel Stuehn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -26,27 +27,32 @@
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/poll.h>
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#include <sys/time.h>
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#include <sys/uio.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/fcntl.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/rman.h>
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#include <sys/types.h>
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#include <sys/sysctl.h>
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#include <sys/event.h>
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#include <sys/selinfo.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/frame.h>
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#include <machine/intr.h>
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#include <machine/atomic.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <machine/bus.h>
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#include <arm/ti/ti_prcm.h>
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#include <arm/ti/ti_pruss.h>
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@ -59,27 +65,72 @@ __FBSDID("$FreeBSD$");
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#define DPRINTF(fmt, ...)
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#endif
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static d_open_t ti_pruss_irq_open;
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static d_read_t ti_pruss_irq_read;
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static d_poll_t ti_pruss_irq_poll;
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static device_probe_t ti_pruss_probe;
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static device_attach_t ti_pruss_attach;
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static device_detach_t ti_pruss_detach;
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static void ti_pruss_intr(void *);
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static d_open_t ti_pruss_open;
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static d_mmap_t ti_pruss_mmap;
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static void ti_pruss_kq_read_detach(struct knote *);
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static int ti_pruss_kq_read_event(struct knote *, long);
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static d_kqfilter_t ti_pruss_kqfilter;
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static void ti_pruss_irq_kqread_detach(struct knote *);
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static int ti_pruss_irq_kqevent(struct knote *, long);
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static d_kqfilter_t ti_pruss_irq_kqfilter;
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static void ti_pruss_privdtor(void *data);
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#define TI_PRUSS_IRQS 8
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#define TI_PRUSS_PRU_IRQS 2
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#define TI_PRUSS_HOST_IRQS 8
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#define TI_PRUSS_IRQS (TI_PRUSS_HOST_IRQS+TI_PRUSS_PRU_IRQS)
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#define TI_PRUSS_EVENTS 64
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#define NOT_SET_STR "NONE"
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#define TI_TS_ARRAY 16
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struct ctl
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{
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size_t cnt;
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size_t idx;
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};
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struct ts_ring_buf
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{
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struct ctl ctl;
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uint64_t ts[TI_TS_ARRAY];
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};
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struct ti_pruss_irqsc
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{
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struct mtx sc_mtx;
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struct cdev *sc_pdev;
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struct selinfo sc_selinfo;
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int8_t channel;
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int8_t last;
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int8_t event;
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bool enable;
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struct ts_ring_buf tstamps;
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};
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static struct cdevsw ti_pruss_cdevirq = {
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.d_version = D_VERSION,
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.d_name = "ti_pruss_irq",
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.d_open = ti_pruss_irq_open,
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.d_read = ti_pruss_irq_read,
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.d_poll = ti_pruss_irq_poll,
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.d_kqfilter = ti_pruss_irq_kqfilter,
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};
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struct ti_pruss_softc {
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struct mtx sc_mtx;
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struct resource *sc_mem_res;
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struct resource *sc_irq_res[TI_PRUSS_IRQS];
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void *sc_intr[TI_PRUSS_IRQS];
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struct resource *sc_irq_res[TI_PRUSS_HOST_IRQS];
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void *sc_intr[TI_PRUSS_HOST_IRQS];
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struct ti_pruss_irqsc sc_irq_devs[TI_PRUSS_IRQS];
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bus_space_tag_t sc_bt;
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bus_space_handle_t sc_bh;
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struct cdev *sc_pdev;
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struct selinfo sc_selinfo;
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bool sc_glob_irqen;
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};
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static struct cdevsw ti_pruss_cdevsw = {
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@ -87,7 +138,6 @@ static struct cdevsw ti_pruss_cdevsw = {
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.d_name = "ti_pruss",
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.d_open = ti_pruss_open,
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.d_mmap = ti_pruss_mmap,
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.d_kqfilter = ti_pruss_kqfilter,
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};
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static device_method_t ti_pruss_methods[] = {
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@ -107,6 +157,7 @@ static driver_t ti_pruss_driver = {
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static devclass_t ti_pruss_devclass;
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DRIVER_MODULE(ti_pruss, simplebus, ti_pruss_driver, ti_pruss_devclass, 0, 0);
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MODULE_DEPEND(ti_pruss, ti_prcm, 1, 1, 1);
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static struct resource_spec ti_pruss_irq_spec[] = {
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{ SYS_RES_IRQ, 0, RF_ACTIVE },
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@ -119,7 +170,111 @@ static struct resource_spec ti_pruss_irq_spec[] = {
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{ SYS_RES_IRQ, 7, RF_ACTIVE },
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{ -1, 0, 0 }
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};
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CTASSERT(TI_PRUSS_IRQS == nitems(ti_pruss_irq_spec) - 1);
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CTASSERT(TI_PRUSS_HOST_IRQS == nitems(ti_pruss_irq_spec) - 1);
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static int
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ti_pruss_irq_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
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{
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struct ctl* irqs;
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struct ti_pruss_irqsc *sc;
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sc = dev->si_drv1;
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irqs = malloc(sizeof(struct ctl), M_DEVBUF, M_WAITOK);
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if (!irqs)
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return (ENOMEM);
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irqs->cnt = sc->tstamps.ctl.cnt;
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irqs->idx = sc->tstamps.ctl.idx;
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return devfs_set_cdevpriv(irqs, ti_pruss_privdtor);
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}
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static void
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ti_pruss_privdtor(void *data)
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{
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free(data, M_DEVBUF);
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}
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static int
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ti_pruss_irq_poll(struct cdev *dev, int events, struct thread *td)
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{
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struct ctl* irqs;
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struct ti_pruss_irqsc *sc;
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sc = dev->si_drv1;
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devfs_get_cdevpriv((void**)&irqs);
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if (events & (POLLIN | POLLRDNORM)) {
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if (sc->tstamps.ctl.cnt != irqs->cnt)
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return events & (POLLIN | POLLRDNORM);
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else
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selrecord(td, &sc->sc_selinfo);
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}
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return 0;
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}
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static int
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ti_pruss_irq_read(struct cdev *cdev, struct uio *uio, int ioflag)
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{
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const size_t ts_len = sizeof(uint64_t);
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struct ti_pruss_irqsc* irq;
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struct ctl* priv;
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int error = 0;
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size_t idx;
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ssize_t level;
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irq = cdev->si_drv1;
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if (uio->uio_resid < ts_len)
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return (EINVAL);
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error = devfs_get_cdevpriv((void**)&priv);
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if (error)
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return (error);
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mtx_lock(&irq->sc_mtx);
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if (irq->tstamps.ctl.cnt - priv->cnt > TI_TS_ARRAY)
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{
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priv->cnt = irq->tstamps.ctl.cnt;
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priv->idx = irq->tstamps.ctl.idx;
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mtx_unlock(&irq->sc_mtx);
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return (ENXIO);
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}
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do {
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idx = priv->idx;
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level = irq->tstamps.ctl.idx - idx;
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if (level < 0)
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level += TI_TS_ARRAY;
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if (level == 0) {
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if (ioflag & O_NONBLOCK) {
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mtx_unlock(&irq->sc_mtx);
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return (EWOULDBLOCK);
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}
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error = msleep(irq, &irq->sc_mtx, PCATCH | PDROP,
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"pruirq", 0);
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if (error)
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return error;
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mtx_lock(&irq->sc_mtx);
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}
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}while(level == 0);
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mtx_unlock(&irq->sc_mtx);
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error = uiomove(&irq->tstamps.ts[idx], ts_len, uio);
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if (++idx == TI_TS_ARRAY)
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idx = 0;
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priv->idx = idx;
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atomic_add_32(&priv->cnt, 1);
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return (error);
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}
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static struct ti_pruss_irq_arg {
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int irq;
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@ -138,6 +293,204 @@ ti_pruss_reg_write(struct ti_pruss_softc *sc, uint32_t reg, uint32_t val)
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bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val);
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}
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static __inline void
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ti_pruss_interrupts_clear(struct ti_pruss_softc *sc)
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{
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/* disable global interrupt */
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ti_pruss_reg_write(sc, PRUSS_INTC_GER, 0 );
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/* clear all events */
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ti_pruss_reg_write(sc, PRUSS_INTC_SECR0, 0xFFFFFFFF);
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ti_pruss_reg_write(sc, PRUSS_INTC_SECR1, 0xFFFFFFFF);
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/* disable all host interrupts */
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ti_pruss_reg_write(sc, PRUSS_INTC_HIER, 0);
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}
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static __inline int
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ti_pruss_interrupts_enable(struct ti_pruss_softc *sc, int8_t irq, bool enable)
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{
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if (enable && ((sc->sc_irq_devs[irq].channel == -1) ||
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(sc->sc_irq_devs[irq].event== -1)))
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{
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device_printf( sc->sc_pdev->si_drv1,
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"Interrupt chain not fully configured, not possible to enable\n" );
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return (EINVAL);
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}
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sc->sc_irq_devs[irq].enable = enable;
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if (sc->sc_irq_devs[irq].sc_pdev) {
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destroy_dev(sc->sc_irq_devs[irq].sc_pdev);
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sc->sc_irq_devs[irq].sc_pdev = NULL;
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}
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if (enable) {
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sc->sc_irq_devs[irq].sc_pdev = make_dev(&ti_pruss_cdevirq, 0, UID_ROOT, GID_WHEEL,
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0600, "pruss%d.irq%d", device_get_unit(sc->sc_pdev->si_drv1), irq);
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sc->sc_irq_devs[irq].sc_pdev->si_drv1 = &sc->sc_irq_devs[irq];
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sc->sc_irq_devs[irq].tstamps.ctl.idx = 0;
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}
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uint32_t reg = enable ? PRUSS_INTC_HIEISR : PRUSS_INTC_HIDISR;
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ti_pruss_reg_write(sc, reg, sc->sc_irq_devs[irq].channel);
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reg = enable ? PRUSS_INTC_EISR : PRUSS_INTC_EICR;
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ti_pruss_reg_write(sc, reg, sc->sc_irq_devs[irq].event );
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return (0);
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}
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static __inline void
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ti_pruss_map_write(struct ti_pruss_softc *sc, uint32_t basereg, uint8_t index, uint8_t content)
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{
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const size_t regadr = basereg + index & ~0x03;
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const size_t bitpos = (index & 0x03) * 8;
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uint32_t rmw = ti_pruss_reg_read(sc, regadr);
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rmw = (rmw & ~( 0xF << bitpos)) | ( (content & 0xF) << bitpos);
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ti_pruss_reg_write(sc, regadr, rmw);
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}
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static int
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ti_pruss_event_map( SYSCTL_HANDLER_ARGS )
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{
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struct ti_pruss_softc *sc;
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const int8_t irq = arg2;
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int err;
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char event[sizeof(NOT_SET_STR)];
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sc = arg1;
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if(sc->sc_irq_devs[irq].event == -1)
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bcopy(NOT_SET_STR, event, sizeof(event));
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else
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snprintf(event, sizeof(event), "%d", sc->sc_irq_devs[irq].event);
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err = sysctl_handle_string(oidp, event, sizeof(event), req);
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if(err != 0)
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return (err);
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if (req->newptr) { // write event
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if (strcmp(NOT_SET_STR, event) == 0) {
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ti_pruss_interrupts_enable(sc, irq, false);
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sc->sc_irq_devs[irq].event = -1;
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} else {
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if (sc->sc_irq_devs[irq].channel == -1) {
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device_printf( sc->sc_pdev->si_drv1,
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"corresponding channel not configured\n");
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return (ENXIO);
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}
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const int8_t channelnr = sc->sc_irq_devs[irq].channel;
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const int8_t eventnr = strtol( event, NULL, 10 ); // TODO: check if strol is valid
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if (eventnr > TI_PRUSS_EVENTS || eventnr < 0) {
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device_printf( sc->sc_pdev->si_drv1,
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"Event number %d not valid (0 - %d)",
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channelnr, TI_PRUSS_EVENTS -1);
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return (EINVAL);
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}
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sc->sc_irq_devs[irq].channel = channelnr;
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sc->sc_irq_devs[irq].event = eventnr;
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// event[nr] <= channel
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ti_pruss_map_write(sc, PRUSS_INTC_CMR_BASE,
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eventnr, channelnr);
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}
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}
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return (err);
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}
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static int
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ti_pruss_channel_map(SYSCTL_HANDLER_ARGS)
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{
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struct ti_pruss_softc *sc;
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int err;
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char channel[sizeof(NOT_SET_STR)];
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const int8_t irq = arg2;
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sc = arg1;
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if (sc->sc_irq_devs[irq].channel == -1)
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bcopy(NOT_SET_STR, channel, sizeof(channel));
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else
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snprintf(channel, sizeof(channel), "%d", sc->sc_irq_devs[irq].channel);
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err = sysctl_handle_string(oidp, channel, sizeof(channel), req);
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if (err != 0)
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return (err);
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if (req->newptr) { // write event
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if (strcmp(NOT_SET_STR, channel) == 0) {
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ti_pruss_interrupts_enable(sc, irq, false);
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ti_pruss_reg_write(sc, PRUSS_INTC_HIDISR,
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sc->sc_irq_devs[irq].channel);
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sc->sc_irq_devs[irq].channel = -1;
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} else {
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const int8_t channelnr = strtol(channel, NULL, 10); // TODO: check if strol is valid
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if (channelnr > TI_PRUSS_IRQS || channelnr < 0)
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{
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device_printf(sc->sc_pdev->si_drv1,
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"Channel number %d not valid (0 - %d)",
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channelnr, TI_PRUSS_IRQS-1);
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return (EINVAL);
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}
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sc->sc_irq_devs[irq].channel = channelnr;
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sc->sc_irq_devs[irq].last = -1;
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// channel[nr] <= irqnr
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ti_pruss_map_write(sc, PRUSS_INTC_HMR_BASE,
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irq, channelnr);
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}
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}
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return (err);
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}
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static int
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ti_pruss_interrupt_enable(SYSCTL_HANDLER_ARGS)
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{
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struct ti_pruss_softc *sc;
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int err;
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bool irqenable;
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const int8_t irq = arg2;
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sc = arg1;
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irqenable = sc->sc_irq_devs[arg2].enable;
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err = sysctl_handle_bool(oidp, &irqenable, arg2, req);
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if (err != 0)
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return (err);
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if (req->newptr) // write enable
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return ti_pruss_interrupts_enable(sc, irq, irqenable);
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return (err);
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}
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static int
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ti_pruss_global_interrupt_enable(SYSCTL_HANDLER_ARGS)
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{
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struct ti_pruss_softc *sc;
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int err;
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bool glob_irqen;
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sc = arg1;
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glob_irqen = sc->sc_glob_irqen;
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err = sysctl_handle_bool(oidp, &glob_irqen, arg2, req);
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if (err != 0)
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return (err);
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if (req->newptr) {
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sc->sc_glob_irqen = glob_irqen;
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||||
ti_pruss_reg_write(sc, PRUSS_INTC_GER, glob_irqen);
|
||||
}
|
||||
|
||||
return (err);
|
||||
}
|
||||
static int
|
||||
ti_pruss_probe(device_t dev)
|
||||
{
|
||||
@ -167,13 +520,31 @@ ti_pruss_attach(device_t dev)
|
||||
sc = device_get_softc(dev);
|
||||
rid = 0;
|
||||
mtx_init(&sc->sc_mtx, "TI PRUSS", NULL, MTX_DEF);
|
||||
knlist_init_mtx(&sc->sc_selinfo.si_note, &sc->sc_mtx);
|
||||
sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
|
||||
RF_ACTIVE);
|
||||
if (sc->sc_mem_res == NULL) {
|
||||
device_printf(dev, "could not allocate memory resource\n");
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
struct sysctl_ctx_list *clist = device_get_sysctl_ctx(dev);
|
||||
if (!clist)
|
||||
return (EINVAL);
|
||||
|
||||
struct sysctl_oid *poid;
|
||||
poid = device_get_sysctl_tree( dev );
|
||||
if (!poid)
|
||||
return (EINVAL);
|
||||
|
||||
sc->sc_glob_irqen = false;
|
||||
struct sysctl_oid *irq_root = SYSCTL_ADD_NODE(clist, SYSCTL_CHILDREN(poid),
|
||||
OID_AUTO, "irq", CTLFLAG_RD, 0,
|
||||
"PRUSS Host Interrupts");
|
||||
SYSCTL_ADD_PROC(clist, SYSCTL_CHILDREN(poid), OID_AUTO,
|
||||
"global_interrupt_enable", CTLFLAG_RW | CTLTYPE_U8,
|
||||
sc, 0, ti_pruss_global_interrupt_enable,
|
||||
"CU", "Global interrupt enable");
|
||||
|
||||
sc->sc_bt = rman_get_bustag(sc->sc_mem_res);
|
||||
sc->sc_bh = rman_get_bushandle(sc->sc_mem_res);
|
||||
if (bus_alloc_resources(dev, ti_pruss_irq_spec, sc->sc_irq_res) != 0) {
|
||||
@ -181,48 +552,91 @@ ti_pruss_attach(device_t dev)
|
||||
ti_pruss_detach(dev);
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
ti_pruss_interrupts_clear(sc);
|
||||
|
||||
for (i = 0; i < TI_PRUSS_IRQS; i++) {
|
||||
ti_pruss_irq_args[i].irq = i;
|
||||
ti_pruss_irq_args[i].sc = sc;
|
||||
if (bus_setup_intr(dev, sc->sc_irq_res[i],
|
||||
INTR_MPSAFE | INTR_TYPE_MISC,
|
||||
NULL, ti_pruss_intr, &ti_pruss_irq_args[i],
|
||||
&sc->sc_intr[i]) != 0) {
|
||||
device_printf(dev,
|
||||
"unable to setup the interrupt handler\n");
|
||||
ti_pruss_detach(dev);
|
||||
return (ENXIO);
|
||||
char name[8];
|
||||
snprintf(name, sizeof(name), "%d", i);
|
||||
|
||||
struct sysctl_oid *irq_nodes = SYSCTL_ADD_NODE(clist, SYSCTL_CHILDREN(irq_root),
|
||||
OID_AUTO, name, CTLFLAG_RD, 0,
|
||||
"PRUSS Interrupts");
|
||||
SYSCTL_ADD_PROC(clist, SYSCTL_CHILDREN(irq_nodes), OID_AUTO,
|
||||
"channel", CTLFLAG_RW | CTLTYPE_STRING, sc, i, ti_pruss_channel_map,
|
||||
"A", "Channel attached to this irq");
|
||||
SYSCTL_ADD_PROC(clist, SYSCTL_CHILDREN(irq_nodes), OID_AUTO,
|
||||
"event", CTLFLAG_RW | CTLTYPE_STRING, sc, i, ti_pruss_event_map,
|
||||
"A", "Event attached to this irq");
|
||||
SYSCTL_ADD_PROC(clist, SYSCTL_CHILDREN(irq_nodes), OID_AUTO,
|
||||
"enable", CTLFLAG_RW | CTLTYPE_U8, sc, i, ti_pruss_interrupt_enable,
|
||||
"CU", "Enable/Disable interrupt");
|
||||
|
||||
sc->sc_irq_devs[i].event = -1;
|
||||
sc->sc_irq_devs[i].channel = -1;
|
||||
sc->sc_irq_devs[i].tstamps.ctl.idx = 0;
|
||||
|
||||
if (i < TI_PRUSS_HOST_IRQS) {
|
||||
ti_pruss_irq_args[i].irq = i;
|
||||
ti_pruss_irq_args[i].sc = sc;
|
||||
if (bus_setup_intr(dev, sc->sc_irq_res[i],
|
||||
INTR_MPSAFE | INTR_TYPE_MISC,
|
||||
NULL, ti_pruss_intr, &ti_pruss_irq_args[i],
|
||||
&sc->sc_intr[i]) != 0) {
|
||||
device_printf(dev,
|
||||
"unable to setup the interrupt handler\n");
|
||||
ti_pruss_detach(dev);
|
||||
|
||||
return (ENXIO);
|
||||
}
|
||||
mtx_init(&sc->sc_irq_devs[i].sc_mtx, "TI PRUSS IRQ", NULL, MTX_DEF);
|
||||
knlist_init_mtx(&sc->sc_irq_devs[i].sc_selinfo.si_note, &sc->sc_irq_devs[i].sc_mtx);
|
||||
}
|
||||
}
|
||||
if (ti_pruss_reg_read(sc, PRUSS_AM18XX_INTC) == PRUSS_AM18XX_REV)
|
||||
device_printf(dev, "AM18xx PRU-ICSS\n");
|
||||
else if (ti_pruss_reg_read(sc, PRUSS_AM33XX_INTC) == PRUSS_AM33XX_REV)
|
||||
|
||||
if (ti_pruss_reg_read(sc, PRUSS_AM33XX_INTC) == PRUSS_AM33XX_REV)
|
||||
device_printf(dev, "AM33xx PRU-ICSS\n");
|
||||
|
||||
sc->sc_pdev = make_dev(&ti_pruss_cdevsw, 0, UID_ROOT, GID_WHEEL,
|
||||
0600, "pruss%d", device_get_unit(dev));
|
||||
sc->sc_pdev->si_drv1 = dev;
|
||||
|
||||
/* Acc. to datasheet always write 1 to polarity registers */
|
||||
ti_pruss_reg_write(sc, PRUSS_INTC_SIPR0, 0xFFFFFFFF);
|
||||
ti_pruss_reg_write(sc, PRUSS_INTC_SIPR1, 0xFFFFFFFF);
|
||||
|
||||
/* Acc. to datasheet always write 0 to event type registers */
|
||||
ti_pruss_reg_write(sc, PRUSS_INTC_SITR0, 0);
|
||||
ti_pruss_reg_write(sc, PRUSS_INTC_SITR1, 0);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
ti_pruss_detach(device_t dev)
|
||||
{
|
||||
struct ti_pruss_softc *sc;
|
||||
int i;
|
||||
struct ti_pruss_softc *sc = device_get_softc(dev);
|
||||
|
||||
ti_pruss_interrupts_clear(sc);
|
||||
|
||||
for (int i = 0; i < TI_PRUSS_HOST_IRQS; i++) {
|
||||
ti_pruss_interrupts_enable( sc, i, false );
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
for (i = 0; i < TI_PRUSS_IRQS; i++) {
|
||||
if (sc->sc_intr[i])
|
||||
bus_teardown_intr(dev, sc->sc_irq_res[i], sc->sc_intr[i]);
|
||||
if (sc->sc_irq_res[i])
|
||||
bus_release_resource(dev, SYS_RES_IRQ,
|
||||
rman_get_rid(sc->sc_irq_res[i]),
|
||||
sc->sc_irq_res[i]);
|
||||
knlist_clear(&sc->sc_irq_devs[i].sc_selinfo.si_note, 0);
|
||||
mtx_lock(&sc->sc_irq_devs[i].sc_mtx);
|
||||
if (!knlist_empty(&sc->sc_irq_devs[i].sc_selinfo.si_note))
|
||||
printf("IRQ %d KQueue not empty!\n", i );
|
||||
mtx_unlock(&sc->sc_irq_devs[i].sc_mtx);
|
||||
knlist_destroy(&sc->sc_irq_devs[i].sc_selinfo.si_note);
|
||||
mtx_destroy(&sc->sc_irq_devs[i].sc_mtx);
|
||||
}
|
||||
knlist_clear(&sc->sc_selinfo.si_note, 0);
|
||||
knlist_destroy(&sc->sc_selinfo.si_note);
|
||||
|
||||
mtx_destroy(&sc->sc_mtx);
|
||||
if (sc->sc_mem_res)
|
||||
bus_release_resource(dev, SYS_RES_MEMORY, rman_get_rid(sc->sc_mem_res),
|
||||
@ -240,19 +654,38 @@ ti_pruss_intr(void *arg)
|
||||
struct ti_pruss_irq_arg *iap = arg;
|
||||
struct ti_pruss_softc *sc = iap->sc;
|
||||
/*
|
||||
* Interrupts pr1_host_intr[0:7] are mapped to
|
||||
* Interrupts pr1_host_intr[0:7] are mapped to
|
||||
* Host-2 to Host-9 of PRU-ICSS IRQ-controller.
|
||||
*/
|
||||
const int pru_int = iap->irq + 2;
|
||||
const int pru_int = iap->irq + TI_PRUSS_PRU_IRQS;
|
||||
const int pru_int_mask = (1 << pru_int);
|
||||
const int pru_channel = sc->sc_irq_devs[pru_int].channel;
|
||||
const int pru_event = sc->sc_irq_devs[pru_channel].event;
|
||||
|
||||
val = ti_pruss_reg_read(sc, PRUSS_AM33XX_INTC + PRUSS_INTC_HIER);
|
||||
DPRINTF("interrupt %p, %d", sc, pru_int);
|
||||
val = ti_pruss_reg_read(sc, PRUSS_INTC_HIER);
|
||||
if (!(val & pru_int_mask))
|
||||
return;
|
||||
ti_pruss_reg_write(sc, PRUSS_AM33XX_INTC + PRUSS_INTC_HIDISR,
|
||||
pru_int);
|
||||
KNOTE_UNLOCKED(&sc->sc_selinfo.si_note, pru_int);
|
||||
|
||||
ti_pruss_reg_write(sc, PRUSS_INTC_HIDISR, pru_int);
|
||||
ti_pruss_reg_write(sc, PRUSS_INTC_SICR, pru_event);
|
||||
ti_pruss_reg_write(sc, PRUSS_INTC_HIEISR, pru_int);
|
||||
|
||||
struct ti_pruss_irqsc* irq = &sc->sc_irq_devs[pru_channel];
|
||||
size_t wr = irq->tstamps.ctl.idx;
|
||||
|
||||
struct timespec ts;
|
||||
nanouptime(&ts);
|
||||
irq->tstamps.ts[wr] = ts.tv_sec * 1000000000 + ts.tv_nsec;
|
||||
|
||||
if (++wr == TI_TS_ARRAY)
|
||||
wr = 0;
|
||||
atomic_add_32(&irq->tstamps.ctl.cnt, 1);
|
||||
|
||||
irq->tstamps.ctl.idx = wr;
|
||||
|
||||
KNOTE_UNLOCKED(&irq->sc_selinfo.si_note, pru_int);
|
||||
wakeup(irq);
|
||||
selwakeup(&irq->sc_selinfo);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -270,7 +703,7 @@ ti_pruss_mmap(struct cdev *cdev, vm_ooffset_t offset, vm_paddr_t *paddr,
|
||||
struct ti_pruss_softc *sc = device_get_softc(dev);
|
||||
|
||||
if (offset > rman_get_size(sc->sc_mem_res))
|
||||
return (-1);
|
||||
return (ENOSPC);
|
||||
*paddr = rman_get_start(sc->sc_mem_res) + offset;
|
||||
*memattr = VM_MEMATTR_UNCACHEABLE;
|
||||
|
||||
@ -279,31 +712,43 @@ ti_pruss_mmap(struct cdev *cdev, vm_ooffset_t offset, vm_paddr_t *paddr,
|
||||
|
||||
static struct filterops ti_pruss_kq_read = {
|
||||
.f_isfd = 1,
|
||||
.f_detach = ti_pruss_kq_read_detach,
|
||||
.f_event = ti_pruss_kq_read_event,
|
||||
.f_detach = ti_pruss_irq_kqread_detach,
|
||||
.f_event = ti_pruss_irq_kqevent,
|
||||
};
|
||||
|
||||
static void
|
||||
ti_pruss_kq_read_detach(struct knote *kn)
|
||||
ti_pruss_irq_kqread_detach(struct knote *kn)
|
||||
{
|
||||
struct ti_pruss_softc *sc = kn->kn_hook;
|
||||
struct ti_pruss_irqsc *sc = kn->kn_hook;
|
||||
|
||||
knlist_remove(&sc->sc_selinfo.si_note, kn, 0);
|
||||
}
|
||||
|
||||
static int
|
||||
ti_pruss_kq_read_event(struct knote *kn, long hint)
|
||||
ti_pruss_irq_kqevent(struct knote *kn, long hint)
|
||||
{
|
||||
kn->kn_data = hint;
|
||||
struct ti_pruss_irqsc* irq_sc;
|
||||
int notify;
|
||||
|
||||
return (hint);
|
||||
irq_sc = kn->kn_hook;
|
||||
|
||||
if (hint > 0)
|
||||
kn->kn_data = hint - 2;
|
||||
|
||||
if (hint > 0 || irq_sc->last > 0)
|
||||
notify = 1;
|
||||
else
|
||||
notify = 0;
|
||||
|
||||
irq_sc->last = hint;
|
||||
|
||||
return (notify);
|
||||
}
|
||||
|
||||
static int
|
||||
ti_pruss_kqfilter(struct cdev *cdev, struct knote *kn)
|
||||
ti_pruss_irq_kqfilter(struct cdev *cdev, struct knote *kn)
|
||||
{
|
||||
device_t dev = cdev->si_drv1;
|
||||
struct ti_pruss_softc *sc = device_get_softc(dev);
|
||||
struct ti_pruss_irqsc *sc = cdev->si_drv1;
|
||||
|
||||
switch (kn->kn_filter) {
|
||||
case EVFILT_READ:
|
||||
|
@ -1,5 +1,6 @@
|
||||
/*-
|
||||
* Copyright (c) 2013 Rui Paulo <rpaulo@FreeBSD.org>
|
||||
* Copyright (c) 2017 Manuel Stuehn
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@ -33,8 +34,22 @@
|
||||
#define PRUSS_AM33XX_REV 0x4e82A900
|
||||
#define PRUSS_AM33XX_INTC 0x20000
|
||||
|
||||
#define PRUSS_INTC_HIER 0x1500
|
||||
#define PRUSS_INTC_HIDISR 0x0038
|
||||
#define PRUSS_INTC_HIPIR_BASE 0x0900
|
||||
#define PRUSS_INTC_GER (PRUSS_AM33XX_INTC + 0x0010)
|
||||
#define PRUSS_INTC_SISR (PRUSS_AM33XX_INTC + 0x0020)
|
||||
#define PRUSS_INTC_SICR (PRUSS_AM33XX_INTC + 0x0024)
|
||||
#define PRUSS_INTC_EISR (PRUSS_AM33XX_INTC + 0x0028)
|
||||
#define PRUSS_INTC_EICR (PRUSS_AM33XX_INTC + 0x002C)
|
||||
#define PRUSS_INTC_HIEISR (PRUSS_AM33XX_INTC + 0x0034)
|
||||
#define PRUSS_INTC_HIDISR (PRUSS_AM33XX_INTC + 0x0038)
|
||||
#define PRUSS_INTC_SECR0 (PRUSS_AM33XX_INTC + 0x0280)
|
||||
#define PRUSS_INTC_SECR1 (PRUSS_AM33XX_INTC + 0x0284)
|
||||
#define PRUSS_INTC_CMR_BASE (PRUSS_AM33XX_INTC + 0x0400)
|
||||
#define PRUSS_INTC_HMR_BASE (PRUSS_AM33XX_INTC + 0x0800)
|
||||
#define PRUSS_INTC_HIPIR_BASE (PRUSS_AM33XX_INTC + 0x0900)
|
||||
#define PRUSS_INTC_SIPR0 (PRUSS_AM33XX_INTC + 0x0D00)
|
||||
#define PRUSS_INTC_SIPR1 (PRUSS_AM33XX_INTC + 0x0D04)
|
||||
#define PRUSS_INTC_SITR0 (PRUSS_AM33XX_INTC + 0x0D80)
|
||||
#define PRUSS_INTC_SITR1 (PRUSS_AM33XX_INTC + 0x0D84)
|
||||
#define PRUSS_INTC_HIER (PRUSS_AM33XX_INTC + 0x1500)
|
||||
|
||||
#endif /* _TI_PRUSS_H_ */
|
||||
|
Loading…
Reference in New Issue
Block a user