MFC r275101:

Add bunch of PCI IDs of Intel Wildcat Point (9 Series) chipsets.
This commit is contained in:
mav 2014-12-03 06:53:49 +00:00
parent 68673ca7df
commit a486cdc239
11 changed files with 52 additions and 0 deletions

View File

@ -226,6 +226,14 @@ static struct {
{0x8c078086, 0x00, "Intel Lynx Point (RAID)", 0},
{0x8c0e8086, 0x00, "Intel Lynx Point (RAID)", 0},
{0x8c0f8086, 0x00, "Intel Lynx Point (RAID)", 0},
{0x8c828086, 0x00, "Intel Wildcat Point", 0},
{0x8c838086, 0x00, "Intel Wildcat Point", 0},
{0x8c848086, 0x00, "Intel Wildcat Point (RAID)", 0},
{0x8c858086, 0x00, "Intel Wildcat Point (RAID)", 0},
{0x8c868086, 0x00, "Intel Wildcat Point (RAID)", 0},
{0x8c878086, 0x00, "Intel Wildcat Point (RAID)", 0},
{0x8c8e8086, 0x00, "Intel Wildcat Point (RAID)", 0},
{0x8c8f8086, 0x00, "Intel Wildcat Point (RAID)", 0},
{0x8d028086, 0x00, "Intel Wellsburg", 0},
{0x8d048086, 0x00, "Intel Wellsburg (RAID)", 0},
{0x8d068086, 0x00, "Intel Wellsburg (RAID)", 0},

View File

@ -275,6 +275,19 @@ struct ata_pci_controller {
#define ATA_LPT_R5 0x8c0e8086
#define ATA_LPT_R6 0x8c0f8086
#define ATA_WCPT_S1 0x8c808086
#define ATA_WCPT_S2 0x8c818086
#define ATA_WCPT_AH1 0x8c828086
#define ATA_WCPT_AH2 0x8c838086
#define ATA_WCPT_R1 0x8c848086
#define ATA_WCPT_R2 0x8c858086
#define ATA_WCPT_R3 0x8c868086
#define ATA_WCPT_R4 0x8c878086
#define ATA_WCPT_S3 0x8c888086
#define ATA_WCPT_S4 0x8c898086
#define ATA_WCPT_R5 0x8c8e8086
#define ATA_WCPT_R6 0x8c8f8086
#define ATA_WELLS_S1 0x8d008086
#define ATA_WELLS_S2 0x8d088086
#define ATA_WELLS_S3 0x8d608086

View File

@ -227,6 +227,18 @@ ata_intel_probe(device_t dev)
{ ATA_LPT_S4, 0, INTEL_6CH2, 0, ATA_SA300, "Lynx Point" },
{ ATA_LPT_R5, 0, INTEL_AHCI, 0, ATA_SA300, "Lynx Point" },
{ ATA_LPT_R6, 0, INTEL_AHCI, 0, ATA_SA300, "Lynx Point" },
{ ATA_WCPT_S1, 0, INTEL_6CH, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WCPT_S2, 0, INTEL_6CH, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WCPT_AH1, 0, INTEL_AHCI, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WCPT_AH2, 0, INTEL_AHCI, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WCPT_R1, 0, INTEL_AHCI, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WCPT_R2, 0, INTEL_AHCI, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WCPT_R3, 0, INTEL_AHCI, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WCPT_R4, 0, INTEL_AHCI, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WCPT_S3, 0, INTEL_6CH2, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WCPT_S4, 0, INTEL_6CH2, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WCPT_R5, 0, INTEL_AHCI, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WCPT_R6, 0, INTEL_AHCI, 0, ATA_SA300, "Wildcat Point" },
{ ATA_WELLS_S1, 0, INTEL_6CH, 0, ATA_SA300, "Wellsburg" },
{ ATA_WELLS_S2, 0, INTEL_6CH2, 0, ATA_SA300, "Wellsburg" },
{ ATA_WELLS_S3, 0, INTEL_6CH, 0, ATA_SA300, "Wellsburg" },

View File

@ -88,6 +88,7 @@ __FBSDID("$FreeBSD$");
#define ID_AVOTON 0x1f3c8086
#define ID_COLETOCRK 0x23B08086
#define ID_LPT 0x8c228086
#define ID_WCPT 0x8ca28086
#define PCIS_SERIALBUS_SMBUS_PROGIF 0x00
@ -197,6 +198,9 @@ ichsmb_pci_probe(device_t dev)
case ID_LPT:
device_set_desc(dev, "Intel Lynx Point SMBus controller");
break;
case ID_WCPT:
device_set_desc(dev, "Intel Wildcat Point SMBus controller");
break;
case ID_COLETOCRK:
device_set_desc(dev, "Intel Coleto Creek SMBus controller");
break;

View File

@ -194,6 +194,9 @@ static struct ichwd_device ichwd_devices[] = {
{ DEVICEID_LPT0, "Intel Lynx Point watchdog timer", 10 },
{ DEVICEID_LPT1, "Intel Lynx Point watchdog timer", 10 },
{ DEVICEID_LPT2, "Intel Lynx Point watchdog timer", 10 },
{ DEVICEID_WCPT2, "Intel Wildcat Point watchdog timer", 10 },
{ DEVICEID_WCPT4, "Intel Wildcat Point watchdog timer", 10 },
{ DEVICEID_WCPT6, "Intel Wildcat Point watchdog timer", 10 },
{ DEVICEID_DH89XXCC_LPC, "Intel DH89xxCC watchdog timer", 10 },
{ DEVICEID_COLETOCRK_LPC, "Intel Coleto Creek watchdog timer", 10 },
{ 0, NULL, 0 },

View File

@ -210,6 +210,9 @@ struct ichwd_softc {
#define DEVICEID_LPT29 0x8c5d
#define DEVICEID_LPT30 0x8c5e
#define DEVICEID_LPT31 0x8c5f
#define DEVICEID_WCPT2 0x8cc2
#define DEVICEID_WCPT4 0x8cc4
#define DEVICEID_WCPT6 0x8cc6
/* ICH LPC Interface Bridge Registers (ICH5 and older) */
#define ICH_GEN_STA 0xd4

View File

@ -86,6 +86,7 @@ static const struct {
{ HDA_INTEL_PPT1, "Intel Panther Point", 0, 0 },
{ HDA_INTEL_LPT1, "Intel Lynx Point", 0, 0 },
{ HDA_INTEL_LPT2, "Intel Lynx Point", 0, 0 },
{ HDA_INTEL_WCPT, "Intel Wildcat Point", 0, 0 },
{ HDA_INTEL_WELLS1, "Intel Wellsburg", 0, 0 },
{ HDA_INTEL_WELLS2, "Intel Wellsburg", 0, 0 },
{ HDA_INTEL_LPTLP1, "Intel Lynx Point-LP", 0, 0 },

View File

@ -62,6 +62,7 @@
#define HDA_INTEL_SCH HDA_MODEL_CONSTRUCT(INTEL, 0x811b)
#define HDA_INTEL_LPT1 HDA_MODEL_CONSTRUCT(INTEL, 0x8c20)
#define HDA_INTEL_LPT2 HDA_MODEL_CONSTRUCT(INTEL, 0x8c21)
#define HDA_INTEL_WCPT HDA_MODEL_CONSTRUCT(INTEL, 0x8ca0)
#define HDA_INTEL_WELLS1 HDA_MODEL_CONSTRUCT(INTEL, 0x8d20)
#define HDA_INTEL_WELLS2 HDA_MODEL_CONSTRUCT(INTEL, 0x8d21)
#define HDA_INTEL_LPTLP1 HDA_MODEL_CONSTRUCT(INTEL, 0x9c20)

View File

@ -126,6 +126,7 @@ static const struct pci_id pci_ns8250_ids[] = {
{ 0x8086, 0x8813, 0xffff, 0, "Intel EG20T Serial Port 2", 0x10 },
{ 0x8086, 0x8814, 0xffff, 0, "Intel EG20T Serial Port 3", 0x10 },
{ 0x8086, 0x8c3d, 0xffff, 0, "Intel Lynx Point KT Controller", 0x10 },
{ 0x8086, 0x8cbd, 0xffff, 0, "Intel Wildcat Point KT Controller", 0x10 },
{ 0x9710, 0x9820, 0x1000, 1, "NetMos NM9820 Serial Port", 0x10 },
{ 0x9710, 0x9835, 0x1000, 1, "NetMos NM9835 Serial Port", 0x10 },
{ 0x9710, 0x9865, 0xa000, 0x1000, "NetMos NM9865 Serial Port", 0x10 },

View File

@ -158,6 +158,10 @@ ehci_pci_match(device_t self)
return ("Intel Lynx Point USB 2.0 controller USB-A");
case 0x8c2d8086:
return ("Intel Lynx Point USB 2.0 controller USB-B");
case 0x8ca68086:
return ("Intel Wildcat Point USB 2.0 controller USB-A");
case 0x8cad8086:
return ("Intel Wildcat Point USB 2.0 controller USB-B");
case 0x00e01033:
return ("NEC uPD 720100 USB 2.0 controller");

View File

@ -107,6 +107,8 @@ xhci_pci_match(device_t self)
return ("Intel Panther Point USB 3.0 controller");
case 0x8c318086:
return ("Intel Lynx Point USB 3.0 controller");
case 0x8cb18086:
return ("Intel Wildcat Point USB 3.0 controller");
default:
break;