Use the stock 3.2.1-prerelease file.
Approved by: obrien
This commit is contained in:
kan
parent
662abc46ea
commit
a51fc15f74
@ -2016,7 +2016,7 @@
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;; For 64BIT abi we always round up to 8 bytes.
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(define_insn "*pushqi2_rex64"
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[(set (match_operand:QI 0 "push_operand" "=X")
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(match_operand:QI 1 "nonmemory_no_elim_operand" "ri"))]
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(match_operand:QI 1 "nonmemory_no_elim_operand" "qi"))]
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"TARGET_64BIT"
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"push{q}\t%q1"
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[(set_attr "type" "push")
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@ -2557,17 +2557,16 @@
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;; We fake an second form of instruction to force reload to load address
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;; into register when rax is not available
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(define_insn "*movabsdi_1_rex64"
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[(set (mem:DI (match_operand:DI 0 "x86_64_movabs_operand" "i,r,r"))
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(match_operand:DI 1 "nonmemory_operand" "a,er,i"))]
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[(set (mem:DI (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
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(match_operand:DI 1 "nonmemory_operand" "a,er"))]
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"TARGET_64BIT"
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"@
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movabs{q}\t{%1, %P0|%P0, %1}
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mov{q}\t{%1, %a0|%a0, %1}
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movabs{q}\t{%1, %a0|%a0, %1}"
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mov{q}\t{%1, %a0|%a0, %1}"
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[(set_attr "type" "imov")
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(set_attr "modrm" "0,*,*")
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(set_attr "length_address" "8,0,0")
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(set_attr "length_immediate" "0,*,*")
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(set_attr "modrm" "0,*")
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(set_attr "length_address" "8,0")
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(set_attr "length_immediate" "0,*")
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(set_attr "memory" "store")
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(set_attr "mode" "DI")])
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@ -10953,7 +10952,7 @@
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[(set (reg 17)
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(compare
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(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0")
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(match_operand:QI 2 "immediate_operand" "I"))
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(match_operand:QI 2 "const_int_1_31_operand" "I"))
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(const_int 0)))
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(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
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(ashift:SI (match_dup 1) (match_dup 2)))]
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@ -10992,7 +10991,7 @@
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[(set (reg 17)
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(compare
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(ashift:SI (match_operand:SI 1 "register_operand" "0")
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(match_operand:QI 2 "immediate_operand" "I"))
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(match_operand:QI 2 "const_int_1_31_operand" "I"))
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(const_int 0)))
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(set (match_operand:DI 0 "register_operand" "=r")
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(zero_extend:DI (ashift:SI (match_dup 1) (match_dup 2))))]
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@ -11117,7 +11116,7 @@
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[(set (reg 17)
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(compare
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(ashift:HI (match_operand:HI 1 "nonimmediate_operand" "0")
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(match_operand:QI 2 "immediate_operand" "I"))
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(match_operand:QI 2 "const_int_1_31_operand" "I"))
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(const_int 0)))
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(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
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(ashift:HI (match_dup 1) (match_dup 2)))]
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@ -11281,7 +11280,7 @@
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[(set (reg 17)
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(compare
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(ashift:QI (match_operand:QI 1 "nonimmediate_operand" "0")
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(match_operand:QI 2 "immediate_operand" "I"))
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(match_operand:QI 2 "const_int_1_31_operand" "I"))
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(const_int 0)))
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(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
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(ashift:QI (match_dup 1) (match_dup 2)))]
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@ -11631,7 +11630,7 @@
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[(set (reg 17)
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(compare
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(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
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(match_operand:QI 2 "immediate_operand" "I"))
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(match_operand:QI 2 "const_int_1_31_operand" "I"))
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(const_int 0)))
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(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
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(ashiftrt:SI (match_dup 1) (match_dup 2)))]
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@ -11645,7 +11644,7 @@
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[(set (reg 17)
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(compare
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(ashiftrt:SI (match_operand:SI 1 "register_operand" "0")
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(match_operand:QI 2 "immediate_operand" "I"))
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(match_operand:QI 2 "const_int_1_31_operand" "I"))
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(const_int 0)))
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(set (match_operand:DI 0 "register_operand" "=r")
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(zero_extend:DI (ashiftrt:SI (match_dup 1) (match_dup 2))))]
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@ -11717,7 +11716,7 @@
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[(set (reg 17)
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(compare
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(ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
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(match_operand:QI 2 "immediate_operand" "I"))
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(match_operand:QI 2 "const_int_1_31_operand" "I"))
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(const_int 0)))
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(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
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(ashiftrt:HI (match_dup 1) (match_dup 2)))]
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@ -11770,7 +11769,7 @@
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(ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
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(match_operand:QI 2 "const_int_1_operand" "I"))
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(const_int 0)))
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(set (match_operand:QI 0 "nonimmediate_operand" "=rm")
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(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
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(ashiftrt:QI (match_dup 1) (match_dup 2)))]
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"ix86_match_ccmode (insn, CCGOCmode)
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&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)
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@ -11789,9 +11788,9 @@
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[(set (reg 17)
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(compare
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(ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
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(match_operand:QI 2 "immediate_operand" "I"))
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(match_operand:QI 2 "const_int_1_31_operand" "I"))
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(const_int 0)))
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(set (match_operand:QI 0 "nonimmediate_operand" "=rm")
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(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
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(ashiftrt:QI (match_dup 1) (match_dup 2)))]
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"ix86_match_ccmode (insn, CCGOCmode)
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&& ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
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@ -12022,7 +12021,7 @@
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[(set (reg 17)
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(compare
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(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
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(match_operand:QI 2 "immediate_operand" "I"))
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(match_operand:QI 2 "const_int_1_31_operand" "I"))
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(const_int 0)))
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(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
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(lshiftrt:SI (match_dup 1) (match_dup 2)))]
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@ -12036,7 +12035,7 @@
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[(set (reg 17)
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(compare
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(lshiftrt:SI (match_operand:SI 1 "register_operand" "0")
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(match_operand:QI 2 "immediate_operand" "I"))
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(match_operand:QI 2 "const_int_1_31_operand" "I"))
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(const_int 0)))
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(set (match_operand:DI 0 "register_operand" "=r")
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(lshiftrt:DI (zero_extend:DI (match_dup 1)) (match_dup 2)))]
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@ -12108,7 +12107,7 @@
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[(set (reg 17)
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(compare
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(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
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(match_operand:QI 2 "immediate_operand" "I"))
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(match_operand:QI 2 "const_int_1_31_operand" "I"))
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(const_int 0)))
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(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
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(lshiftrt:HI (match_dup 1) (match_dup 2)))]
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@ -12180,7 +12179,7 @@
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[(set (reg 17)
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(compare
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(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
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(match_operand:QI 2 "immediate_operand" "I"))
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(match_operand:QI 2 "const_int_1_31_operand" "I"))
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(const_int 0)))
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(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
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(lshiftrt:QI (match_dup 1) (match_dup 2)))]
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@ -13818,6 +13817,7 @@
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{
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ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L",
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CODE_LABEL_NUMBER (operands[1]));
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return "pop{l}\t%0";
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}
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RET;
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}
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@ -16578,12 +16578,12 @@
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"#")
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(define_insn "sse_movdfcc"
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[(set (match_operand:DF 0 "register_operand" "=&x#rf,x#rf,?f#xr,?f#xr,?f#xr,?f#xr,?r#xf,?r#xf,?r#xf,?r#xf")
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[(set (match_operand:DF 0 "register_operand" "=&Y#rf,Y#rf,?f#Yr,?f#Yr,?f#Yr,?f#Yr,?r#Yf,?r#Yf,?r#Yf,?r#Yf")
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(if_then_else:DF (match_operator 1 "sse_comparison_operator"
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[(match_operand:DF 4 "nonimmediate_operand" "0#fx,x#fx,f#x,f#x,xm#f,xm#f,f#x,f#x,xm#f,xm#f")
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(match_operand:DF 5 "nonimmediate_operand" "xm#f,xm#f,f#x,f#x,x#f,x#f,f#x,f#x,x#f,x#f")])
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(match_operand:DF 2 "nonimmediate_operand" "x#fr,0#fr,f#fx,0#fx,f#fx,0#fx,rm#rx,0#rx,rm#rx,0#rx")
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(match_operand:DF 3 "nonimmediate_operand" "x#fr,x#fr,0#fx,f#fx,0#fx,f#fx,0#fx,rm#rx,0#rx,rm#rx")))
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[(match_operand:DF 4 "nonimmediate_operand" "0#fY,Y#fY,f#Y,f#Y,Ym#f,Ym#f,f#Y,f#Y,Ym#f,Ym#f")
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(match_operand:DF 5 "nonimmediate_operand" "Ym#f,Ym#f,f#Y,f#Y,Y#f,Y#f,f#Y,f#Y,Y#f,Y#f")])
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(match_operand:DF 2 "nonimmediate_operand" "Y#fr,0#fr,f#fY,0#fY,f#fY,0#fY,rm#rY,0#rY,rm#rY,0#rY")
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(match_operand:DF 3 "nonimmediate_operand" "Y#fr,Y#fr,0#fY,f#fY,0#fY,f#fY,0#fY,rm#rY,0#rY,rm#rY")))
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(clobber (match_scratch:DF 6 "=2,&4,X,X,X,X,X,X,X,X"))
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(clobber (reg:CC 17))]
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"TARGET_SSE2
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@ -16593,11 +16593,11 @@
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"#")
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(define_insn "sse_movdfcc_eq"
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[(set (match_operand:DF 0 "register_operand" "=&x#rf,x#rf,?f#xr,?f#xr,?r#xf,?r#xf")
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(if_then_else:DF (eq (match_operand:DF 3 "nonimmediate_operand" "%0#fx,x#fx,f#x,xm#f,f#x,xm#f")
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(match_operand:DF 4 "nonimmediate_operand" "xm#f,xm#f,f#x,x#f,f#x,x#f"))
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(match_operand:DF 1 "nonimmediate_operand" "x#fr,0#fr,0#fx,0#fx,0#rx,0#rx")
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(match_operand:DF 2 "nonimmediate_operand" "x#fr,x#fr,f#fx,f#fx,rm#rx,rm#rx")))
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[(set (match_operand:DF 0 "register_operand" "=&Y#rf,Y#rf,?f#Yr,?f#Yr,?r#Yf,?r#Yf")
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(if_then_else:DF (eq (match_operand:DF 3 "nonimmediate_operand" "%0#fY,Y#fY,f#Y,Ym#f,f#Y,Ym#f")
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(match_operand:DF 4 "nonimmediate_operand" "Ym#f,Ym#f,f#Y,Y#f,f#Y,Y#f"))
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(match_operand:DF 1 "nonimmediate_operand" "Y#fr,0#fr,0#fY,0#fY,0#rY,0#rY")
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(match_operand:DF 2 "nonimmediate_operand" "Y#fr,Y#fr,f#fY,f#fY,rm#rY,rm#rY")))
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(clobber (match_scratch:DF 5 "=1,&3,X,X,X,X"))
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(clobber (reg:CC 17))]
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"TARGET_SSE
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@ -16649,6 +16649,10 @@
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(set (subreg:TI (match_dup 0) 0) (ior:TI (subreg:TI (match_dup 6) 0)
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(subreg:TI (match_dup 7) 0)))]
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{
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/* If op2 == op3, op3 will be clobbered before it is used.
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This should be optimized out though. */
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if (operands_match_p (operands[2], operands[3]))
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abort ();
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PUT_MODE (operands[1], GET_MODE (operands[0]));
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if (operands_match_p (operands[0], operands[4]))
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operands[6] = operands[4], operands[7] = operands[2];
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@ -16660,7 +16664,7 @@
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;; Do not brother with the integer/floating point case, since these are
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;; bot considerably slower, unlike in the generic case.
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(define_insn "*sse_movsfcc_const0_1"
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[(set (match_operand:SF 0 "register_operand" "=x")
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[(set (match_operand:SF 0 "register_operand" "=&x")
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(if_then_else:SF (match_operator 1 "sse_comparison_operator"
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[(match_operand:SF 4 "register_operand" "0")
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(match_operand:SF 5 "nonimmediate_operand" "xm")])
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@ -16670,7 +16674,7 @@
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"#")
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(define_insn "*sse_movsfcc_const0_2"
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[(set (match_operand:SF 0 "register_operand" "=x")
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[(set (match_operand:SF 0 "register_operand" "=&x")
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(if_then_else:SF (match_operator 1 "sse_comparison_operator"
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[(match_operand:SF 4 "register_operand" "0")
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(match_operand:SF 5 "nonimmediate_operand" "xm")])
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@ -16680,7 +16684,7 @@
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"#")
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(define_insn "*sse_movsfcc_const0_3"
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[(set (match_operand:SF 0 "register_operand" "=x")
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[(set (match_operand:SF 0 "register_operand" "=&x")
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(if_then_else:SF (match_operator 1 "fcmov_comparison_operator"
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[(match_operand:SF 4 "nonimmediate_operand" "xm")
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(match_operand:SF 5 "register_operand" "0")])
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@ -16690,7 +16694,7 @@
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"#")
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(define_insn "*sse_movsfcc_const0_4"
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[(set (match_operand:SF 0 "register_operand" "=x")
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[(set (match_operand:SF 0 "register_operand" "=&x")
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(if_then_else:SF (match_operator 1 "fcmov_comparison_operator"
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[(match_operand:SF 4 "nonimmediate_operand" "xm")
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(match_operand:SF 5 "register_operand" "0")])
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@ -16700,42 +16704,42 @@
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"#")
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(define_insn "*sse_movdfcc_const0_1"
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[(set (match_operand:SF 0 "register_operand" "=x")
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(if_then_else:SF (match_operator 1 "sse_comparison_operator"
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[(match_operand:SF 4 "register_operand" "0")
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(match_operand:SF 5 "nonimmediate_operand" "xm")])
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(match_operand:SF 2 "register_operand" "x")
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(match_operand:SF 3 "const0_operand" "X")))]
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[(set (match_operand:DF 0 "register_operand" "=&Y")
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(if_then_else:DF (match_operator 1 "sse_comparison_operator"
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[(match_operand:DF 4 "register_operand" "0")
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(match_operand:DF 5 "nonimmediate_operand" "Ym")])
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(match_operand:DF 2 "register_operand" "Y")
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(match_operand:DF 3 "const0_operand" "X")))]
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"TARGET_SSE2"
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"#")
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(define_insn "*sse_movdfcc_const0_2"
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[(set (match_operand:SF 0 "register_operand" "=x")
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(if_then_else:SF (match_operator 1 "sse_comparison_operator"
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[(match_operand:SF 4 "register_operand" "0")
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(match_operand:SF 5 "nonimmediate_operand" "xm")])
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(match_operand:SF 2 "const0_operand" "X")
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(match_operand:SF 3 "register_operand" "x")))]
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[(set (match_operand:DF 0 "register_operand" "=&Y")
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(if_then_else:DF (match_operator 1 "sse_comparison_operator"
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[(match_operand:DF 4 "register_operand" "0")
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(match_operand:DF 5 "nonimmediate_operand" "Ym")])
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(match_operand:DF 2 "const0_operand" "X")
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(match_operand:DF 3 "register_operand" "Y")))]
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"TARGET_SSE2"
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"#")
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(define_insn "*sse_movdfcc_const0_3"
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[(set (match_operand:SF 0 "register_operand" "=x")
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(if_then_else:SF (match_operator 1 "fcmov_comparison_operator"
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[(match_operand:SF 4 "nonimmediate_operand" "xm")
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(match_operand:SF 5 "register_operand" "0")])
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(match_operand:SF 2 "register_operand" "x")
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(match_operand:SF 3 "const0_operand" "X")))]
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[(set (match_operand:DF 0 "register_operand" "=&Y")
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(if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
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[(match_operand:DF 4 "nonimmediate_operand" "Ym")
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(match_operand:DF 5 "register_operand" "0")])
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(match_operand:DF 2 "register_operand" "Y")
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(match_operand:DF 3 "const0_operand" "X")))]
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"TARGET_SSE2"
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"#")
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(define_insn "*sse_movdfcc_const0_4"
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[(set (match_operand:SF 0 "register_operand" "=x")
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(if_then_else:SF (match_operator 1 "fcmov_comparison_operator"
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[(match_operand:SF 4 "nonimmediate_operand" "xm")
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(match_operand:SF 5 "register_operand" "0")])
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(match_operand:SF 2 "const0_operand" "X")
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(match_operand:SF 3 "register_operand" "x")))]
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[(set (match_operand:DF 0 "register_operand" "=&Y")
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(if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
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[(match_operand:DF 4 "nonimmediate_operand" "Ym")
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(match_operand:DF 5 "register_operand" "0")])
|
||||
(match_operand:DF 2 "const0_operand" "X")
|
||||
(match_operand:DF 3 "register_operand" "Y")))]
|
||||
"TARGET_SSE2"
|
||||
"#")
|
||||
|
||||
@ -19781,7 +19785,7 @@
|
||||
[(set_attr "type" "mmx")])
|
||||
|
||||
(define_expand "prefetch"
|
||||
[(prefetch (match_operand:SI 0 "address_operand" "")
|
||||
[(prefetch (match_operand 0 "address_operand" "")
|
||||
(match_operand:SI 1 "const_int_operand" "")
|
||||
(match_operand:SI 2 "const_int_operand" ""))]
|
||||
"TARGET_PREFETCH_SSE || TARGET_3DNOW"
|
||||
@ -19793,6 +19797,8 @@
|
||||
abort ();
|
||||
if (locality < 0 || locality > 3)
|
||||
abort ();
|
||||
if (GET_MODE (operands[0]) != Pmode && GET_MODE (operands[0]) != VOIDmode)
|
||||
abort ();
|
||||
|
||||
/* Use 3dNOW prefetch in case we are asking for write prefetch not
|
||||
suported by SSE counterpart or the SSE prefetch is not available
|
||||
@ -19808,7 +19814,26 @@
|
||||
[(prefetch (match_operand:SI 0 "address_operand" "p")
|
||||
(const_int 0)
|
||||
(match_operand:SI 1 "const_int_operand" ""))]
|
||||
"TARGET_PREFETCH_SSE"
|
||||
"TARGET_PREFETCH_SSE && !TARGET_64BIT"
|
||||
{
|
||||
static const char * const patterns[4] = {
|
||||
"prefetchnta\t%a0", "prefetcht2\t%a0", "prefetcht1\t%a0", "prefetcht0\t%a0"
|
||||
};
|
||||
|
||||
int locality = INTVAL (operands[1]);
|
||||
if (locality < 0 || locality > 3)
|
||||
abort ();
|
||||
|
||||
return patterns[locality];
|
||||
}
|
||||
[(set_attr "type" "sse")
|
||||
(set_attr "memory" "none")])
|
||||
|
||||
(define_insn "*prefetch_sse_rex"
|
||||
[(prefetch (match_operand:DI 0 "address_operand" "p")
|
||||
(const_int 0)
|
||||
(match_operand:SI 1 "const_int_operand" ""))]
|
||||
"TARGET_PREFETCH_SSE && TARGET_64BIT"
|
||||
{
|
||||
static const char * const patterns[4] = {
|
||||
"prefetchnta\t%a0", "prefetcht2\t%a0", "prefetcht1\t%a0", "prefetcht0\t%a0"
|
||||
@ -19826,7 +19851,21 @@
|
||||
[(prefetch (match_operand:SI 0 "address_operand" "p")
|
||||
(match_operand:SI 1 "const_int_operand" "n")
|
||||
(const_int 3))]
|
||||
"TARGET_3DNOW"
|
||||
"TARGET_3DNOW && !TARGET_64BIT"
|
||||
{
|
||||
if (INTVAL (operands[1]) == 0)
|
||||
return "prefetch\t%a0";
|
||||
else
|
||||
return "prefetchw\t%a0";
|
||||
}
|
||||
[(set_attr "type" "mmx")
|
||||
(set_attr "memory" "none")])
|
||||
|
||||
(define_insn "*prefetch_3dnow_rex"
|
||||
[(prefetch (match_operand:DI 0 "address_operand" "p")
|
||||
(match_operand:SI 1 "const_int_operand" "n")
|
||||
(const_int 3))]
|
||||
"TARGET_3DNOW && TARGET_64BIT"
|
||||
{
|
||||
if (INTVAL (operands[1]) == 0)
|
||||
return "prefetch\t%a0";
|
||||
|
||||
Loading…
Reference in New Issue
Block a user