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Move the IO Window Control Register defines out of the ARMADA38X ifdef.

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Fixes the build of Marvell kernels (other than ARMADA38X) after r318336.

Reported by:	mmel
This commit is contained in:
Luiz Otavio O Souza 2017-05-17 15:13:01 +00:00
parent 5bcd39c054
commit a564364892
1 changed files with 12 additions and 12 deletions
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24
sys/arm/mv/mvwin.h
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@ -305,18 +305,6 @@
#define MV_BOOTROM_WIN_SIZE 0xF
#define MV_CPU_SUBSYS_REGS_LEN 0x100
/* IO Window Control Register fields */
#define IO_WIN_SIZE_SHIFT 16
#define IO_WIN_SIZE_MASK 0xFFFF
#define IO_WIN_ATTR_SHIFT 8
#define IO_WIN_ATTR_MASK 0xFF
#define IO_WIN_TGT_SHIFT 4
#define IO_WIN_TGT_MASK 0xF
#define IO_WIN_SYNC_SHIFT 1
#define IO_WIN_SYNC_MASK 0x1
#define IO_WIN_ENA_SHIFT 0
#define IO_WIN_ENA_MASK 0x1
#define IO_WIN_9_CTRL_OFFSET 0x98
#define IO_WIN_9_BASE_OFFSET 0x9C
@ -329,6 +317,18 @@
#define MV_SYNC_BARRIER_CTRL_ALL 0xFFFF
#endif
/* IO Window Control Register fields */
#define IO_WIN_SIZE_SHIFT 16
#define IO_WIN_SIZE_MASK 0xFFFF
#define IO_WIN_ATTR_SHIFT 8
#define IO_WIN_ATTR_MASK 0xFF
#define IO_WIN_TGT_SHIFT 4
#define IO_WIN_TGT_MASK 0xF
#define IO_WIN_SYNC_SHIFT 1
#define IO_WIN_SYNC_MASK 0x1
#define IO_WIN_ENA_SHIFT 0
#define IO_WIN_ENA_MASK 0x1
#define WIN_REG_IDX_RD(pre,reg,off,base) \
static __inline uint32_t \
pre ## _ ## reg ## _read(int i) \