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ioat(4): Limit descriptor allocation to low 40 bits

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The IOAT engine can only address the low 40 bits (1 TB) of physmem via
the 'next descriptor' pointer.  Restrict acceptable range given to
bus_dma_tag_create to match.

Sponsored by:	EMC / Isilon Storage Division
This commit is contained in:
cem 2016-05-03 17:05:58 +00:00
parent 1602ce85ac
commit a5d1a4f2a5
1 changed files with 4 additions and 1 deletions
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5
sys/dev/ioat/ioat.c
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@ -52,6 +52,9 @@ __FBSDID("$FreeBSD$");
#include "ioat_hw.h"
#include "ioat_internal.h"
#ifndef BUS_SPACE_MAXADDR_40BIT
#define BUS_SPACE_MAXADDR_40BIT 0xFFFFFFFFFFULL
#endif
#define IOAT_INTR_TIMO (hz / 10)
#define IOAT_REFLK (&ioat->submit_lock)
@ -454,7 +457,7 @@ ioat3_attach(device_t device)
num_descriptors = 1 << ioat->ring_size_order;
bus_dma_tag_create(bus_get_dma_tag(ioat->device), 0x40, 0x0,
BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL,
BUS_SPACE_MAXADDR_40BIT, BUS_SPACE_MAXADDR, NULL, NULL,
sizeof(struct ioat_dma_hw_descriptor), 1,
sizeof(struct ioat_dma_hw_descriptor), 0, NULL, NULL,
&ioat->hw_desc_tag);