When synchronising the instruction and data caches we only need to clean

the data cache to the point of unification. This is the point where the
two caches are unified to a single unified cache so cleaning past here
is just extra unneeded work.

This was noticed when investigating r305545.

Reported by:	bz
Obtained from:	ABT Systems Ltd
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
This commit is contained in:
andrew 2016-09-07 16:46:54 +00:00
parent 4bde709fd3
commit a66a58c963

View File

@ -151,5 +151,5 @@ END(arm64_idcache_wbinv_range)
* void arm64_icache_sync_range(vm_offset_t, vm_size_t)
*/
ENTRY(arm64_icache_sync_range)
cache_handle_range dcop = cvac, ic = 1, icop = ivau
cache_handle_range dcop = cvau, ic = 1, icop = ivau
END(arm64_icache_sync_range)