Don't mark the initial portal registers as fully mapped.

BMan and QMan will do this at attach time.  Even though the registers are mapped
now, dpaa_portal_map_registers() will be called at BMan and QMan attach time,
updating the mappings to be private, and in the case of cache-enabled registers,
marked as coherent memory mappings.

sys/dev/dpaa/portals_common.c

@@ -91,7 +91,6 @@ dpaa_portal_alloc_res(device_t dev, struct dpaa_portals_devinfo *di, int cpu)
 			    sc->sc_rrid[0], sc->sc_rres[0]);
 			return (ENXIO);
 		}
-		sc->sc_dp[PCPU_GET(cpuid)].dp_regs_mapped = 1;
 	}
 	/* Acquire portal's CE_PA and CI_PA */
 	rle = resource_list_find(res, SYS_RES_MEMORY, 0);