Implement fix for BULK IN-token retry mechanism. When the hardware is
programmed for infinite IN token retry after NAK, the SAF1761 hardware, however, does not retry the IN-token. This problem is described in the SAF1761 errata, section 18.1.1. While at it: - Add some minor chip specific initialization for RTEMS. - Add debug print for status registers in the interrupt filter. Submitted by: Christian Mauderer <christian.mauderer@embedded-brains.de> MFC after: 1 week
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@ -516,7 +516,25 @@ saf1761_host_bulk_data_rx(struct saf1761_otg_softc *sc, struct saf1761_otg_td *t
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DPRINTFN(5, "STATUS=0x%08x\n", status);
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if (status & SOTG_PTD_DW3_ACTIVE) {
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goto busy;
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temp = saf1761_peek_host_status_le_4(sc,
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pdt_addr + SOTG_PTD_DW0);
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if (temp & SOTG_PTD_DW0_VALID) {
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goto busy;
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} else {
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status = saf1761_peek_host_status_le_4(sc,
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pdt_addr + SOTG_PTD_DW3);
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/* check if still active */
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if (status & SOTG_PTD_DW3_ACTIVE) {
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saf1761_host_channel_free(sc, td);
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goto retry;
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} else if (status & SOTG_PTD_DW3_HALTED) {
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if (!(status & SOTG_PTD_DW3_ERRORS))
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td->error_stall = 1;
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td->error_any = 1;
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goto complete;
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}
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}
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} else if (status & SOTG_PTD_DW3_HALTED) {
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if (!(status & SOTG_PTD_DW3_ERRORS))
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td->error_stall = 1;
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@ -560,6 +578,7 @@ saf1761_host_bulk_data_rx(struct saf1761_otg_softc *sc, struct saf1761_otg_td *t
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}
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saf1761_host_channel_free(sc, td);
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}
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retry:
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if (saf1761_host_channel_alloc(sc, td))
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goto busy;
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@ -1589,6 +1608,8 @@ saf1761_otg_filter_interrupt(void *arg)
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(void) SAF1761_READ_LE_4(sc, SOTG_INT_PTD_DONE_PTD);
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(void) SAF1761_READ_LE_4(sc, SOTG_ISO_PTD_DONE_PTD);
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DPRINTFN(9, "HCINTERRUPT=0x%08x DCINTERRUPT=0x%08x\n", hcstat, status);
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if (status & SOTG_DCINTERRUPT_IEPSOF) {
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if ((sc->sc_host_async_busy_map[1] | sc->sc_host_async_busy_map[0] |
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sc->sc_host_intr_busy_map[1] | sc->sc_host_intr_busy_map[0] |
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@ -2446,11 +2467,15 @@ saf1761_otg_init(struct saf1761_otg_softc *sc)
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*/
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SAF1761_WRITE_LE_4(sc, SOTG_CTRL_SET_CLR,
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SOTG_CTRL_CLR(0xFFFF));
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#ifdef __rtems__
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SAF1761_WRITE_LE_4(sc, SOTG_CTRL_SET_CLR,
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SOTG_CTRL_SET(SOTG_CTRL_SEL_CP_EXT | SOTG_CTRL_VBUS_DRV));
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#else
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SAF1761_WRITE_LE_4(sc, SOTG_CTRL_SET_CLR,
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SOTG_CTRL_SET(SOTG_CTRL_SW_SEL_HC_DC |
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SOTG_CTRL_BDIS_ACON_EN | SOTG_CTRL_SEL_CP_EXT |
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SOTG_CTRL_VBUS_DRV));
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#endif
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/* disable device address */
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SAF1761_WRITE_LE_4(sc, SOTG_ADDRESS, 0);
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