Fix build of powerpc FPU emulator after changes in r295132 to restore the
ABI of struct fpreg. The FPU emulator operates on the "raw" FPU state stored in the pcb rather than the "cooked" fpreg state used for ptrace() and cores. Reported by: bz
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f13ec4b40e
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@ -275,7 +275,7 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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vm_offset_t addr;
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int ra, rb, rc, rt, type, mask, fsr, cx, bf, setcr;
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unsigned int cond;
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struct fpreg *fs;
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struct fpu *fs;
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/* Setup work. */
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fp = NULL;
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@ -335,7 +335,7 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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if (ra != 0)
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addr += tf->fixreg[ra];
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rt = instr.i_x.i_rt;
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a = (int *)&fs->fpreg[rt].fpr;
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a = (int *)&fs->fpr[rt].fpr;
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DPRINTF(FPE_INSN,
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("fpu_execute: Store INT %x at %p\n",
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a[1], (void *)addr));
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@ -402,7 +402,7 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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DPRINTF(FPE_INSN,
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("fpu_execute: Store DBL at %p\n",
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(void *)addr));
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if (copyout(&fs->fpreg[rt].fpr, (void *)addr,
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if (copyout(&fs->fpr[rt].fpr, (void *)addr,
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size))
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return (FAULT);
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}
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@ -411,13 +411,13 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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FPU_EMU_EVCNT_INCR(fpload);
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DPRINTF(FPE_INSN, ("fpu_execute: Load from %p\n",
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(void *)addr));
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if (copyin((const void *)addr, &fs->fpreg[rt].fpr,
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if (copyin((const void *)addr, &fs->fpr[rt].fpr,
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size))
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return (FAULT);
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if (type != FTYPE_DBL) {
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fpu_explode(fe, fp = &fe->fe_f1, type, rt);
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fpu_implode(fe, fp, FTYPE_DBL,
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(u_int *)&fs->fpreg[rt].fpr);
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(u_int *)&fs->fpr[rt].fpr);
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}
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}
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if (update)
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@ -470,7 +470,7 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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DPRINTF(FPE_INSN, ("fpu_execute: FRSP\n"));
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fpu_explode(fe, fp = &fe->fe_f1, FTYPE_DBL, rb);
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fpu_implode(fe, fp, FTYPE_SNG,
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(u_int *)&fs->fpreg[rt].fpr);
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(u_int *)&fs->fpr[rt].fpr);
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fpu_explode(fe, fp = &fe->fe_f1, FTYPE_SNG, rt);
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type = FTYPE_DBL;
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break;
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@ -503,9 +503,9 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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case OPC63_FNEG:
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FPU_EMU_EVCNT_INCR(fnegabs);
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DPRINTF(FPE_INSN, ("fpu_execute: FNEGABS\n"));
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memcpy(&fs->fpreg[rt].fpr, &fs->fpreg[rb].fpr,
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memcpy(&fs->fpr[rt].fpr, &fs->fpr[rb].fpr,
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sizeof(double));
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a = (int *)&fs->fpreg[rt].fpr;
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a = (int *)&fs->fpr[rt].fpr;
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*a ^= (1U << 31);
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break;
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case OPC63_MCRFS:
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@ -533,7 +533,7 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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case OPC63_FMR:
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FPU_EMU_EVCNT_INCR(fmr);
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DPRINTF(FPE_INSN, ("fpu_execute: FMR\n"));
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memcpy(&fs->fpreg[rt].fpr, &fs->fpreg[rb].fpr,
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memcpy(&fs->fpr[rt].fpr, &fs->fpr[rb].fpr,
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sizeof(double));
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break;
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case OPC63_MTFSFI:
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@ -550,23 +550,23 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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case OPC63_FNABS:
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FPU_EMU_EVCNT_INCR(fnabs);
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DPRINTF(FPE_INSN, ("fpu_execute: FABS\n"));
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memcpy(&fs->fpreg[rt].fpr, &fs->fpreg[rb].fpr,
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memcpy(&fs->fpr[rt].fpr, &fs->fpr[rb].fpr,
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sizeof(double));
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a = (int *)&fs->fpreg[rt].fpr;
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a = (int *)&fs->fpr[rt].fpr;
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*a |= (1U << 31);
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break;
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case OPC63_FABS:
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FPU_EMU_EVCNT_INCR(fabs);
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DPRINTF(FPE_INSN, ("fpu_execute: FABS\n"));
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memcpy(&fs->fpreg[rt].fpr, &fs->fpreg[rb].fpr,
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memcpy(&fs->fpr[rt].fpr, &fs->fpr[rb].fpr,
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sizeof(double));
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a = (int *)&fs->fpreg[rt].fpr;
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a = (int *)&fs->fpr[rt].fpr;
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*a &= ~(1U << 31);
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break;
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case OPC63_MFFS:
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FPU_EMU_EVCNT_INCR(mffs);
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DPRINTF(FPE_INSN, ("fpu_execute: MFFS\n"));
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memcpy(&fs->fpreg[rt].fpr, &fs->fpscr,
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memcpy(&fs->fpr[rt].fpr, &fs->fpscr,
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sizeof(fs->fpscr));
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break;
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case OPC63_MTFSF:
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@ -581,7 +581,7 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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if (rt & (1<<ra))
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mask |= (0xf<<(4*ra));
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}
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a = (int *)&fs->fpreg[rt].fpr;
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a = (int *)&fs->fpr[rt].fpr;
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fe->fe_cx = mask & a[1];
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fe->fe_fpscr = (fe->fe_fpscr&~mask) |
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(fe->fe_cx);
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@ -648,12 +648,12 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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case OPC63M_FSEL:
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FPU_EMU_EVCNT_INCR(fsel);
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DPRINTF(FPE_INSN, ("fpu_execute: FSEL\n"));
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a = (int *)&fe->fe_fpstate->fpreg[ra].fpr;
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a = (int *)&fe->fe_fpstate->fpr[ra].fpr;
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if ((*a & 0x80000000) && (*a & 0x7fffffff))
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/* fra < 0 */
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rc = rb;
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DPRINTF(FPE_INSN, ("f%d => f%d\n", rc, rt));
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memcpy(&fs->fpreg[rt].fpr, &fs->fpreg[rc].fpr,
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memcpy(&fs->fpr[rt].fpr, &fs->fpr[rc].fpr,
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sizeof(double));
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break;
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case OPC59_FRES:
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@ -662,7 +662,7 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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fpu_explode(fe, &fe->fe_f1, type, rb);
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fp = fpu_sqrt(fe);
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/* now we've gotta overwrite the dest reg */
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*((int *)&fe->fe_fpstate->fpreg[rt].fpr) = 1;
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*((int *)&fe->fe_fpstate->fpr[rt].fpr) = 1;
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fpu_explode(fe, &fe->fe_f1, FTYPE_INT, rt);
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fpu_div(fe);
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break;
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@ -681,7 +681,7 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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fp = fpu_sqrt(fe);
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fe->fe_f2 = *fp;
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/* now we've gotta overwrite the dest reg */
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*((int *)&fe->fe_fpstate->fpreg[rt].fpr) = 1;
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*((int *)&fe->fe_fpstate->fpr[rt].fpr) = 1;
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fpu_explode(fe, &fe->fe_f1, FTYPE_INT, rt);
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fpu_div(fe);
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break;
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@ -737,7 +737,7 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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/* If the instruction was single precision, round */
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if (!(instr.i_any.i_opcd & 0x4)) {
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fpu_implode(fe, fp, FTYPE_SNG,
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(u_int *)&fs->fpreg[rt].fpr);
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(u_int *)&fs->fpr[rt].fpr);
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fpu_explode(fe, fp = &fe->fe_f1, FTYPE_SNG, rt);
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}
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}
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@ -752,7 +752,7 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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* Otherwise set new current exceptions and accrue.
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*/
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if (fp)
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fpu_implode(fe, fp, type, (u_int *)&fs->fpreg[rt].fpr);
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fpu_implode(fe, fp, type, (u_int *)&fs->fpr[rt].fpr);
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cx = fe->fe_cx;
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fsr = fe->fe_fpscr;
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if (cx != 0) {
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@ -53,7 +53,7 @@ __FBSDID("$FreeBSD$");
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#include <machine/fpu.h>
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#include <machine/ieee.h>
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#include <machine/reg.h>
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#include <machine/pcb.h>
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#include <powerpc/fpu/fpu_arith.h>
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#include <powerpc/fpu/fpu_emu.h>
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@ -211,9 +211,9 @@ fpu_explode(struct fpemu *fe, struct fpn *fp, int type, int reg)
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u_int s, *space;
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u_int64_t l, *xspace;
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xspace = (u_int64_t *)&fe->fe_fpstate->fpreg[reg].fpr;
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xspace = (u_int64_t *)&fe->fe_fpstate->fpr[reg].fpr;
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l = xspace[0];
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space = (u_int *)&fe->fe_fpstate->fpreg[reg].fpr;
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space = (u_int *)&fe->fe_fpstate->fpr[reg].fpr;
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s = space[0];
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fp->fp_sign = s >> 31;
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fp->fp_sticky = 0;
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