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Remove redundant ARM_L2_ADDR_BITS and L2_ADDR_BITS definitions and

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replace them by primary ones where needed.
This commit is contained in:
skra 2016-02-18 09:30:04 +00:00
parent 347c41395e
commit aa894ca21b
5 changed files with 2 additions and 12 deletions
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2
lib/libkvm/kvm_arm.c
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@ -183,7 +183,7 @@ _arm_initvtop(kvm_t *kd)
#define l1pte_section_p(pde) (((pde) & ARM_L1_TYPE_MASK) == ARM_L1_TYPE_S)
#define l1pte_valid(pde) ((pde) != 0)
#define l2pte_valid(pte) ((pte) != 0)
#define l2pte_index(v) (((v) & ARM_L2_ADDR_BITS) >> ARM_L2_S_SHIFT)
#define l2pte_index(v) (((v) & ARM_L1_S_OFFSET) >> ARM_L2_S_SHIFT)
static int

3
lib/libkvm/kvm_arm.h
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@ -72,8 +72,6 @@ typedef uint32_t arm_pt_entry_t;
#define ARM_L2_TYPE_T 0x03 /* Tiny Page - 1k - not used */
#define ARM_L2_TYPE_MASK 0x03
#define ARM_L2_ADDR_BITS 0x000ff000 /* L2 PTE address bits */
#ifdef __arm__
#include <machine/acle-compat.h>
@ -106,7 +104,6 @@ _Static_assert(L2_TYPE_S == ARM_L2_TYPE_S, "L2_TYPE_S mismatch");
_Static_assert(L2_TYPE_T == ARM_L2_TYPE_T, "L2_TYPE_T mismatch");
#endif
_Static_assert(L2_TYPE_MASK == ARM_L2_TYPE_MASK, "L2_TYPE_MASK mismatch");
_Static_assert(L2_ADDR_BITS == ARM_L2_ADDR_BITS, "L2_ADDR_BITS mismatch");
#endif
int _arm_native(kvm_t *);

2
sys/arm/include/pmap.h
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@ -489,7 +489,7 @@ void pmap_use_minicache(vm_offset_t, vm_size_t);
#define l1pte_page_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_C)
#define l1pte_fpage_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_F)
#define l2pte_index(v) (((v) & L2_ADDR_BITS) >> L2_S_SHIFT)
#define l2pte_index(v) (((v) & L1_S_OFFSET) >> L2_S_SHIFT)
#define l2pte_valid(pte) ((pte) != 0)
#define l2pte_pa(pte) ((pte) & L2_S_FRAME)
#define l2pte_minidata(pte) (((pte) & \

5
sys/arm/include/pte-v6.h
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@ -296,11 +296,6 @@
*/
#define AP_KRW 0x01 /* kernel read/write */
/*
* lib/libkvm/kvm_arm.c
*/
#define L2_ADDR_BITS 0x000ff000 /* L2 PTE address bits */
// -----------------------------------------------------------------------------
#endif /* !_MACHINE_PTE_H_ */

2
sys/arm/include/pte.h
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@ -148,8 +148,6 @@ typedef pt_entry_t pt2_entry_t; /* compatibility with v6 */
* So, we allocate L2 tables 4 at a time, thus yielding a 4K L2
* table.
*/
#define L2_ADDR_BITS 0x000ff000 /* L2 PTE address bits */
#define L1_TABLE_SIZE 0x4000 /* 16K */
#define L2_TABLE_SIZE 0x1000 /* 4K */
/*