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My quad cpu itanium2 box has its cpu's numbered with a lid starting

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at 192.  Masking off bottom 4 bits is not very good here.
This commit is contained in:
peter 2002-08-10 03:36:42 +00:00
parent b6ad09447d
commit abefb12367
1 changed files with 2 additions and 2 deletions
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4
sys/ia64/ia64/sapic.c
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@ -138,8 +138,8 @@ sapic_enable(struct sapic *sa, int input, int vector,
u_int64_t lid = ia64_get_lid();
bzero(&rte, sizeof(rte));
rte.rte_destination_id = (lid >> 24) & 15;
rte.rte_destination_eid = (lid >> 16) & 15;
rte.rte_destination_id = (lid >> 24) & 255;
rte.rte_destination_eid = (lid >> 16) & 255;
rte.rte_trigger_mode = trigger_mode;
rte.rte_polarity = polarity;
rte.rte_delivery_mode = 0; /* fixed */