Finish removing the non-INTRNG support from sys/arm64.
Obtained from: ABT Systems Ltd MFC after: 1 month Sponsored by: The FreeBSD Foundation
This commit is contained in:
andrew
parent
115fedf756
commit
ac30983101
@ -81,12 +81,8 @@ static void
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configure_final(void *dummy)
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{
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#ifdef INTRNG
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/* Enable interrupt reception on this CPU */
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intr_enable();
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#else
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arm_enable_intr();
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#endif
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cninit_finish();
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if (bootverbose)
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@ -65,7 +65,6 @@ __FBSDID("$FreeBSD$");
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#include <dev/psci/psci.h>
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#ifdef INTRNG
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#include "pic_if.h"
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typedef void intr_ipi_send_t(void *, cpuset_t, u_int);
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@ -86,7 +85,6 @@ static struct intr_ipi ipi_sources[INTR_IPI_COUNT];
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static struct intr_ipi *intr_ipi_lookup(u_int);
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static void intr_pic_ipi_setup(u_int, const char *, intr_ipi_handler_t *,
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void *);
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#endif /* INTRNG */
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boolean_t ofw_cpu_reg(phandle_t node, u_int, cell_t *);
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@ -214,18 +212,12 @@ release_aps(void *dummy __unused)
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{
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int cpu, i;
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#ifdef INTRNG
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intr_pic_ipi_setup(IPI_AST, "ast", ipi_ast, NULL);
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intr_pic_ipi_setup(IPI_PREEMPT, "preempt", ipi_preempt, NULL);
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intr_pic_ipi_setup(IPI_RENDEZVOUS, "rendezvous", ipi_rendezvous, NULL);
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intr_pic_ipi_setup(IPI_STOP, "stop", ipi_stop, NULL);
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intr_pic_ipi_setup(IPI_STOP_HARD, "stop hard", ipi_stop, NULL);
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intr_pic_ipi_setup(IPI_HARDCLOCK, "hardclock", ipi_hardclock, NULL);
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#else
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/* Setup the IPI handler */
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for (i = 0; i < INTR_IPI_COUNT; i++)
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arm_setup_ipihandler(ipi_handler, i);
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#endif
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atomic_store_rel_int(&aps_ready, 1);
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/* Wake up the other CPUs */
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@ -253,9 +245,6 @@ void
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init_secondary(uint64_t cpu)
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{
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struct pcpu *pcpup;
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#ifndef INTRNG
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int i;
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#endif
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pcpup = &__pcpu[cpu];
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/*
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@ -282,15 +271,7 @@ init_secondary(uint64_t cpu)
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*/
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identify_cpu();
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#ifdef INTRNG
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intr_pic_init_secondary();
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#else
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/* Configure the interrupt controller */
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arm_init_secondary();
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for (i = 0; i < INTR_IPI_COUNT; i++)
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arm_unmask_ipi(i);
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#endif
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/* Start per-CPU event timers. */
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cpu_initclocks_ap();
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@ -322,7 +303,6 @@ init_secondary(uint64_t cpu)
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/* NOTREACHED */
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}
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#ifdef INTRNG
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/*
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* Send IPI thru interrupt controller.
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*/
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@ -378,7 +358,6 @@ intr_ipi_send(cpuset_t cpus, u_int ipi)
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ii->ii_send(ii->ii_send_arg, cpus, ipi);
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}
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#endif
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static void
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ipi_ast(void *dummy __unused)
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@ -432,44 +411,6 @@ ipi_stop(void *dummy __unused)
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CTR0(KTR_SMP, "IPI_STOP (restart)");
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}
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#ifndef INTRNG
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static int
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ipi_handler(void *arg)
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{
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u_int cpu, ipi;
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arg = (void *)((uintptr_t)arg & ~(1 << 16));
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KASSERT((uintptr_t)arg < INTR_IPI_COUNT,
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("Invalid IPI %ju", (uintptr_t)arg));
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cpu = PCPU_GET(cpuid);
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ipi = (uintptr_t)arg;
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switch(ipi) {
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case IPI_AST:
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ipi_ast(NULL);
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break;
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case IPI_PREEMPT:
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ipi_preempt(NULL);
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break;
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case IPI_RENDEZVOUS:
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ipi_rendezvous(NULL);
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break;
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case IPI_STOP:
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case IPI_STOP_HARD:
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ipi_stop(NULL);
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break;
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case IPI_HARDCLOCK:
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ipi_hardclock(NULL);
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break;
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default:
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panic("Unknown IPI %#0x on cpu %d", ipi, curcpu);
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}
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return (FILTER_HANDLED);
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}
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#endif
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struct cpu_group *
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cpu_topo(void)
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{
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@ -624,7 +565,6 @@ cpu_mp_setmaxid(void)
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mp_maxid = 0;
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}
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#ifdef INTRNG
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/*
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* Lookup IPI source.
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*/
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@ -768,4 +708,3 @@ ipi_selected(cpuset_t cpus, u_int ipi)
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CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
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intr_ipi_send(cpus, ipi);
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}
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#endif /* INTRNG */
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@ -271,13 +271,9 @@ nexus_config_intr(device_t dev, int irq, enum intr_trigger trig,
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enum intr_polarity pol)
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{
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#ifdef INTRNG
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/* TODO: This is wrong, it's needed for ACPI */
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device_printf(dev, "bus_config_intr is obsolete and not supported!\n");
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return (EOPNOTSUPP);
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#else
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return (intr_irq_config(irq, trig, pol));
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#endif
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}
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static int
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@ -294,12 +290,7 @@ nexus_setup_intr(device_t dev, device_t child, struct resource *res, int flags,
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if (error)
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return (error);
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#ifdef INTRNG
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error = intr_setup_irq(child, res, filt, intr, arg, flags, cookiep);
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#else
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error = arm_setup_intr(device_get_nameunit(child), filt, intr,
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arg, rman_get_start(res), flags, cookiep);
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#endif
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return (error);
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}
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@ -308,11 +299,7 @@ static int
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nexus_teardown_intr(device_t dev, device_t child, struct resource *r, void *ih)
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{
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#ifdef INTRNG
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return (intr_teardown_irq(child, r, ih));
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#else
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return (intr_irq_remove_handler(child, rman_get_start(r), ih));
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#endif
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}
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#ifdef SMP
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@ -320,11 +307,7 @@ static int
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nexus_bind_intr(device_t dev, device_t child, struct resource *irq, int cpu)
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{
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#ifdef INTRNG
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return (intr_bind_irq(child, irq, cpu));
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#else
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return (intr_irq_bind(rman_get_start(irq), cpu));
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#endif
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}
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#endif
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@ -447,22 +430,8 @@ static int
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nexus_ofw_map_intr(device_t dev, device_t child, phandle_t iparent, int icells,
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pcell_t *intr)
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{
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#ifdef INTRNG
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return (INTR_IRQ_INVALID);
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#else
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int irq;
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if (icells == 3) {
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irq = intr[1];
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if (intr[0] == 0)
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irq += 32; /* SPI */
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else
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irq += 16; /* PPI */
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} else
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irq = intr[0];
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return (irq);
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#endif
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}
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#endif
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@ -29,8 +29,6 @@
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#ifndef _MACHINE_INTR_H_
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#define _MACHINE_INTR_H_
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#ifdef INTRNG
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#ifdef FDT
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#include <dev/ofw/openfirm.h>
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#endif
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@ -50,33 +48,4 @@ arm_irq_memory_barrier(uintptr_t irq)
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void intr_ipi_dispatch(u_int, struct trapframe *);
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#endif
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#else
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int intr_irq_config(u_int, enum intr_trigger, enum intr_polarity);
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void intr_irq_handler(struct trapframe *);
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int intr_irq_remove_handler(device_t, u_int, void *);
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void arm_dispatch_intr(u_int, struct trapframe *);
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int arm_enable_intr(void);
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void arm_mask_irq(u_int);
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void arm_register_root_pic(device_t, u_int);
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void arm_register_msi_pic(device_t);
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int arm_alloc_msi(device_t, device_t, int, int, int *);
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int arm_release_msi(device_t, device_t, int, int *);
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int arm_alloc_msix(device_t, device_t, int *);
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int arm_release_msix(device_t, device_t, int);
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int arm_map_msi(device_t, device_t, int, uint64_t *, uint32_t *);
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int arm_map_msix(device_t, device_t, int, uint64_t *, uint32_t *);
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int arm_setup_intr(const char *, driver_filter_t *, driver_intr_t,
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void *, u_int, enum intr_type, void **);
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void arm_unmask_irq(u_int);
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#ifdef SMP
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int intr_irq_bind(u_int, int);
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void arm_init_secondary(void);
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void arm_setup_ipihandler(driver_filter_t *, u_int);
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void arm_unmask_ipi(u_int);
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#endif
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#endif
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#endif /* _MACHINE_INTR_H */
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