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Clock divisors 0-3 correspond to dividing by 1-4, so add 1 before dividing.

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This commit is contained in:
Ian Lepore 2013-10-19 21:33:06 +00:00
parent ff14d523bb
commit ac640932f4
1 changed files with 2 additions and 2 deletions
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4
sys/arm/freescale/imx/imx51_ccm.c
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@ -278,8 +278,8 @@ imx51_get_clock(enum imx51_clock clk)
case IMX51CLK_MAIN_BUS_CLK:
freq = imx51_get_clock(IMX51CLK_MAIN_BUS_CLK_SRC);
cdcr = bus_read_4(ccm_softc->res[0], CCMC_CDCR);
return freq / (cdcr & CDCR_PERIPH_CLK_DVFS_PODF_MASK) >>
CDCR_PERIPH_CLK_DVFS_PODF_SHIFT;
return freq / (1 + ((cdcr & CDCR_PERIPH_CLK_DVFS_PODF_MASK) >>
CDCR_PERIPH_CLK_DVFS_PODF_SHIFT));
case IMX51CLK_AHB_CLK_ROOT:
freq = imx51_get_clock(IMX51CLK_MAIN_BUS_CLK);
cbcdr = bus_read_4(ccm_softc->res[0], CCMC_CBCDR);