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Don't assume that the PCI BIOS is going to clear the unused bits in %ecx

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when it returns.
This commit is contained in:
Mike Smith 2000-05-04 17:44:55 +00:00
parent ec6fc617fa
commit ac9b3dacb2
6 changed files with 30 additions and 6 deletions
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6
sys/amd64/pci/pci_bus.c
View File

@ -90,16 +90,20 @@ static int
pcibios_cfgread(pcicfgregs *cfg, int reg, int bytes)
{
struct bios_regs args;
u_int mask;
switch(bytes) {
case 1:
args.eax = PCIBIOS_READ_CONFIG_BYTE;
mask = 0xff;
break;
case 2:
args.eax = PCIBIOS_READ_CONFIG_WORD;
mask = 0xffff;
break;
case 4:
args.eax = PCIBIOS_READ_CONFIG_DWORD;
mask = 0xffffffff;
break;
default:
return(-1);
@ -108,7 +112,7 @@ pcibios_cfgread(pcicfgregs *cfg, int reg, int bytes)
args.edi = reg;
bios32(&args, PCIbios.ventry, GSEL(GCODE_SEL, SEL_KPL));
/* check call results? */
return(args.ecx);
return(args.ecx & mask);
}
static void

6
sys/amd64/pci/pci_cfgreg.c
View File

@ -90,16 +90,20 @@ static int
pcibios_cfgread(pcicfgregs *cfg, int reg, int bytes)
{
struct bios_regs args;
u_int mask;
switch(bytes) {
case 1:
args.eax = PCIBIOS_READ_CONFIG_BYTE;
mask = 0xff;
break;
case 2:
args.eax = PCIBIOS_READ_CONFIG_WORD;
mask = 0xffff;
break;
case 4:
args.eax = PCIBIOS_READ_CONFIG_DWORD;
mask = 0xffffffff;
break;
default:
return(-1);
@ -108,7 +112,7 @@ pcibios_cfgread(pcicfgregs *cfg, int reg, int bytes)
args.edi = reg;
bios32(&args, PCIbios.ventry, GSEL(GCODE_SEL, SEL_KPL));
/* check call results? */
return(args.ecx);
return(args.ecx & mask);
}
static void

6
sys/i386/isa/pcibus.c
View File

@ -90,16 +90,20 @@ static int
pcibios_cfgread(pcicfgregs *cfg, int reg, int bytes)
{
struct bios_regs args;
u_int mask;
switch(bytes) {
case 1:
args.eax = PCIBIOS_READ_CONFIG_BYTE;
mask = 0xff;
break;
case 2:
args.eax = PCIBIOS_READ_CONFIG_WORD;
mask = 0xffff;
break;
case 4:
args.eax = PCIBIOS_READ_CONFIG_DWORD;
mask = 0xffffffff;
break;
default:
return(-1);
@ -108,7 +112,7 @@ pcibios_cfgread(pcicfgregs *cfg, int reg, int bytes)
args.edi = reg;
bios32(&args, PCIbios.ventry, GSEL(GCODE_SEL, SEL_KPL));
/* check call results? */
return(args.ecx);
return(args.ecx & mask);
}
static void

6
sys/i386/pci/pci_bus.c
View File

@ -90,16 +90,20 @@ static int
pcibios_cfgread(pcicfgregs *cfg, int reg, int bytes)
{
struct bios_regs args;
u_int mask;
switch(bytes) {
case 1:
args.eax = PCIBIOS_READ_CONFIG_BYTE;
mask = 0xff;
break;
case 2:
args.eax = PCIBIOS_READ_CONFIG_WORD;
mask = 0xffff;
break;
case 4:
args.eax = PCIBIOS_READ_CONFIG_DWORD;
mask = 0xffffffff;
break;
default:
return(-1);
@ -108,7 +112,7 @@ pcibios_cfgread(pcicfgregs *cfg, int reg, int bytes)
args.edi = reg;
bios32(&args, PCIbios.ventry, GSEL(GCODE_SEL, SEL_KPL));
/* check call results? */
return(args.ecx);
return(args.ecx & mask);
}
static void

6
sys/i386/pci/pci_cfgreg.c
View File

@ -90,16 +90,20 @@ static int
pcibios_cfgread(pcicfgregs *cfg, int reg, int bytes)
{
struct bios_regs args;
u_int mask;
switch(bytes) {
case 1:
args.eax = PCIBIOS_READ_CONFIG_BYTE;
mask = 0xff;
break;
case 2:
args.eax = PCIBIOS_READ_CONFIG_WORD;
mask = 0xffff;
break;
case 4:
args.eax = PCIBIOS_READ_CONFIG_DWORD;
mask = 0xffffffff;
break;
default:
return(-1);
@ -108,7 +112,7 @@ pcibios_cfgread(pcicfgregs *cfg, int reg, int bytes)
args.edi = reg;
bios32(&args, PCIbios.ventry, GSEL(GCODE_SEL, SEL_KPL));
/* check call results? */
return(args.ecx);
return(args.ecx & mask);
}
static void

6
sys/i386/pci/pci_pir.c
View File

@ -90,16 +90,20 @@ static int
pcibios_cfgread(pcicfgregs *cfg, int reg, int bytes)
{
struct bios_regs args;
u_int mask;
switch(bytes) {
case 1:
args.eax = PCIBIOS_READ_CONFIG_BYTE;
mask = 0xff;
break;
case 2:
args.eax = PCIBIOS_READ_CONFIG_WORD;
mask = 0xffff;
break;
case 4:
args.eax = PCIBIOS_READ_CONFIG_DWORD;
mask = 0xffffffff;
break;
default:
return(-1);
@ -108,7 +112,7 @@ pcibios_cfgread(pcicfgregs *cfg, int reg, int bytes)
args.edi = reg;
bios32(&args, PCIbios.ventry, GSEL(GCODE_SEL, SEL_KPL));
/* check call results? */
return(args.ecx);
return(args.ecx & mask);
}
static void