diff --git a/sys/mips/adm5120/adm5120_machdep.c b/sys/mips/adm5120/adm5120_machdep.c deleted file mode 100644 index b1c1e3a273a4..000000000000 --- a/sys/mips/adm5120/adm5120_machdep.c +++ /dev/null @@ -1,146 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (C) 2007 by Oleksandr Tymoshenko. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -__FBSDID("$FreeBSD$"); - -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -extern int *edata; -extern int *end; - -void -platform_cpu_init() -{ - /* Nothing special */ -} - -static void -mips_init(void) -{ - int i; - - printf("entry: mips_init()\n"); - - bootverbose = 1; - realmem = btoc(16 << 20); - - for (i = 0; i < 10; i++) { - phys_avail[i] = 0; - } - - /* phys_avail regions are in bytes */ - phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end); - phys_avail[1] = ctob(realmem); - - dump_avail[0] = phys_avail[0]; - dump_avail[1] = phys_avail[1]; - - physmem = realmem; - - init_param1(); - init_param2(physmem); - mips_cpu_init(); - pmap_bootstrap(); - mips_proc0_init(); - mutex_init(); - kdb_init(); -#ifdef KDB - if (boothowto & RB_KDB) - kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); -#endif -} - -void -platform_reset(void) -{ - - __asm __volatile("li $25, 0xbfc00000"); - __asm __volatile("j $25"); -} - -void -platform_start(__register_t a0 __unused, __register_t a1 __unused, - __register_t a2 __unused, __register_t a3 __unused) -{ - vm_offset_t kernend; - uint64_t platform_counter_freq = 175 * 1000 * 1000; - - /* clear the BSS and SBSS segments */ - kernend = (vm_offset_t)&end; - memset(&edata, 0, kernend - (vm_offset_t)(&edata)); - - mips_postboot_fixup(); - - /* Initialize pcpu stuff */ - mips_pcpu0_init(); - - cninit(); - mips_init(); - mips_timer_init_params(platform_counter_freq, 0); -} diff --git a/sys/mips/adm5120/adm5120reg.h b/sys/mips/adm5120/adm5120reg.h deleted file mode 100644 index ce8a4d5b7bd9..000000000000 --- a/sys/mips/adm5120/adm5120reg.h +++ /dev/null @@ -1,296 +0,0 @@ -/* $NetBSD: adm5120reg.h,v 1.1 2007/03/20 08:52:03 dyoung Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * 3. The names of the authors may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A - * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#ifndef _ADM5120REG_H_ -#define _ADM5120REG_H_ - -/* Helpers from NetBSD */ -/* __BIT(n): nth bit, where __BIT(0) == 0x1. */ -#define __BIT(__n) \ - (((__n) >= NBBY * sizeof(uintmax_t)) ? 0 : ((uintmax_t)1 << (__n))) - -/* __BITS(m, n): bits m through n, m < n. */ -#define __BITS(__m, __n) \ - ((__BIT(MAX((__m), (__n)) + 1) - 1) ^ (__BIT(MIN((__m), (__n))) - 1)) - -/* Last byte of physical address space. */ -#define ADM5120_TOP 0x1fffffff -#define ADM5120_BOTTOM 0x0 - -/* Flash addresses */ -#define ADM5120_BASE_SRAM0 0x1fc00000 - -/* UARTs */ -#define ADM5120_BASE_UART1 0x12800000 -#define ADM5120_BASE_UART0 0x12600000 - -/* ICU */ -#define ADM5120_BASE_ICU 0x12200000 -#define ICU_STATUS_REG 0x00 -#define ICU_RAW_STATUS_REG 0x04 -#define ICU_ENABLE_REG 0x08 -#define ICU_DISABLE_REG 0x0c -#define ICU_SOFT_REG 0x10 -#define ICU_MODE_REG 0x14 -#define ICU_FIQ_STATUS_REG 0x18 -#define ICU_TESTSRC_REG 0x1c -#define ICU_SRCSEL_REG 0x20 -#define ICU_LEVEL_REG 0x24 -#define ICU_INT_MASK 0x3ff - -/* Switch */ -#define ADM5120_BASE_SWITCH 0x12000000 -#define SW_CODE_REG 0x00 -#define CLKS_MASK 0x00300000 -#define CLKS_175MHZ 0x00000000 -#define CLKS_200MHZ 0x00100000 -#define SW_SFTRES_REG 0x04 -#define SW_MEMCONT_REG 0x1c -#define SDRAM_SIZE_4MBYTES 0x0001 -#define SDRAM_SIZE_8MBYTES 0x0002 -#define SDRAM_SIZE_16MBYTES 0x0003 -#define SDRAM_SIZE_64MBYTES 0x0004 -#define SDRAM_SIZE_128MBYTES 0x0005 -#define SDRAM_SIZE_MASK 0x0007 -#define SRAM0_SIZE_SHIFT 8 -#define SRAM1_SIZE_SHIFT 16 -#define SRAM_MASK 0x0007 -#define SRAM_SSIZE 0x40000 - -#define ADM5120_BASE_PCI_CONFDATA 0x115ffff8 -#define ADM5120_BASE_PCI_CONFADDR 0x115ffff0 -#define ADM5120_BASE_PCI_IO 0x11500000 -#define ADM5120_BASE_PCI_MEM 0x11400000 -#define ADM5120_BASE_USB 0x11200000 -#define ADM5120_BASE_MPMC 0x11000000 -#define ADM5120_BASE_EXTIO1 0x10e00000 -#define ADM5120_BASE_EXTIO0 0x10c00000 -#define ADM5120_BASE_RSVD0 0x10800000 -#define ADM5120_BASE_SRAM1 0x10000000 - -#define _REG_READ(b, o) *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((b) + (o))) -#define SW_READ(o) _REG_READ(ADM5120_BASE_SWITCH, o) - -#define _REG_WRITE(b, o, v) (_REG_READ(b, o)) = (v) -#define SW_WRITE(o, v) _REG_WRITE(ADM5120_BASE_SWITCH,o, v) - -/* USB */ - -/* Watchdog Timers: base address is switch controller */ - -#define ADM5120_WDOG0 0x00c0 -#define ADM5120_WDOG1 0x00c4 - -#define ADM5120_WDOG0_WTTR __BIT(31) /* 0: do not reset, - * 1: reset on wdog expiration - */ -#define ADM5120_WDOG1_WDE __BIT(31) /* 0: deactivate, - * 1: drop all CPU-bound - * packets, disable flow - * control on all ports. - */ -#define ADM5120_WDOG_WTS_MASK __BITS(30, 16) /* Watchdog Timer Set: - * timer expires when it - * reaches WTS. Units of - * 10ms. - */ -#define ADM5120_WDOG_RSVD __BIT(15) -#define ADM5120_WDOG_WT_MASK __BITS(14, 0) /* Watchdog Timer: - * counts up, write to clear. - */ - -/* GPIO: base address is switch controller */ -#define ADM5120_GPIO0 0x00b8 - -#define ADM5120_GPIO0_OV __BITS(31, 24) /* rw: output value */ -#define ADM5120_GPIO0_OE __BITS(23, 16) /* rw: output enable, - * bit[n] = 0 -> input - * bit[n] = 1 -> output - */ -#define ADM5120_GPIO0_IV __BITS(15, 8) /* ro: input value */ -#define ADM5120_GPIO0_RSVD __BITS(7, 0) /* rw: reserved */ - -#define ADM5120_GPIO2 0x00bc -#define ADM5120_GPIO2_EW __BIT(6) /* 1: enable wait state pin, - * pin GPIO[0], for GPIO[1] - * or GPIO[3] Chip Select: - * memory controller waits for - * WAIT# inactive (high). - */ -#define ADM5120_GPIO2_CSX1 __BIT(5) /* 1: GPIO[3:4] act as - * Chip Select for - * External I/O 1 (CSX1) - * and External Interrupt 1 - * (INTX1), respectively. - * 0: CSX1/INTX1 disabled - */ -#define ADM5120_GPIO2_CSX0 __BIT(4) /* 1: GPIO[1:2] act as - * Chip Select for - * External I/O 0 (CSX0) - * and External Interrupt 0 - * (INTX0), respectively. - * 0: CSX0/INTX0 disabled - */ - -/* MultiPort Memory Controller (MPMC) */ - -#define ADM5120_MPMC_CONTROL 0x000 -#define ADM5120_MPMC_CONTROL_DWB __BIT(3) /* write 1 to - * drain write - * buffers. write 0 - * for normal buffer - * operation. - */ -#define ADM5120_MPMC_CONTROL_LPM __BIT(2) /* 1: activate low-power - * mode. SDRAM is - * still refreshed. - */ -#define ADM5120_MPMC_CONTROL_AM __BIT(1) /* 1: address mirror: - * static memory - * chip select 0 - * is mapped to chip - * select 1. - */ -#define ADM5120_MPMC_CONTROL_ME __BIT(0) /* 0: disable MPMC. - * DRAM is not - * refreshed. - * 1: enable MPMC. - */ - -#define ADM5120_MPMC_STATUS 0x004 -#define ADM5120_MPMC_STATUS_SRA __BIT(2) /* read-only - * MPMC operating mode - * indication, - * 1: self-refresh - * acknowledge - * 0: normal mode - */ -#define ADM5120_MPMC_STATUS_WBS __BIT(1) /* read-only - * write-buffer status, - * 0: buffers empty - * 1: contain data - */ -#define ADM5120_MPMC_STATUS_BU __BIT(0) /* read-only MPMC - * "busy" indication, - * 0: MPMC idle - * 1: MPMC is performing - * memory transactions - */ - -#define ADM5120_MPMC_SEW 0x080 -#define ADM5120_MPMC_SEW_RSVD __BITS(31, 10) -#define ADM5120_MPMC_SEW_EWTO __BITS(9, 0) /* timeout access after - * 16 * (n + 1) clock cycles - * (XXX which clock?) - */ - -#define ADM5120_MPMC_SC(__i) (0x200 + 0x020 * (__i)) -#define ADM5120_MPMC_SC_RSVD0 __BITS(31, 21) -#define ADM5120_MPMC_SC_WP __BIT(20) /* 1: write protect */ -#define ADM5120_MPMC_SC_BE __BIT(20) /* 1: enable write buffer */ -#define ADM5120_MPMC_SC_RSVD1 __BITS(18, 9) -#define ADM5120_MPMC_SC_EW __BIT(8) /* 1: enable extended wait; - */ -#define ADM5120_MPMC_SC_BLS __BIT(7) /* 0: byte line state pins - * are active high on read, - * active low on write. - * - * 1: byte line state pins - * are active low on read and - * on write. - */ -#define ADM5120_MPMC_SC_CCP __BIT(6) /* 0: chip select is active low, - * 1: active high - */ -#define ADM5120_MPMC_SC_RSVD2 __BITS(5, 4) -#define ADM5120_MPMC_SC_PM __BIT(3) /* 0: page mode disabled, - * 1: enable asynchronous - * page mode four - */ -#define ADM5120_MPMC_SC_RSVD3 __BIT(2) -#define ADM5120_MPMC_SC_MW_MASK __BITS(1, 0) /* memory width, bits */ -#define ADM5120_MPMC_SC_MW_8B __SHIFTIN(0, ADM5120_MPMC_SC_MW_MASK) -#define ADM5120_MPMC_SC_MW_16B __SHIFTIN(1, ADM5120_MPMC_SC_MW_MASK) -#define ADM5120_MPMC_SC_MW_32B __SHIFTIN(2, ADM5120_MPMC_SC_MW_MASK) -#define ADM5120_MPMC_SC_MW_RSVD __SHIFTIN(3, ADM5120_MPMC_SC_MW_MASK) - -#define ADM5120_MPMC_SWW(__i) (0x204 + 0x020 * (__i)) -#define ADM5120_MPMC_SWW_RSVD __BITS(31, 4) -#define ADM5120_MPMC_SWW_WWE __BITS(3, 0) /* delay (n + 1) * HCLK cycles - * after asserting chip select - * (CS) before asserting write - * enable (WE) - */ - -#define ADM5120_MPMC_SWO(__i) (0x208 + 0x020 * (__i)) -#define ADM5120_MPMC_SWO_RSVD __BITS(31, 4) -#define ADM5120_MPMC_SWO_WOE __BITS(3, 0) /* delay n * HCLK cycles - * after asserting chip select - * before asserting output - * enable (OE) - */ - -#define ADM5120_MPMC_SWR(__i) (0x20c + 0x020 * (__i)) -#define ADM5120_MPMC_SWR_RSVD __BITS(31, 5) -#define ADM5120_MPMC_SWR_NMRW __BITS(4, 0) /* read wait states for - * either first page-mode - * access or for non-page mode - * read, (n + 1) * HCLK cycles - */ - -#define ADM5120_MPMC_SWP(__i) (0x210 + 0x020 * (__i)) -#define ADM5120_MPMC_SWP_RSVD __BITS(31, 5) -#define ADM5120_MPMC_SWP_WPS __BITS(4, 0) /* read wait states for - * second and subsequent - * page-mode read, - * (n + 1) * HCLK cycles - */ - -#define ADM5120_MPMC_SWWR(__i) (0x214 + 0x020 * (__i)) -#define ADM5120_MPMC_SWWR_RSVD __BITS(31, 5) -#define ADM5120_MPMC_SWWR_WWS __BITS(4, 0) /* write wait states after - * the first read (??), - * (n + 2) * HCLK cycles - */ - -#define ADM5120_MPMC_SWT(__i) (0x218 + 0x020 * (__i)) -#define ADM5120_MPMC_SWT_RSVD __BITS(31, 4) -#define ADM5120_MPMC_SWT_WAITTURN __BITS(3, 0) /* bus turnaround time, - * (n + 1) * HCLK cycles - */ - -#endif /* _ADM5120REG_H_ */ diff --git a/sys/mips/adm5120/admpci.c b/sys/mips/adm5120/admpci.c deleted file mode 100644 index 66bcbf5b7798..000000000000 --- a/sys/mips/adm5120/admpci.c +++ /dev/null @@ -1,504 +0,0 @@ -/* $NetBSD: admpci.c,v 1.1 2007/03/20 08:52:02 dyoung Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2007 David Young. All rights reserved. - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A - * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - */ -/*- - * Copyright (c) 2006 Itronix Inc. - * All rights reserved. - * - * Written by Garrett D'Amore for Itronix Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of Itronix Inc. may not be used to endorse - * or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD$"); - -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include -#include - -#include -#include "pcib_if.h" - -#include - -#ifdef ADMPCI_DEBUG -int admpci_debug = 1; -#define ADMPCI_DPRINTF(__fmt, ...) \ -do { \ - if (admpci_debug) \ - printf((__fmt), __VA_ARGS__); \ -} while (/*CONSTCOND*/0) -#else /* !ADMPCI_DEBUG */ -#define ADMPCI_DPRINTF(__fmt, ...) do { } while (/*CONSTCOND*/0) -#endif /* ADMPCI_DEBUG */ - -#define ADMPCI_TAG_BUS_MASK __BITS(23, 16) -/* Bit 11 is reserved. It selects the AHB-PCI bridge. Let device 0 - * be the bridge. For all other device numbers, let bit[11] == 0. - */ -#define ADMPCI_TAG_DEVICE_MASK __BITS(15, 11) -#define ADMPCI_TAG_DEVICE_SUBMASK __BITS(15, 12) -#define ADMPCI_TAG_DEVICE_BRIDGE __BIT(11) -#define ADMPCI_TAG_FUNCTION_MASK __BITS(10, 8) -#define ADMPCI_TAG_REGISTER_MASK __BITS(7, 0) - -#define ADMPCI_MAX_DEVICE - -struct admpci_softc { - device_t sc_dev; - bus_space_tag_t sc_st; - - /* Access to PCI config registers */ - bus_space_handle_t sc_addrh; - bus_space_handle_t sc_datah; - - int sc_busno; - struct rman sc_mem_rman; - struct rman sc_io_rman; - struct rman sc_irq_rman; - uint32_t sc_mem; - uint32_t sc_io; -}; - -static int -admpci_probe(device_t dev) -{ - - return (0); -} - -static int -admpci_attach(device_t dev) -{ - int busno = 0; - struct admpci_softc *sc = device_get_softc(dev); - - sc->sc_dev = dev; - sc->sc_busno = busno; - - /* Use KSEG1 to access IO ports for it is uncached */ - sc->sc_io = MIPS_PHYS_TO_KSEG1(ADM5120_BASE_PCI_IO); - sc->sc_io_rman.rm_type = RMAN_ARRAY; - sc->sc_io_rman.rm_descr = "ADMPCI I/O Ports"; - if (rman_init(&sc->sc_io_rman) != 0 || - rman_manage_region(&sc->sc_io_rman, 0, 0xffff) != 0) { - panic("admpci_attach: failed to set up I/O rman"); - } - - /* Use KSEG1 to access PCI memory for it is uncached */ - sc->sc_mem = MIPS_PHYS_TO_KSEG1(ADM5120_BASE_PCI_MEM); - sc->sc_mem_rman.rm_type = RMAN_ARRAY; - sc->sc_mem_rman.rm_descr = "ADMPCI PCI Memory"; - if (rman_init(&sc->sc_mem_rman) != 0 || - rman_manage_region(&sc->sc_mem_rman, - sc->sc_mem, sc->sc_mem + 0x100000) != 0) { - panic("admpci_attach: failed to set up memory rman"); - } - - sc->sc_irq_rman.rm_type = RMAN_ARRAY; - sc->sc_irq_rman.rm_descr = "ADMPCI PCI IRQs"; - if (rman_init(&sc->sc_irq_rman) != 0 || - rman_manage_region(&sc->sc_irq_rman, 1, 31) != 0) - panic("admpci_attach: failed to set up IRQ rman"); - - if (bus_space_map(sc->sc_st, ADM5120_BASE_PCI_CONFADDR, 4, 0, - &sc->sc_addrh) != 0) { - device_printf(sc->sc_dev, "unable to address space\n"); - panic("bus_space_map failed"); - } - - if (bus_space_map(sc->sc_st, ADM5120_BASE_PCI_CONFDATA, 4, 0, - &sc->sc_datah) != 0) { - device_printf(sc->sc_dev, "unable to address space\n"); - panic("bus_space_map failed"); - } - - device_add_child(dev, "pci", -1); - return (bus_generic_attach(dev)); -} - -static int -admpci_maxslots(device_t dev) -{ - - return (PCI_SLOTMAX); -} - -static uint32_t -admpci_make_addr(int bus, int slot, int func, int reg) -{ - - return (0x80000000 | (bus << 16) | (slot << 11) | (func << 8) | reg); -} - -static uint32_t -admpci_read_config(device_t dev, int bus, int slot, int func, int reg, - int bytes) -{ - struct admpci_softc *sc = device_get_softc(dev); - uint32_t data; - uint32_t shift, mask; - bus_addr_t addr; - - ADMPCI_DPRINTF("%s: sc %p tag (%x, %x, %x) reg %d\n", __func__, - (void *)sc, bus, slot, func, reg); - - addr = admpci_make_addr(bus, slot, func, reg); - - ADMPCI_DPRINTF("%s: sc_addrh %p sc_datah %p addr %p\n", __func__, - (void *)sc->sc_addrh, (void *)sc->sc_datah, (void *)addr); - - bus_space_write_4(sc->sc_io, sc->sc_addrh, 0, addr); - data = bus_space_read_4(sc->sc_io, sc->sc_datah, 0); - - switch (reg % 4) { - case 3: - shift = 24; - break; - case 2: - shift = 16; - break; - case 1: - shift = 8; - break; - default: - shift = 0; - break; - } - - switch (bytes) { - case 1: - mask = 0xff; - data = (data >> shift) & mask; - break; - case 2: - mask = 0xffff; - if (reg % 4 == 0) - data = data & mask; - else - data = (data >> 16) & mask; - break; - case 4: - break; - default: - panic("%s: wrong bytes count", __func__); - break; - } - - ADMPCI_DPRINTF("%s: read 0x%x\n", __func__, data); - return (data); -} - -static void -admpci_write_config(device_t dev, int bus, int slot, int func, int reg, - uint32_t data, int bytes) -{ - struct admpci_softc *sc = device_get_softc(dev); - bus_addr_t addr; - uint32_t reg_data; - uint32_t shift, mask; - - ADMPCI_DPRINTF("%s: sc %p tag (%x, %x, %x) reg %d\n", __func__, - (void *)sc, bus, slot, func, reg); - - if (bytes != 4) { - reg_data = admpci_read_config(dev, bus, slot, func, reg, 4); - - switch (reg % 4) { - case 3: - shift = 24; - break; - case 2: - shift = 16; - break; - case 1: - shift = 8; - break; - default: - shift = 0; - break; - } - - switch (bytes) { - case 1: - mask = 0xff; - data = (reg_data & ~ (mask << shift)) | (data << shift); - break; - case 2: - mask = 0xffff; - if (reg % 4 == 0) - data = (reg_data & ~mask) | data; - else - data = (reg_data & ~ (mask << shift)) | - (data << shift); - break; - case 4: - break; - default: - panic("%s: wrong bytes count", __func__); - break; - } - } - - addr = admpci_make_addr(bus, slot, func, reg); - - ADMPCI_DPRINTF("%s: sc_addrh %p sc_datah %p addr %p\n", __func__, - (void *)sc->sc_addrh, (void *)sc->sc_datah, (void *)addr); - - bus_space_write_4(sc->sc_io, sc->sc_addrh, 0, addr); - bus_space_write_4(sc->sc_io, sc->sc_datah, 0, data); -} - -static int -admpci_route_interrupt(device_t pcib, device_t dev, int pin) -{ - /* TODO: implement */ - return (0); -} - -static int -admpci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) -{ - struct admpci_softc *sc = device_get_softc(dev); - - switch (which) { - case PCIB_IVAR_DOMAIN: - *result = 0; - return (0); - case PCIB_IVAR_BUS: - *result = sc->sc_busno; - return (0); - } - - return (ENOENT); -} - -static int -admpci_write_ivar(device_t dev, device_t child, int which, uintptr_t result) -{ - struct admpci_softc * sc = device_get_softc(dev); - - switch (which) { - case PCIB_IVAR_BUS: - sc->sc_busno = result; - return (0); - } - return (ENOENT); -} - -static struct resource * -admpci_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - - return (NULL); -#if 0 - struct admpci_softc *sc = device_get_softc(bus); - struct resource *rv = NULL; - struct rman *rm; - bus_space_handle_t bh = 0; - - switch (type) { - case SYS_RES_IRQ: - rm = &sc->sc_irq_rman; - break; - case SYS_RES_MEMORY: - rm = &sc->sc_mem_rman; - bh = sc->sc_mem; - break; - case SYS_RES_IOPORT: - rm = &sc->sc_io_rman; - bh = sc->sc_io; - break; - default: - return (NULL); - } - - rv = rman_reserve_resource(rm, start, end, count, flags, child); - if (rv == NULL) - return (NULL); - rman_set_rid(rv, *rid); - if (type != SYS_RES_IRQ) { - bh += (rman_get_start(rv)); - - rman_set_bustag(rv, sc->sc_st); - rman_set_bushandle(rv, bh); - if (flags & RF_ACTIVE) { - if (bus_activate_resource(child, type, *rid, rv)) { - rman_release_resource(rv); - return (NULL); - } - } - } - return (rv); -#endif -} - -static int -admpci_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - bus_space_handle_t p; - int error; - - if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { - error = bus_space_map(rman_get_bustag(r), - rman_get_bushandle(r), rman_get_size(r), 0, &p); - if (error) - return (error); - rman_set_bushandle(r, p); - } - return (rman_activate_resource(r)); -} - -static int -admpci_setup_intr(device_t dev, device_t child, struct resource *ires, - int flags, driver_filter_t *filt, driver_intr_t *handler, - void *arg, void **cookiep) -{ - -#if 0 - struct admpci_softc *sc = device_get_softc(dev); - struct intr_event *event; - int irq, error; - - irq = rman_get_start(ires); - if (irq >= ICU_LEN || irq == 2) - panic("%s: bad irq or type", __func__); - - event = sc->sc_eventstab[irq]; - if (event == NULL) { - error = intr_event_create(&event, (void *)irq, 0, - (void (*)(void *))NULL, "admpci intr%d:", irq); - if (error) - return 0; - sc->sc_eventstab[irq] = event; - } - - intr_event_add_handler(event, device_get_nameunit(child), filt, - handler, arg, intr_priority(flags), flags, cookiep); - - /* Enable it, set trigger mode. */ - sc->sc_imask &= ~(1 << irq); - sc->sc_elcr &= ~(1 << irq); - - admpci_set_icus(sc); -#endif - - return (0); -} - -static int -admpci_teardown_intr(device_t dev, device_t child, struct resource *res, - void *cookie) -{ - - return (intr_event_remove_handler(cookie)); -} - -static device_method_t admpci_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, admpci_probe), - DEVMETHOD(device_attach, admpci_attach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* Bus interface */ - DEVMETHOD(bus_read_ivar, admpci_read_ivar), - DEVMETHOD(bus_write_ivar, admpci_write_ivar), - DEVMETHOD(bus_alloc_resource, admpci_alloc_resource), - DEVMETHOD(bus_release_resource, bus_generic_release_resource), - DEVMETHOD(bus_activate_resource, admpci_activate_resource), - DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), - DEVMETHOD(bus_setup_intr, admpci_setup_intr), - DEVMETHOD(bus_teardown_intr, admpci_teardown_intr), - - /* pcib interface */ - DEVMETHOD(pcib_maxslots, admpci_maxslots), - DEVMETHOD(pcib_read_config, admpci_read_config), - DEVMETHOD(pcib_write_config, admpci_write_config), - DEVMETHOD(pcib_route_interrupt, admpci_route_interrupt), - DEVMETHOD(pcib_request_feature, pcib_request_feature_allow), - - DEVMETHOD_END -}; - -static driver_t admpci_driver = { - "pcib", - admpci_methods, - sizeof(struct admpci_softc), -}; - -static devclass_t admpci_devclass; - -DRIVER_MODULE(admpci, obio, admpci_driver, admpci_devclass, 0, 0); diff --git a/sys/mips/adm5120/console.c b/sys/mips/adm5120/console.c deleted file mode 100644 index 89495c3954c4..000000000000 --- a/sys/mips/adm5120/console.c +++ /dev/null @@ -1,109 +0,0 @@ -/* $NetBSD: uart.c,v 1.2 2007/03/23 20:05:47 dogcow Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * 3. The names of the authors may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A - * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - */ - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include - -#include -#include - -static cn_probe_t uart_cnprobe; -static cn_init_t uart_cninit; -static cn_term_t uart_cnterm; -static cn_getc_t uart_cngetc; -static cn_putc_t uart_cnputc; -static cn_grab_t uart_cngrab; -static cn_ungrab_t uart_cnungrab; - -static void -uart_cnprobe(struct consdev *cp) -{ - - sprintf(cp->cn_name, "uart"); - cp->cn_pri = CN_NORMAL; -} - -static void -uart_cninit(struct consdev *cp) -{ - -} - - -void -uart_cnputc(struct consdev *cp, int c) -{ - char chr; - - chr = c; - while ((*((volatile unsigned long *)0xb2600018)) & 0x20) ; - (*((volatile unsigned long *)0xb2600000)) = c; - while ((*((volatile unsigned long *)0xb2600018)) & 0x20) ; -} - -int -uart_cngetc(struct consdev * cp) -{ - - while ((*((volatile unsigned long *)0xb2600018)) & 0x10) ; - return (*((volatile unsigned long *)0xb2600000)) & 0xff; -} - -static void -uart_cnterm(struct consdev * cp) -{ - -} - -static void -uart_cngrab(struct consdev *cp) -{ - -} - -static void -uart_cnungrab(struct consdev *cp) -{ - -} - -CONSOLE_DRIVER(uart); diff --git a/sys/mips/adm5120/files.adm5120 b/sys/mips/adm5120/files.adm5120 deleted file mode 100644 index c8b60ce88b5f..000000000000 --- a/sys/mips/adm5120/files.adm5120 +++ /dev/null @@ -1,13 +0,0 @@ -# $FreeBSD$ - -# ADM5120 on-board devices -# mips/adm5120/console.c standard -mips/adm5120/adm5120_machdep.c standard -mips/adm5120/admpci.c optional admpci -mips/adm5120/if_admsw.c optional admsw -mips/adm5120/obio.c standard -mips/adm5120/uart_bus_adm5120.c optional uart -mips/adm5120/uart_cpu_adm5120.c optional uart -mips/adm5120/uart_dev_adm5120.c optional uart -mips/mips/intr_machdep.c standard -mips/mips/tick.c standard diff --git a/sys/mips/adm5120/if_admsw.c b/sys/mips/adm5120/if_admsw.c deleted file mode 100644 index 545b9e5d5550..000000000000 --- a/sys/mips/adm5120/if_admsw.c +++ /dev/null @@ -1,1354 +0,0 @@ -/* $NetBSD: if_admsw.c,v 1.3 2007/04/22 19:26:25 dyoung Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * 3. The names of the authors may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A - * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - */ -/* - * Copyright (c) 2001 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Jason R. Thorpe for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Device driver for Alchemy Semiconductor Au1x00 Ethernet Media - * Access Controller. - * - * TODO: - * - * Better Rx buffer management; we want to get new Rx buffers - * to the chip more quickly than we currently do. - */ - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef INET -#include -#include -#include -#include -#endif - -#include -#include - -#include -#include -#include - -/* TODO: add locking */ -#define ADMSW_LOCK(sc) do {} while(0); -#define ADMSW_UNLOCK(sc) do {} while(0); - -static uint8_t vlan_matrix[SW_DEVS] = { - (1 << 6) | (1 << 0), /* CPU + port0 */ - (1 << 6) | (1 << 1), /* CPU + port1 */ - (1 << 6) | (1 << 2), /* CPU + port2 */ - (1 << 6) | (1 << 3), /* CPU + port3 */ - (1 << 6) | (1 << 4), /* CPU + port4 */ - (1 << 6) | (1 << 5), /* CPU + port5 */ -}; - -/* ifnet entry points */ -static void admsw_start(struct ifnet *); -static void admsw_watchdog(void *); -static int admsw_ioctl(struct ifnet *, u_long, caddr_t); -static void admsw_init(void *); -static void admsw_stop(struct ifnet *, int); - -static void admsw_reset(struct admsw_softc *); -static void admsw_set_filter(struct admsw_softc *); - -static void admsw_txintr(struct admsw_softc *, int); -static void admsw_rxintr(struct admsw_softc *, int); -static int admsw_add_rxbuf(struct admsw_softc *, int, int); -#define admsw_add_rxhbuf(sc, idx) admsw_add_rxbuf(sc, idx, 1) -#define admsw_add_rxlbuf(sc, idx) admsw_add_rxbuf(sc, idx, 0) - -static int admsw_mediachange(struct ifnet *); -static void admsw_mediastatus(struct ifnet *, struct ifmediareq *); - -static int admsw_intr(void *); - -/* bus entry points */ -static int admsw_probe(device_t dev); -static int admsw_attach(device_t dev); -static int admsw_detach(device_t dev); -static int admsw_shutdown(device_t dev); - -static void -admsw_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) -{ - uint32_t *addr; - - if (error) - return; - - KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); - addr = arg; - *addr = segs->ds_addr; -} - -static void -admsw_rxbuf_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) -{ - struct admsw_descsoft *ds; - - if (error) - return; - - KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); - - ds = arg; - ds->ds_nsegs = nseg; - ds->ds_addr[0] = segs[0].ds_addr; - ds->ds_len[0] = segs[0].ds_len; - -} - -static void -admsw_mbuf_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, - bus_size_t mapsize, int error) -{ - struct admsw_descsoft *ds; - - if (error) - return; - - ds = arg; - - if((nseg != 1) && (nseg != 2)) - panic("%s: nseg == %d\n", __func__, nseg); - - ds->ds_nsegs = nseg; - ds->ds_addr[0] = segs[0].ds_addr; - ds->ds_len[0] = segs[0].ds_len; - - if(nseg > 1) { - ds->ds_addr[1] = segs[1].ds_addr; - ds->ds_len[1] = segs[1].ds_len; - } -} - - - -static int -admsw_probe(device_t dev) -{ - - device_set_desc(dev, "ADM5120 Switch Engine"); - return (0); -} - -#define REG_READ(o) bus_read_4((sc)->mem_res, (o)) -#define REG_WRITE(o,v) bus_write_4((sc)->mem_res, (o),(v)) - -static void -admsw_init_bufs(struct admsw_softc *sc) -{ - int i; - struct admsw_desc *desc; - - for (i = 0; i < ADMSW_NTXHDESC; i++) { - if (sc->sc_txhsoft[i].ds_mbuf != NULL) { - m_freem(sc->sc_txhsoft[i].ds_mbuf); - sc->sc_txhsoft[i].ds_mbuf = NULL; - } - desc = &sc->sc_txhdescs[i]; - desc->data = 0; - desc->cntl = 0; - desc->len = MAC_BUFLEN; - desc->status = 0; - ADMSW_CDTXHSYNC(sc, i, - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); - } - sc->sc_txhdescs[ADMSW_NTXHDESC - 1].data |= ADM5120_DMA_RINGEND; - ADMSW_CDTXHSYNC(sc, ADMSW_NTXHDESC - 1, - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); - - for (i = 0; i < ADMSW_NRXHDESC; i++) { - if (sc->sc_rxhsoft[i].ds_mbuf == NULL) { - if (admsw_add_rxhbuf(sc, i) != 0) - panic("admsw_init_bufs\n"); - } else - ADMSW_INIT_RXHDESC(sc, i); - } - - for (i = 0; i < ADMSW_NTXLDESC; i++) { - if (sc->sc_txlsoft[i].ds_mbuf != NULL) { - m_freem(sc->sc_txlsoft[i].ds_mbuf); - sc->sc_txlsoft[i].ds_mbuf = NULL; - } - desc = &sc->sc_txldescs[i]; - desc->data = 0; - desc->cntl = 0; - desc->len = MAC_BUFLEN; - desc->status = 0; - ADMSW_CDTXLSYNC(sc, i, - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); - } - sc->sc_txldescs[ADMSW_NTXLDESC - 1].data |= ADM5120_DMA_RINGEND; - ADMSW_CDTXLSYNC(sc, ADMSW_NTXLDESC - 1, - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); - - for (i = 0; i < ADMSW_NRXLDESC; i++) { - if (sc->sc_rxlsoft[i].ds_mbuf == NULL) { - if (admsw_add_rxlbuf(sc, i) != 0) - panic("admsw_init_bufs\n"); - } else - ADMSW_INIT_RXLDESC(sc, i); - } - - REG_WRITE(SEND_HBADDR_REG, ADMSW_CDTXHADDR(sc, 0)); - REG_WRITE(SEND_LBADDR_REG, ADMSW_CDTXLADDR(sc, 0)); - REG_WRITE(RECV_HBADDR_REG, ADMSW_CDRXHADDR(sc, 0)); - REG_WRITE(RECV_LBADDR_REG, ADMSW_CDRXLADDR(sc, 0)); - - sc->sc_txfree = ADMSW_NTXLDESC; - sc->sc_txnext = 0; - sc->sc_txdirty = 0; - sc->sc_rxptr = 0; -} - -static void -admsw_setvlan(struct admsw_softc *sc, char matrix[6]) -{ - uint32_t i; - - i = matrix[0] + (matrix[1] << 8) + (matrix[2] << 16) + (matrix[3] << 24); - REG_WRITE(VLAN_G1_REG, i); - i = matrix[4] + (matrix[5] << 8); - REG_WRITE(VLAN_G2_REG, i); -} - -static void -admsw_reset(struct admsw_softc *sc) -{ - uint32_t wdog1; - int i; - - REG_WRITE(PORT_CONF0_REG, - REG_READ(PORT_CONF0_REG) | PORT_CONF0_DP_MASK); - REG_WRITE(CPUP_CONF_REG, - REG_READ(CPUP_CONF_REG) | CPUP_CONF_DCPUP); - - /* Wait for DMA to complete. Overkill. In 3ms, we can - * send at least two entire 1500-byte packets at 10 Mb/s. - */ - DELAY(3000); - - /* The datasheet recommends that we move all PHYs to reset - * state prior to software reset. - */ - REG_WRITE(PHY_CNTL2_REG, - REG_READ(PHY_CNTL2_REG) & ~PHY_CNTL2_PHYR_MASK); - - /* Reset the switch. */ - REG_WRITE(ADMSW_SW_RES, 0x1); - - DELAY(100 * 1000); - - REG_WRITE(ADMSW_BOOT_DONE, ADMSW_BOOT_DONE_BO); - - /* begin old code */ - REG_WRITE(CPUP_CONF_REG, - CPUP_CONF_DCPUP | CPUP_CONF_CRCP | CPUP_CONF_DUNP_MASK | - CPUP_CONF_DMCP_MASK); - - REG_WRITE(PORT_CONF0_REG, PORT_CONF0_EMCP_MASK | PORT_CONF0_EMBP_MASK); - - REG_WRITE(PHY_CNTL2_REG, - REG_READ(PHY_CNTL2_REG) | PHY_CNTL2_ANE_MASK | PHY_CNTL2_PHYR_MASK | - PHY_CNTL2_AMDIX_MASK); - - REG_WRITE(PHY_CNTL3_REG, REG_READ(PHY_CNTL3_REG) | PHY_CNTL3_RNT); - - REG_WRITE(ADMSW_INT_MASK, INT_MASK); - REG_WRITE(ADMSW_INT_ST, INT_MASK); - - /* - * While in DDB, we stop servicing interrupts, RX ring - * fills up and when free block counter falls behind FC - * threshold, the switch starts to emit 802.3x PAUSE - * frames. This can upset peer switches. - * - * Stop this from happening by disabling FC and D2 - * thresholds. - */ - REG_WRITE(FC_TH_REG, - REG_READ(FC_TH_REG) & ~(FC_TH_FCS_MASK | FC_TH_D2S_MASK)); - - admsw_setvlan(sc, vlan_matrix); - - for (i = 0; i < SW_DEVS; i++) { - REG_WRITE(MAC_WT1_REG, - sc->sc_enaddr[2] | - (sc->sc_enaddr[3]<<8) | - (sc->sc_enaddr[4]<<16) | - ((sc->sc_enaddr[5]+i)<<24)); - REG_WRITE(MAC_WT0_REG, (i<sc_enaddr[0]<<16) | (sc->sc_enaddr[1]<<24) | - MAC_WT0_WRITE | MAC_WT0_VLANID_EN); - - while (!(REG_READ(MAC_WT0_REG) & MAC_WT0_WRITE_DONE)); - } - - wdog1 = REG_READ(ADM5120_WDOG1); - REG_WRITE(ADM5120_WDOG1, wdog1 & ~ADM5120_WDOG1_WDE); -} - -static int -admsw_attach(device_t dev) -{ - uint8_t enaddr[ETHER_ADDR_LEN]; - struct admsw_softc *sc = (struct admsw_softc *) device_get_softc(dev); - struct ifnet *ifp; - int error, i, rid; - - sc->sc_dev = dev; - device_printf(dev, "ADM5120 Switch Engine, %d ports\n", SW_DEVS); - sc->ndevs = 0; - - /* XXXMIPS: fix it */ - enaddr[0] = 0x00; - enaddr[1] = 0x0C; - enaddr[2] = 0x42; - enaddr[3] = 0x07; - enaddr[4] = 0xB2; - enaddr[5] = 0x4E; - - memcpy(sc->sc_enaddr, enaddr, sizeof(sc->sc_enaddr)); - - device_printf(sc->sc_dev, "base Ethernet address %s\n", - ether_sprintf(enaddr)); - callout_init(&sc->sc_watchdog, 1); - - rid = 0; - if ((sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE)) == NULL) { - device_printf(dev, "unable to allocate memory resource\n"); - return (ENXIO); - } - - /* Hook up the interrupt handler. */ - rid = 0; - if ((sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE)) == NULL) { - device_printf(dev, "unable to allocate IRQ resource\n"); - return (ENXIO); - } - - if ((error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET, - admsw_intr, NULL, sc, &sc->sc_ih)) != 0) { - device_printf(dev, - "WARNING: unable to register interrupt handler\n"); - return (error); - } - - /* - * Allocate the control data structures, and create and load the - * DMA map for it. - */ - if ((error = bus_dma_tag_create(NULL, 4, 0, - BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, - NULL, NULL, sizeof(struct admsw_control_data), 1, - sizeof(struct admsw_control_data), 0, NULL, NULL, - &sc->sc_control_dmat)) != 0) { - device_printf(sc->sc_dev, - "unable to create control data DMA map, error = %d\n", - error); - return (error); - } - - if ((error = bus_dmamem_alloc(sc->sc_control_dmat, - (void **)&sc->sc_control_data, BUS_DMA_NOWAIT, - &sc->sc_cddmamap)) != 0) { - device_printf(sc->sc_dev, - "unable to allocate control data, error = %d\n", error); - return (error); - } - - if ((error = bus_dmamap_load(sc->sc_control_dmat, sc->sc_cddmamap, - sc->sc_control_data, sizeof(struct admsw_control_data), - admsw_dma_map_addr, &sc->sc_cddma, 0)) != 0) { - device_printf(sc->sc_dev, - "unable to load control data DMA map, error = %d\n", error); - return (error); - } - - /* - * Create the transmit buffer DMA maps. - */ - if ((error = bus_dma_tag_create(NULL, 1, 0, - BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, - NULL, NULL, MCLBYTES, 1, MCLBYTES, 0, NULL, NULL, - &sc->sc_bufs_dmat)) != 0) { - device_printf(sc->sc_dev, - "unable to create control data DMA map, error = %d\n", - error); - return (error); - } - - for (i = 0; i < ADMSW_NTXHDESC; i++) { - if ((error = bus_dmamap_create(sc->sc_bufs_dmat, 0, - &sc->sc_txhsoft[i].ds_dmamap)) != 0) { - device_printf(sc->sc_dev, - "unable to create txh DMA map %d, error = %d\n", - i, error); - return (error); - } - sc->sc_txhsoft[i].ds_mbuf = NULL; - } - - for (i = 0; i < ADMSW_NTXLDESC; i++) { - if ((error = bus_dmamap_create(sc->sc_bufs_dmat, 0, - &sc->sc_txlsoft[i].ds_dmamap)) != 0) { - device_printf(sc->sc_dev, - "unable to create txl DMA map %d, error = %d\n", - i, error); - return (error); - } - sc->sc_txlsoft[i].ds_mbuf = NULL; - } - - /* - * Create the receive buffer DMA maps. - */ - for (i = 0; i < ADMSW_NRXHDESC; i++) { - if ((error = bus_dmamap_create(sc->sc_bufs_dmat, 0, - &sc->sc_rxhsoft[i].ds_dmamap)) != 0) { - device_printf(sc->sc_dev, - "unable to create rxh DMA map %d, error = %d\n", - i, error); - return (error); - } - sc->sc_rxhsoft[i].ds_mbuf = NULL; - } - - for (i = 0; i < ADMSW_NRXLDESC; i++) { - if ((error = bus_dmamap_create(sc->sc_bufs_dmat, 0, - &sc->sc_rxlsoft[i].ds_dmamap)) != 0) { - device_printf(sc->sc_dev, - "unable to create rxl DMA map %d, error = %d\n", - i, error); - return (error); - } - sc->sc_rxlsoft[i].ds_mbuf = NULL; - } - - admsw_init_bufs(sc); - admsw_reset(sc); - - for (i = 0; i < SW_DEVS; i++) { - ifmedia_init(&sc->sc_ifmedia[i], 0, admsw_mediachange, - admsw_mediastatus); - ifmedia_add(&sc->sc_ifmedia[i], IFM_ETHER|IFM_10_T, 0, NULL); - ifmedia_add(&sc->sc_ifmedia[i], - IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); - ifmedia_add(&sc->sc_ifmedia[i], IFM_ETHER|IFM_100_TX, 0, NULL); - ifmedia_add(&sc->sc_ifmedia[i], - IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL); - ifmedia_add(&sc->sc_ifmedia[i], IFM_ETHER|IFM_AUTO, 0, NULL); - ifmedia_set(&sc->sc_ifmedia[i], IFM_ETHER|IFM_AUTO); - - ifp = sc->sc_ifnet[i] = if_alloc(IFT_ETHER); - - /* Setup interface parameters */ - ifp->if_softc = sc; - if_initname(ifp, device_get_name(dev), i); - ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; - ifp->if_ioctl = admsw_ioctl; - ifp->if_output = ether_output; - ifp->if_start = admsw_start; - ifp->if_init = admsw_init; - ifp->if_mtu = ETHERMTU; - ifp->if_baudrate = IF_Mbps(100); - IFQ_SET_MAXLEN(&ifp->if_snd, max(ADMSW_NTXLDESC, ifqmaxlen)); - ifp->if_snd.ifq_drv_maxlen = max(ADMSW_NTXLDESC, ifqmaxlen); - IFQ_SET_READY(&ifp->if_snd); - ifp->if_capabilities |= IFCAP_VLAN_MTU; - - /* Attach the interface. */ - ether_ifattach(ifp, enaddr); - enaddr[5]++; - } - - /* XXX: admwdog_attach(sc); */ - - /* leave interrupts and cpu port disabled */ - return (0); -} - -static int -admsw_detach(device_t dev) -{ - - printf("TODO: DETACH\n"); - return (0); -} - -/* - * admsw_shutdown: - * - * Make sure the interface is stopped at reboot time. - */ -static int -admsw_shutdown(device_t dev) -{ - struct admsw_softc *sc; - int i; - - sc = device_get_softc(dev); - for (i = 0; i < SW_DEVS; i++) - admsw_stop(sc->sc_ifnet[i], 1); - - return (0); -} - -/* - * admsw_start: [ifnet interface function] - * - * Start packet transmission on the interface. - */ -static void -admsw_start(struct ifnet *ifp) -{ - struct admsw_softc *sc = ifp->if_softc; - struct mbuf *m0, *m; - struct admsw_descsoft *ds; - struct admsw_desc *desc; - bus_dmamap_t dmamap; - struct ether_header *eh; - int error, nexttx, len, i; - static int vlan = 0; - - /* - * Loop through the send queues, setting up transmit descriptors - * unitl we drain the queues, or use up all available transmit - * descriptors. - */ - for (;;) { - vlan++; - if (vlan == SW_DEVS) - vlan = 0; - i = vlan; - for (;;) { - ifp = sc->sc_ifnet[i]; - if ((ifp->if_drv_flags & (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)) - == IFF_DRV_RUNNING) { - /* Grab a packet off the queue. */ - IF_DEQUEUE(&ifp->if_snd, m0); - if (m0 != NULL) - break; - } - i++; - if (i == SW_DEVS) - i = 0; - if (i == vlan) - return; - } - vlan = i; - m = NULL; - - /* Get a spare descriptor. */ - if (sc->sc_txfree == 0) { - /* No more slots left; notify upper layer. */ - ifp->if_drv_flags |= IFF_DRV_OACTIVE; - break; - } - nexttx = sc->sc_txnext; - desc = &sc->sc_txldescs[nexttx]; - ds = &sc->sc_txlsoft[nexttx]; - dmamap = ds->ds_dmamap; - - /* - * Load the DMA map. If this fails, the packet either - * didn't fit in the alloted number of segments, or we - * were short on resources. In this case, we'll copy - * and try again. - */ - if (m0->m_pkthdr.len < ETHER_MIN_LEN || - bus_dmamap_load_mbuf(sc->sc_bufs_dmat, dmamap, m0, - admsw_mbuf_map_addr, ds, BUS_DMA_NOWAIT) != 0) { - MGETHDR(m, M_NOWAIT, MT_DATA); - if (m == NULL) { - device_printf(sc->sc_dev, - "unable to allocate Tx mbuf\n"); - break; - } - if (m0->m_pkthdr.len > MHLEN) { - if (!(MCLGET(m, M_NOWAIT))) { - device_printf(sc->sc_dev, - "unable to allocate Tx cluster\n"); - m_freem(m); - break; - } - } - m->m_pkthdr.csum_flags = m0->m_pkthdr.csum_flags; - m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, void *)); - m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; - if (m->m_pkthdr.len < ETHER_MIN_LEN) { - if (M_TRAILINGSPACE(m) < ETHER_MIN_LEN - m->m_pkthdr.len) - panic("admsw_start: M_TRAILINGSPACE\n"); - memset(mtod(m, uint8_t *) + m->m_pkthdr.len, 0, - ETHER_MIN_LEN - ETHER_CRC_LEN - m->m_pkthdr.len); - m->m_pkthdr.len = m->m_len = ETHER_MIN_LEN; - } - error = bus_dmamap_load_mbuf(sc->sc_bufs_dmat, - dmamap, m, admsw_mbuf_map_addr, ds, BUS_DMA_NOWAIT); - if (error) { - device_printf(sc->sc_dev, - "unable to load Tx buffer, error = %d\n", - error); - break; - } - } - - if (m != NULL) { - m_freem(m0); - m0 = m; - } - - /* - * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. - */ - - /* Sync the DMA map. */ - bus_dmamap_sync(sc->sc_bufs_dmat, dmamap, BUS_DMASYNC_PREWRITE); - - if (ds->ds_nsegs != 1 && ds->ds_nsegs != 2) - panic("admsw_start: nsegs == %d\n", ds->ds_nsegs); - desc->data = ds->ds_addr[0]; - desc->len = len = ds->ds_len[0]; - if (ds->ds_nsegs > 1) { - len += ds->ds_len[1]; - desc->cntl = ds->ds_addr[1] | ADM5120_DMA_BUF2ENABLE; - } else - desc->cntl = 0; - desc->status = (len << ADM5120_DMA_LENSHIFT) | (1 << vlan); - eh = mtod(m0, struct ether_header *); - if (ntohs(eh->ether_type) == ETHERTYPE_IP && - m0->m_pkthdr.csum_flags & CSUM_IP) - desc->status |= ADM5120_DMA_CSUM; - if (nexttx == ADMSW_NTXLDESC - 1) - desc->data |= ADM5120_DMA_RINGEND; - desc->data |= ADM5120_DMA_OWN; - - /* Sync the descriptor. */ - ADMSW_CDTXLSYNC(sc, nexttx, - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); - - REG_WRITE(SEND_TRIG_REG, 1); - /* printf("send slot %d\n",nexttx); */ - - /* - * Store a pointer to the packet so we can free it later. - */ - ds->ds_mbuf = m0; - - /* Advance the Tx pointer. */ - sc->sc_txfree--; - sc->sc_txnext = ADMSW_NEXTTXL(nexttx); - - /* Pass the packet to any BPF listeners. */ - BPF_MTAP(ifp, m0); - - /* Set a watchdog timer in case the chip flakes out. */ - sc->sc_timer = 5; - } -} - -/* - * admsw_watchdog: [ifnet interface function] - * - * Watchdog timer handler. - */ -static void -admsw_watchdog(void *arg) -{ - struct admsw_softc *sc = arg; - struct ifnet *ifp; - int vlan; - - callout_reset(&sc->sc_watchdog, hz, admsw_watchdog, sc); - if (sc->sc_timer == 0 || --sc->sc_timer > 0) - return; - - /* Check if an interrupt was lost. */ - if (sc->sc_txfree == ADMSW_NTXLDESC) { - device_printf(sc->sc_dev, "watchdog false alarm\n"); - return; - } - if (sc->sc_timer != 0) - device_printf(sc->sc_dev, "watchdog timer is %d!\n", - sc->sc_timer); - admsw_txintr(sc, 0); - if (sc->sc_txfree == ADMSW_NTXLDESC) { - device_printf(sc->sc_dev, "tx IRQ lost (queue empty)\n"); - return; - } - if (sc->sc_timer != 0) { - device_printf(sc->sc_dev, "tx IRQ lost (timer recharged)\n"); - return; - } - - device_printf(sc->sc_dev, "device timeout, txfree = %d\n", - sc->sc_txfree); - for (vlan = 0; vlan < SW_DEVS; vlan++) - admsw_stop(sc->sc_ifnet[vlan], 0); - admsw_init(sc); - - ifp = sc->sc_ifnet[0]; - - /* Try to get more packets going. */ - admsw_start(ifp); -} - -/* - * admsw_ioctl: [ifnet interface function] - * - * Handle control requests from the operator. - */ -static int -admsw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) -{ - struct admsw_softc *sc = ifp->if_softc; - struct ifdrv *ifd; - int error, port; - - ADMSW_LOCK(sc); - - switch (cmd) { - case SIOCSIFMEDIA: - case SIOCGIFMEDIA: - port = 0; - while(port < SW_DEVS) - if(ifp == sc->sc_ifnet[port]) - break; - else - port++; - if (port >= SW_DEVS) - error = EOPNOTSUPP; - else - error = ifmedia_ioctl(ifp, (struct ifreq *)data, - &sc->sc_ifmedia[port], cmd); - break; - - case SIOCGDRVSPEC: - case SIOCSDRVSPEC: - ifd = (struct ifdrv *) data; - if (ifd->ifd_cmd != 0 || ifd->ifd_len != sizeof(vlan_matrix)) { - error = EINVAL; - break; - } - if (cmd == SIOCGDRVSPEC) { - error = copyout(vlan_matrix, ifd->ifd_data, - sizeof(vlan_matrix)); - } else { - error = copyin(ifd->ifd_data, vlan_matrix, - sizeof(vlan_matrix)); - admsw_setvlan(sc, vlan_matrix); - } - break; - - default: - error = ether_ioctl(ifp, cmd, data); - if (error == ENETRESET) { - /* - * Multicast list has changed; set the hardware filter - * accordingly. - */ - admsw_set_filter(sc); - error = 0; - } - break; - } - - /* Try to get more packets going. */ - admsw_start(ifp); - - ADMSW_UNLOCK(sc); - return (error); -} - - -/* - * admsw_intr: - * - * Interrupt service routine. - */ -static int -admsw_intr(void *arg) -{ - struct admsw_softc *sc = arg; - uint32_t pending; - - pending = REG_READ(ADMSW_INT_ST); - REG_WRITE(ADMSW_INT_ST, pending); - - if (sc->ndevs == 0) - return (FILTER_STRAY); - - if ((pending & ADMSW_INTR_RHD) != 0) - admsw_rxintr(sc, 1); - - if ((pending & ADMSW_INTR_RLD) != 0) - admsw_rxintr(sc, 0); - - if ((pending & ADMSW_INTR_SHD) != 0) - admsw_txintr(sc, 1); - - if ((pending & ADMSW_INTR_SLD) != 0) - admsw_txintr(sc, 0); - - return (FILTER_HANDLED); -} - -/* - * admsw_txintr: - * - * Helper; handle transmit interrupts. - */ -static void -admsw_txintr(struct admsw_softc *sc, int prio) -{ - struct ifnet *ifp; - struct admsw_desc *desc; - struct admsw_descsoft *ds; - int i, vlan; - int gotone = 0; - - /* printf("txintr: txdirty: %d, txfree: %d\n",sc->sc_txdirty, sc->sc_txfree); */ - for (i = sc->sc_txdirty; sc->sc_txfree != ADMSW_NTXLDESC; - i = ADMSW_NEXTTXL(i)) { - - ADMSW_CDTXLSYNC(sc, i, - BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); - - desc = &sc->sc_txldescs[i]; - ds = &sc->sc_txlsoft[i]; - if (desc->data & ADM5120_DMA_OWN) { - ADMSW_CDTXLSYNC(sc, i, - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); - break; - } - - bus_dmamap_sync(sc->sc_bufs_dmat, ds->ds_dmamap, - BUS_DMASYNC_POSTWRITE); - bus_dmamap_unload(sc->sc_bufs_dmat, ds->ds_dmamap); - m_freem(ds->ds_mbuf); - ds->ds_mbuf = NULL; - - vlan = ffs(desc->status & 0x3f) - 1; - if (vlan < 0 || vlan >= SW_DEVS) - panic("admsw_txintr: bad vlan\n"); - ifp = sc->sc_ifnet[vlan]; - gotone = 1; - /* printf("clear tx slot %d\n",i); */ - - if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); - - sc->sc_txfree++; - } - - if (gotone) { - sc->sc_txdirty = i; - for (vlan = 0; vlan < SW_DEVS; vlan++) - sc->sc_ifnet[vlan]->if_drv_flags &= ~IFF_DRV_OACTIVE; - - ifp = sc->sc_ifnet[0]; - - /* Try to queue more packets. */ - admsw_start(ifp); - - /* - * If there are no more pending transmissions, - * cancel the watchdog timer. - */ - if (sc->sc_txfree == ADMSW_NTXLDESC) - sc->sc_timer = 0; - - } - - /* printf("txintr end: txdirty: %d, txfree: %d\n",sc->sc_txdirty, sc->sc_txfree); */ -} - -/* - * admsw_rxintr: - * - * Helper; handle receive interrupts. - */ -static void -admsw_rxintr(struct admsw_softc *sc, int high) -{ - struct ifnet *ifp; - struct admsw_descsoft *ds; - struct mbuf *m; - uint32_t stat; - int i, len, port, vlan; - - /* printf("rxintr\n"); */ - - if (high) - panic("admsw_rxintr: high priority packet\n"); - -#if 1 - ADMSW_CDRXLSYNC(sc, sc->sc_rxptr, - BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); - if ((sc->sc_rxldescs[sc->sc_rxptr].data & ADM5120_DMA_OWN) == 0) - ADMSW_CDRXLSYNC(sc, sc->sc_rxptr, - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); - else { - i = sc->sc_rxptr; - do { - ADMSW_CDRXLSYNC(sc, i, - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); - i = ADMSW_NEXTRXL(i); - /* the ring is empty, just return. */ - if (i == sc->sc_rxptr) - return; - ADMSW_CDRXLSYNC(sc, i, - BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); - } while (sc->sc_rxldescs[i].data & ADM5120_DMA_OWN); - - ADMSW_CDRXLSYNC(sc, i, - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); - - ADMSW_CDRXLSYNC(sc, sc->sc_rxptr, - BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); - - if ((sc->sc_rxldescs[sc->sc_rxptr].data & ADM5120_DMA_OWN) == 0) - ADMSW_CDRXLSYNC(sc, sc->sc_rxptr, - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); - else { - ADMSW_CDRXLSYNC(sc, sc->sc_rxptr, - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); - /* We've fallen behind the chip: catch it. */ -#if 0 - device_printf(sc->sc_dev, - "RX ring resync, base=%x, work=%x, %d -> %d\n", - REG_READ(RECV_LBADDR_REG), - REG_READ(RECV_LWADDR_REG), sc->sc_rxptr, i); -#endif - sc->sc_rxptr = i; - /* ADMSW_EVCNT_INCR(&sc->sc_ev_rxsync); */ - } - } -#endif - for (i = sc->sc_rxptr;; i = ADMSW_NEXTRXL(i)) { - ds = &sc->sc_rxlsoft[i]; - - ADMSW_CDRXLSYNC(sc, i, - BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); - - if (sc->sc_rxldescs[i].data & ADM5120_DMA_OWN) { - ADMSW_CDRXLSYNC(sc, i, - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); - break; - } - - /* printf("process slot %d\n",i); */ - - bus_dmamap_sync(sc->sc_bufs_dmat, ds->ds_dmamap, - BUS_DMASYNC_POSTREAD); - - stat = sc->sc_rxldescs[i].status; - len = (stat & ADM5120_DMA_LEN) >> ADM5120_DMA_LENSHIFT; - len -= ETHER_CRC_LEN; - port = (stat & ADM5120_DMA_PORTID) >> ADM5120_DMA_PORTSHIFT; - - for (vlan = 0; vlan < SW_DEVS; vlan++) - if ((1 << port) & vlan_matrix[vlan]) - break; - - if (vlan == SW_DEVS) - vlan = 0; - - ifp = sc->sc_ifnet[vlan]; - - m = ds->ds_mbuf; - if (admsw_add_rxlbuf(sc, i) != 0) { - if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); - ADMSW_INIT_RXLDESC(sc, i); - bus_dmamap_sync(sc->sc_bufs_dmat, ds->ds_dmamap, - BUS_DMASYNC_PREREAD); - continue; - } - - m->m_pkthdr.rcvif = ifp; - m->m_pkthdr.len = m->m_len = len; - if ((stat & ADM5120_DMA_TYPE) == ADM5120_DMA_TYPE_IP) { - m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED; - if (!(stat & ADM5120_DMA_CSUMFAIL)) - m->m_pkthdr.csum_flags |= CSUM_IP_VALID; - } - - BPF_MTAP(ifp, m); - - /* Pass it on. */ - (*ifp->if_input)(ifp, m); - if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1); - } - - /* Update the receive pointer. */ - sc->sc_rxptr = i; -} - -/* - * admsw_init: [ifnet interface function] - * - * Initialize the interface. - */ -static void -admsw_init(void *xsc) -{ - struct admsw_softc *sc = xsc; - struct ifnet *ifp; - int i; - - for (i = 0; i < SW_DEVS; i++) { - ifp = sc->sc_ifnet[i]; - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { - if (sc->ndevs == 0) { - admsw_init_bufs(sc); - admsw_reset(sc); - REG_WRITE(CPUP_CONF_REG, - CPUP_CONF_CRCP | CPUP_CONF_DUNP_MASK | - CPUP_CONF_DMCP_MASK); - /* clear all pending interrupts */ - REG_WRITE(ADMSW_INT_ST, INT_MASK); - - /* enable needed interrupts */ - REG_WRITE(ADMSW_INT_MASK, - REG_READ(ADMSW_INT_MASK) & - ~(ADMSW_INTR_SHD | ADMSW_INTR_SLD | - ADMSW_INTR_RHD | ADMSW_INTR_RLD | - ADMSW_INTR_HDF | ADMSW_INTR_LDF)); - - callout_reset(&sc->sc_watchdog, hz, - admsw_watchdog, sc); - } - sc->ndevs++; - } - - - /* mark iface as running */ - ifp->if_drv_flags |= IFF_DRV_RUNNING; - ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; - } - - /* Set the receive filter. */ - admsw_set_filter(sc); -} - -/* - * admsw_stop: [ifnet interface function] - * - * Stop transmission on the interface. - */ -static void -admsw_stop(struct ifnet *ifp, int disable) -{ - struct admsw_softc *sc = ifp->if_softc; - - if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) - return; - - if (--sc->ndevs == 0) { - /* printf("debug: de-initializing hardware\n"); */ - - /* disable cpu port */ - REG_WRITE(CPUP_CONF_REG, - CPUP_CONF_DCPUP | CPUP_CONF_CRCP | - CPUP_CONF_DUNP_MASK | CPUP_CONF_DMCP_MASK); - - /* XXX We should disable, then clear? --dyoung */ - /* clear all pending interrupts */ - REG_WRITE(ADMSW_INT_ST, INT_MASK); - - /* disable interrupts */ - REG_WRITE(ADMSW_INT_MASK, INT_MASK); - - /* Cancel the watchdog timer. */ - sc->sc_timer = 0; - callout_stop(&sc->sc_watchdog); - } - - /* Mark the interface as down. */ - ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); - - return; -} - -/* - * admsw_set_filter: - * - * Set up the receive filter. - */ -static void -admsw_set_filter(struct admsw_softc *sc) -{ - int i; - uint32_t allmc, anymc, conf, promisc; - struct ifnet *ifp; - struct ifmultiaddr *ifma; - - /* Find which ports should be operated in promisc mode. */ - allmc = anymc = promisc = 0; - for (i = 0; i < SW_DEVS; i++) { - ifp = sc->sc_ifnet[i]; - if (ifp->if_flags & IFF_PROMISC) - promisc |= vlan_matrix[i]; - - ifp->if_flags &= ~IFF_ALLMULTI; - - if_maddr_rlock(ifp); - TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) - { - if (ifma->ifma_addr->sa_family != AF_LINK) - continue; - - anymc |= vlan_matrix[i]; - } - if_maddr_runlock(ifp); - } - - conf = REG_READ(CPUP_CONF_REG); - /* 1 Disable forwarding of unknown & multicast packets to - * CPU on all ports. - * 2 Enable forwarding of unknown & multicast packets to - * CPU on ports where IFF_PROMISC or IFF_ALLMULTI is set. - */ - conf |= CPUP_CONF_DUNP_MASK | CPUP_CONF_DMCP_MASK; - /* Enable forwarding of unknown packets to CPU on selected ports. */ - conf ^= ((promisc << CPUP_CONF_DUNP_SHIFT) & CPUP_CONF_DUNP_MASK); - conf ^= ((allmc << CPUP_CONF_DMCP_SHIFT) & CPUP_CONF_DMCP_MASK); - conf ^= ((anymc << CPUP_CONF_DMCP_SHIFT) & CPUP_CONF_DMCP_MASK); - REG_WRITE(CPUP_CONF_REG, conf); -} - -/* - * admsw_add_rxbuf: - * - * Add a receive buffer to the indicated descriptor. - */ -int -admsw_add_rxbuf(struct admsw_softc *sc, int idx, int high) -{ - struct admsw_descsoft *ds; - struct mbuf *m; - int error; - - if (high) - ds = &sc->sc_rxhsoft[idx]; - else - ds = &sc->sc_rxlsoft[idx]; - - MGETHDR(m, M_NOWAIT, MT_DATA); - if (m == NULL) - return (ENOBUFS); - - if (!(MCLGET(m, M_NOWAIT))) { - m_freem(m); - return (ENOBUFS); - } - - if (ds->ds_mbuf != NULL) - bus_dmamap_unload(sc->sc_bufs_dmat, ds->ds_dmamap); - - ds->ds_mbuf = m; - - error = bus_dmamap_load(sc->sc_bufs_dmat, ds->ds_dmamap, - m->m_ext.ext_buf, m->m_ext.ext_size, admsw_rxbuf_map_addr, - ds, BUS_DMA_NOWAIT); - if (error) { - device_printf(sc->sc_dev, - "can't load rx DMA map %d, error = %d\n", idx, error); - panic("admsw_add_rxbuf"); /* XXX */ - } - - bus_dmamap_sync(sc->sc_bufs_dmat, ds->ds_dmamap, BUS_DMASYNC_PREREAD); - - if (high) - ADMSW_INIT_RXHDESC(sc, idx); - else - ADMSW_INIT_RXLDESC(sc, idx); - - return (0); -} - -int -admsw_mediachange(struct ifnet *ifp) -{ - struct admsw_softc *sc = ifp->if_softc; - int port = 0; - struct ifmedia *ifm; - int old, new, val; - - while(port < SW_DEVS) { - if(ifp == sc->sc_ifnet[port]) - break; - else - port++; - } - - ifm = &sc->sc_ifmedia[port]; - - if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) - return (EINVAL); - - if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) { - val = PHY_CNTL2_AUTONEG|PHY_CNTL2_100M|PHY_CNTL2_FDX; - } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) { - if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) - val = PHY_CNTL2_100M|PHY_CNTL2_FDX; - else - val = PHY_CNTL2_100M; - } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10_T) { - if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) - val = PHY_CNTL2_FDX; - else - val = 0; - } else - return (EINVAL); - - old = REG_READ(PHY_CNTL2_REG); - new = old & ~((PHY_CNTL2_AUTONEG|PHY_CNTL2_100M|PHY_CNTL2_FDX) << port); - new |= (val << port); - - if (new != old) - REG_WRITE(PHY_CNTL2_REG, new); - - return (0); -} - -void -admsw_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr) -{ - struct admsw_softc *sc = ifp->if_softc; - int port = 0; - int status; - - while(port < SW_DEVS) { - if(ifp == sc->sc_ifnet[port]) - break; - else - port++; - } - - ifmr->ifm_status = IFM_AVALID; - ifmr->ifm_active = IFM_ETHER; - - status = REG_READ(PHY_ST_REG) >> port; - - if ((status & PHY_ST_LINKUP) == 0) { - ifmr->ifm_active |= IFM_NONE; - return; - } - - ifmr->ifm_status |= IFM_ACTIVE; - ifmr->ifm_active |= (status & PHY_ST_100M) ? IFM_100_TX : IFM_10_T; - if (status & PHY_ST_FDX) - ifmr->ifm_active |= IFM_FDX; -} - -static device_method_t admsw_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, admsw_probe), - DEVMETHOD(device_attach, admsw_attach), - DEVMETHOD(device_detach, admsw_detach), - DEVMETHOD(device_shutdown, admsw_shutdown), - - { 0, 0 } -}; - -static devclass_t admsw_devclass; - -static driver_t admsw_driver = { - "admsw", - admsw_methods, - sizeof(struct admsw_softc), -}; - -DRIVER_MODULE(admsw, obio, admsw_driver, admsw_devclass, 0, 0); -MODULE_DEPEND(admsw, ether, 1, 1, 1); diff --git a/sys/mips/adm5120/if_admswreg.h b/sys/mips/adm5120/if_admswreg.h deleted file mode 100644 index 28ec5156a2cf..000000000000 --- a/sys/mips/adm5120/if_admswreg.h +++ /dev/null @@ -1,680 +0,0 @@ -/* $NetBSD: if_admswreg.h,v 1.1 2007/03/20 08:52:02 dyoung Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * 3. The names of the authors may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A - * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * $FreeBSD$ - */ -#ifndef _IF_ADMSWREG_H_ -#define _IF_ADMSWREG_H_ - -#define ADMSW_BOOT_DONE 0x0008 -#define ADMSW_BOOT_DONE_BO __BIT(0) -#define ADMSW_SW_RES 0x000c -#define ADMSW_SW_RES_SWR __BITS(31, 0) -#define ADMSW_INT_ST 0x00b0 -#define ADMSW_INT_MASK 0x00b4 - -#define ADMSW_INTR_RSVD __BITS(31, 25) -#define ADMSW_INTR_CPUH __BIT(24) -#define ADMSW_INTR_SDE __BIT(23) -#define ADMSW_INTR_RDE __BIT(22) -#define ADMSW_INTR_W1TE __BIT(21) -#define ADMSW_INTR_W0TE __BIT(20) -#define ADMSW_INTR_MI __BIT(19) -#define ADMSW_INTR_PSC __BIT(18) -#define ADMSW_INTR_BCS __BIT(16) -#define ADMSW_INTR_MD __BIT(15) -#define ADMSW_INTR_GQF __BIT(14) -#define ADMSW_INTR_CPQ __BIT(13) -#define ADMSW_INTR_P5QF __BIT(11) -#define ADMSW_INTR_P4QF __BIT(10) -#define ADMSW_INTR_P3QF __BIT(9) -#define ADMSW_INTR_P2QF __BIT(8) -#define ADMSW_INTR_P1QF __BIT(7) -#define ADMSW_INTR_P0QF __BIT(6) -#define ADMSW_INTR_LDF __BIT(5) -#define ADMSW_INTR_HDF __BIT(4) -#define ADMSW_INTR_RLD __BIT(3) -#define ADMSW_INTR_RHD __BIT(2) -#define ADMSW_INTR_SLD __BIT(1) -#define ADMSW_INTR_SHD __BIT(0) - -#define ADMSW_INT_FMT \ - "\x10"\ - "\x01SHD"\ - "\x02SLD"\ - "\x03RHD"\ - "\x04RLD"\ - "\x05HDF"\ - "\x06LDF"\ - "\x07P0QF"\ - "\x08P1QF"\ - "\x09P2QF"\ - "\x0aP3QF"\ - "\x0bP4QF"\ - "\x0cP5QF"\ - "\x0e"\ - "CPQ"\ - "\x0fGQF"\ - "\x10MD"\ - "\x11"\ - "BCS"\ - "\x13PSC"\ - "\x14MI"\ - "\x15W0TE"\ - "\x16W1TE"\ - "\x17RDE"\ - "\x18SDE"\ - "\x19"\ - "CPUH" - -#define CODE_REG 0x0000 -#define SFTREST_REG 0x0004 -#define BOOT_DONE_REG 0x0008 -#define GLOBAL_ST_REG 0x0010 -#define PHY_ST_REG 0x0014 -#define PHY_ST_LINKUP (1 << 0) -#define PHY_ST_100M (1 << 8) -#define PHY_ST_FDX (1 << 16) -#define PORT_ST_REG 0x0018 -#define MEM_CONTROL_REG 0x001C -#define SW_CONF_REG 0x0020 - -#define CPUP_CONF_REG 0x0024 -#define CPUP_CONF_DCPUP 0x00000001 -#define CPUP_CONF_CRCP 0x00000002 -#define CPUP_CONF_BTM 0x00000004 -#define CPUP_CONF_DUNP_SHIFT 9 -#define CPUP_CONF_DUNP_MASK (0x3F << CPUP_CONF_DUNP_SHIFT) -#define CPUP_CONF_DMCP_SHIFT 16 -#define CPUP_CONF_DMCP_MASK (0x3F << CPUP_CONF_DMCP_SHIFT) -#define CPUP_CONF_DBCP_SHIFT 24 -#define CPUP_CONF_DBCP_MASK (0x3F << CPUP_CONF_DBCP_SHIFT) - -#define PORT_CONF0_REG 0x0028 -#define PORT_CONF0_DP_MASK 0x0000003F -#define PORT_CONF0_EMCP_MASK 0x00003F00 -#define PORT_CONF0_EMCP_SHIFT 8 -#define PORT_CONF0_EMBP_MASK 0x003F0000 -#define PORT_CONF0_EMBP_SHIFT 16 -#define PORT_CONF1_REG 0x002C -#define PORT_CONF2_REG 0x0030 - -#define VLAN_G1_REG 0x0040 -#define VLAN_G2_REG 0x0044 -#define SEND_TRIG_REG 0x0048 -#define SRCH_CMD_REG 0x004C -#define ADDR_ST0_REG 0x0050 -#define ADDR_ST1_REG 0x0054 -#define MAC_WT0_REG 0x0058 -#define MAC_WT0_WRITE 0x00000001 -#define MAC_WT0_WRITE_DONE 0x00000002 -#define MAC_WT0_FILTER_EN 0x00000004 -#define MAC_WT0_VLANID_SHIFT 3 -#define MAC_WT0_VLANID_MASK 0x00000038 -#define MAC_WT0_VLANID_EN 0x00000040 -#define MAC_WT0_PORTMAP_MASK 0x00001F80 -#define MAC_WT0_PORTMAP_SHIFT 7 -#define MAC_WT0_AGE_MASK (0x7 << 13) -#define MAC_WT0_AGE_STATIC (0x7 << 13) -#define MAC_WT0_AGE_VALID (0x1 << 13) -#define MAC_WT0_AGE_EMPTY 0 -#define MAC_WT1_REG 0x005C -#define BW_CNTL0_REG 0x0060 -#define BW_CNTL1_REG 0x0064 -#define PHY_CNTL0_REG 0x0068 -#define PHY_CNTL1_REG 0x006C -#define FC_TH_REG 0x0070 -#define FC_TH_FCS_MASK 0x01FF0000 -#define FC_TH_D2R_MASK 0x0000FF00 -#define FC_TH_D2S_MASK 0x000000FF -#define ADJ_PORT_TH_REG 0x0074 -#define PORT_TH_REG 0x0078 -#define PHY_CNTL2_REG 0x007C -#define PHY_CNTL2_AUTONEG (1 << 0) -#define PHY_CNTL2_ANE_MASK 0x0000001F -#define PHY_CNTL2_SC_MASK 0x000003E0 -#define PHY_CNTL2_SC_SHIFT 5 -#define PHY_CNTL2_100M (1 << PHY_CNTL2_SC_SHIFT) -#define PHY_CNTL2_DC_MASK 0x00007C00 -#define PHY_CNTL2_DC_SHIFT 10 -#define PHY_CNTL2_FDX (1 << PHY_CNTL2_DC_SHIFT) -#define PHY_CNTL2_RFCV_MASK 0x000F8000 -#define PHY_CNTL2_RFCV_SHIFT 15 -#define PHY_CNTL2_PHYR_MASK 0x01F00000 -#define PHY_CNTL2_PHYR_SHIFT 20 -#define PHY_CNTL2_AMDIX_MASK 0x3E000000 -#define PHY_CNTL2_AMDIX_SHIFT 25 -#define PHY_CNTL2_RMAE 0x40000000 -#define PHY_CNTL3_REG 0x0080 -#define PHY_CNTL3_RNT 0x00000400 - -#define PRI_CNTL_REG 0x0084 -#define VLAN_PRI_REG 0x0088 -#define TOS_EN_REG 0x008C -#define TOS_MAP0_REG 0x0090 -#define TOS_MAP1_REG 0x0094 -#define CUSTOM_PRI1_REG 0x0098 -#define CUSTOM_PRI2_REG 0x009C - -#define EMPTY_CNT_REG 0x00A4 -#define PORT_CNT_SEL_REG 0x00A8 -#define PORT_CNT_REG 0x00AC - -#define INT_MASK 0x1FDEFFF - -#define GPIO_CONF0_REG 0x00B8 -#define GPIO_CONF2_REG 0x00BC - -#define SWAP_IN_REG 0x00C8 -#define SWAP_OUT_REG 0x00CC - -#define SEND_HBADDR_REG 0x00D0 -#define SEND_LBADDR_REG 0x00D4 -#define RECV_HBADDR_REG 0x00D8 -#define RECV_LBADDR_REG 0x00DC -#define SEND_HWADDR_REG 0x00E0 -#define SEND_LWADDR_REG 0x00E4 -#define RECV_HWADDR_REG 0x00E8 -#define RECV_LWADDR_REG 0x00EC - -#define TIMER_INT_REG 0x00F0 -#define TIMER_REG 0x00F4 - -#define PORT0_LED_REG 0x0100 -#define PORT1_LED_REG 0x0104 -#define PORT2_LED_REG 0x0108 -#define PORT3_LED_REG 0x010c -#define PORT4_LED_REG 0x0110 - -/* Hardware descriptor format */ -struct admsw_desc { - volatile uint32_t data; - volatile uint32_t cntl; - volatile uint32_t len; - volatile uint32_t status; -} __attribute__((__packed__, __aligned__(4))); - -#define ADM5120_DMA_MASK 0x01ffffff -#define ADM5120_DMA_OWN 0x80000000 /* buffer owner */ -#define ADM5120_DMA_RINGEND 0x10000000 /* Last in DMA ring */ -#define ADM5120_DMA_BUF2ENABLE 0x80000000 - -#define ADM5120_DMA_PORTID 0x00007000 -#define ADM5120_DMA_PORTSHIFT 12 -#define ADM5120_DMA_LEN 0x07ff0000 -#define ADM5120_DMA_LENSHIFT 16 -#define ADM5120_DMA_TYPE 0x00000003 -#define ADM5120_DMA_TYPE_IP 0x00000000 -#define ADM5120_DMA_TYPE_PPPOE 0x00000001 -#define ADM5120_DMA_CSUM 0x80000000 -#define ADM5120_DMA_CSUMFAIL 0x00000008 - -#define SW_DEVS 6 - -#if 0 -/* CODE_REG */ -#define CODE_ID_MASK 0x00FFFF -#define CODE_ADM5120_ID 0x5120 - -#define CODE_REV_MASK 0x0F0000 -#define CODE_REV_SHIFT 16 -#define CODE_REV_ADM5120_0 0x8 - -#define CODE_CLK_MASK 0x300000 -#define CODE_CLK_SHIFT 20 - -#define CPU_CLK_175MHZ 0x0 -#define CPU_CLK_200MHZ 0x1 -#define CPU_CLK_225MHZ 0x2 -#define CPU_CLK_250MHZ 0x3 - -#define CPU_SPEED_175M (175000000/2) -#define CPU_SPEED_200M (200000000/2) -#define CPU_SPEED_225M (225000000/2) -#define CPU_SPEED_250M (250000000/2) - -#define CPU_NAND_BOOT 0x01000000 -#define CPU_DCACHE_2K_WAY (0x1 << 25) -#define CPU_DCACHE_2WAY (0x1 << 26) -#define CPU_ICACHE_2K_WAY (0x1 << 27) -#define CPU_ICACHE_2WAY (0x1 << 28) - -#define CPU_GMII_SUPPORT 0x20000000 - -#define CPU_PQFP_MODE (0x1 << 29) - -#define CPU_CACHE_LINE_SIZE 16 - -/* SftRest_REG */ -#define SOFTWARE_RESET 0x1 - -/* Boot_done_REG */ -#define BOOT_DONE 0x1 - -/* SWReset_REG */ -#define SWITCH_RESET 0x1 - -/* Global_St_REG */ -#define DATA_BUF_BIST_FAILED (0x1 << 0) -#define LINK_TAB_BIST_FAILED (0x1 << 1) -#define MC_TAB_BIST_FAILED (0x1 << 2) -#define ADDR_TAB_BIST_FAILED (0x1 << 3) -#define DCACHE_D_FAILED (0x3 << 4) -#define DCACHE_T_FAILED (0x1 << 6) -#define ICACHE_D_FAILED (0x3 << 7) -#define ICACHE_T_FAILED (0x1 << 9) -#define BIST_FAILED_MASK 0x03FF - -#define ALLMEM_TEST_DONE (0x1 << 10) - -#define SKIP_BLK_CNT_MASK 0x1FF000 -#define SKIP_BLK_CNT_SHIFT 12 - - -/* PHY_st_REG */ -#define PORT_LINK_MASK 0x0000001F -#define PORT_MII_LINKFAIL 0x00000020 -#define PORT_SPEED_MASK 0x00001F00 - -#define PORT_GMII_SPD_MASK 0x00006000 -#define PORT_GMII_SPD_10M 0 -#define PORT_GMII_SPD_100M 0x00002000 -#define PORT_GMII_SPD_1000M 0x00004000 - -#define PORT_DUPLEX_MASK 0x003F0000 -#define PORT_FLOWCTRL_MASK 0x1F000000 - -#define PORT_GMII_FLOWCTRL_MASK 0x60000000 -#define PORT_GMII_FC_ON 0x20000000 -#define PORT_GMII_RXFC_ON 0x20000000 -#define PORT_GMII_TXFC_ON 0x40000000 - -/* Port_st_REG */ -#define PORT_SECURE_ST_MASK 0x001F -#define MII_PORT_TXC_ERR 0x0080 - -/* Mem_control_REG */ -#define SDRAM_SIZE_4MBYTES 0x0001 -#define SDRAM_SIZE_8MBYTES 0x0002 -#define SDRAM_SIZE_16MBYTES 0x0003 -#define SDRAM_SIZE_64MBYTES 0x0004 -#define SDRAM_SIZE_128MBYTES 0x0005 -#define SDRAM_SIZE_MASK 0x0007 - -#define MEMCNTL_SDRAM1_EN (0x1 << 5) - -#define ROM_SIZE_DISABLE 0x0000 -#define ROM_SIZE_512KBYTES 0x0001 -#define ROM_SIZE_1MBYTES 0x0002 -#define ROM_SIZE_2MBYTES 0x0003 -#define ROM_SIZE_4MBYTES 0x0004 -#define ROM_SIZE_8MBYTES 0x0005 -#define ROM_SIZE_MASK 0x0007 - -#define ROM0_SIZE_SHIFT 8 -#define ROM1_SIZE_SHIFT 16 - - -/* SW_conf_REG */ -#define SW_AGE_TIMER_MASK 0x000000F0 -#define SW_AGE_TIMER_DISABLE 0x0 -#define SW_AGE_TIMER_FAST 0x00000080 -#define SW_AGE_TIMER_300SEC 0x00000010 -#define SW_AGE_TIMER_600SEC 0x00000020 -#define SW_AGE_TIMER_1200SEC 0x00000030 -#define SW_AGE_TIMER_2400SEC 0x00000040 -#define SW_AGE_TIMER_4800SEC 0x00000050 -#define SW_AGE_TIMER_9600SEC 0x00000060 -#define SW_AGE_TIMER_19200SEC 0x00000070 -//#define SW_AGE_TIMER_38400SEC 0x00000070 - -#define SW_BC_PREV_MASK 0x00000300 -#define SW_BC_PREV_DISABLE 0 -#define SW_BC_PREV_64BC 0x00000100 -#define SW_BC_PREV_48BC 0x00000200 -#define SW_BC_PREV_32BC 0x00000300 - -#define SW_MAX_LEN_MASK 0x00000C00 -#define SW_MAX_LEN_1536 0 -#define SW_MAX_LEN_1522 0x00000800 -#define SW_MAX_LEN_1518 0x00000400 - -#define SW_DIS_COLABT 0x00001000 - -#define SW_HASH_ALG_MASK 0x00006000 -#define SW_HASH_ALG_DIRECT 0 -#define SW_HASH_ALG_XOR48 0x00002000 -#define SW_HASH_ALG_XOR32 0x00004000 - -#define SW_DISABLE_BACKOFF_TIMER 0x00008000 - -#define SW_BP_NUM_MASK 0x000F0000 -#define SW_BP_NUM_SHIFT 16 -#define SW_BP_MODE_MASK 0x00300000 -#define SW_BP_MODE_DISABLE 0 -#define SW_BP_MODE_JAM 0x00100000 -#define SW_BP_MODE_JAMALL 0x00200000 -#define SW_BP_MODE_CARRIER 0x00300000 -#define SW_RESRV_MC_FILTER 0x00400000 -#define SW_BISR_DISABLE 0x00800000 - -#define SW_DIS_MII_WAS_TX 0x01000000 -#define SW_BISS_EN 0x02000000 -#define SW_BISS_TH_MASK 0x0C000000 -#define SW_BISS_TH_SHIFT 26 -#define SW_REQ_LATENCY_MASK 0xF0000000 -#define SW_REQ_LATENCY_SHIFT 28 - - -/* CPUp_conf_REG */ -#define SW_CPU_PORT_DISABLE 0x00000001 -#define SW_PADING_CRC 0x00000002 -#define SW_BRIDGE_MODE 0x00000004 - -#define SW_DIS_UN_SHIFT 9 -#define SW_DIS_UN_MASK (0x3F << SW_DIS_UN_SHIFT) -#define SW_DIS_MC_SHIFT 16 -#define SW_DIS_MC_MASK (0x3F << SW_DIS_MC_SHIFT) -#define SW_DIS_BC_SHIFT 24 -#define SW_DIS_BC_MASK (0x3F << SW_DIS_BC_SHIFT) - - -/* Port_conf0_REG */ -#define SW_DISABLE_PORT_MASK 0x0000003F -#define SW_EN_MC_MASK 0x00003F00 -#define SW_EN_MC_SHIFT 8 -#define SW_EN_BP_MASK 0x003F0000 -#define SW_EN_BP_SHIFT 16 -#define SW_EN_FC_MASK 0x3F000000 -#define SW_EN_FC_SHIFT 24 - - -/* Port_conf1_REG */ -#define SW_DIS_SA_LEARN_MASK 0x0000003F -#define SW_PORT_BLOCKING_MASK 0x00000FC0 -#define SW_PORT_BLOCKING_SHIFT 6 -#define SW_PORT_BLOCKING_ON 0x1 - -#define SW_PORT_BLOCKING_MODE_MASK 0x0003F000 -#define SW_PORT_BLOCKING_MODE_SHIFT 12 -#define SW_PORT_BLOCKING_CTRLONLY 0x1 - -#define SW_EN_PORT_AGE_MASK 0x03F00000 -#define SW_EN_PORT_AGE_SHIFT 20 -#define SW_EN_SA_SECURED_MASK 0xFC000000 -#define SW_EN_SA_SECURED_SHIFT 26 - - -/* Port_conf2_REG */ -#define SW_GMII_AN_EN 0x00000001 -#define SW_GMII_FORCE_SPD_MASK 0x00000006 -#define SW_GMII_FORCE_SPD_10M 0 -#define SW_GMII_FORCE_SPD_100M 0x2 -#define SW_GMII_FORCE_SPD_1000M 0x4 - -#define SW_GMII_FORCE_FULL_DUPLEX 0x00000008 - -#define SW_GMII_FORCE_RXFC 0x00000010 -#define SW_GMII_FORCE_TXFC 0x00000020 - -#define SW_GMII_EN 0x00000040 -#define SW_GMII_REVERSE 0x00000080 - -#define SW_GMII_TXC_CHECK_EN 0x00000100 - -#define SW_LED_FLASH_TIME_MASK 0x00030000 -#define SW_LED_FLASH_TIME_30MS 0 -#define SW_LED_FLASH_TIME_60MS 0x00010000 -#define SW_LED_FLASH_TIME_240MS 0x00020000 -#define SW_LED_FLASH_TIME_480MS 0x00030000 - - -/* Send_trig_REG */ -#define SEND_TRIG_LOW 0x0001 -#define SEND_TRIG_HIGH 0x0002 - - -/* Srch_cmd_REG */ -#define SW_MAC_SEARCH_START 0x000001 -#define SW_MAX_SEARCH_AGAIN 0x000002 - - -/* MAC_wt0_REG */ -#define SW_MAC_WRITE 0x00000001 -#define SW_MAC_WRITE_DONE 0x00000002 -#define SW_MAC_FILTER_EN 0x00000004 -#define SW_MAC_VLANID_SHIFT 3 -#define SW_MAC_VLANID_MASK 0x00000038 -#define SW_MAC_VLANID_EN 0x00000040 -#define SW_MAC_PORTMAP_MASK 0x00001F80 -#define SW_MAC_PORTMAP_SHIFT 7 -#define SW_MAC_AGE_MASK (0x7 << 13) -#define SW_MAC_AGE_STATIC (0x7 << 13) -#define SW_MAC_AGE_VALID (0x1 << 13) -#define SW_MAC_AGE_EMPTY 0 - -/* BW_cntl0_REG */ -#define SW_PORT_TX_NOLIMIT 0 -#define SW_PORT_TX_64K 1 -#define SW_PORT_TX_128K 2 -#define SW_PORT_TX_256K 3 -#define SW_PORT_TX_512K 4 -#define SW_PORT_TX_1M 5 -#define SW_PORT_TX_4M 6 -#define SW_PORT_TX_10MK 7 - -/* BW_cntl1_REG */ -#define SW_TRAFFIC_SHAPE_IPG (0x1 << 31) - -/* PHY_cntl0_REG */ -#define SW_PHY_ADDR_MASK 0x0000001F -#define PHY_ADDR_MAX 0x1f -#define SW_PHY_REG_ADDR_MASK 0x00001F00 -#define SW_PHY_REG_ADDR_SHIFT 8 -#define PHY_REG_ADDR_MAX 0x1f -#define SW_PHY_WRITE 0x00002000 -#define SW_PHY_READ 0x00004000 -#define SW_PHY_WDATA_MASK 0xFFFF0000 -#define SW_PHY_WDATA_SHIFT 16 - - -/* PHY_cntl1_REG */ -#define SW_PHY_WRITE_DONE 0x00000001 -#define SW_PHY_READ_DONE 0x00000002 -#define SW_PHY_RDATA_MASK 0xFFFF0000 -#define SW_PHY_RDATA_SHIFT 16 - -/* FC_th_REG */ -/* Adj_port_th_REG */ -/* Port_th_REG */ - -/* PHY_cntl2_REG */ -#define SW_PHY_AN_MASK 0x0000001F -#define SW_PHY_SPD_MASK 0x000003E0 -#define SW_PHY_SPD_SHIFT 5 -#define SW_PHY_DPX_MASK 0x00007C00 -#define SW_PHY_DPX_SHIFT 10 -#define SW_FORCE_FC_MASK 0x000F8000 -#define SW_FORCE_FC_SHIFT 15 -#define SW_PHY_NORMAL_MASK 0x01F00000 -#define SW_PHY_NORMAL_SHIFT 20 -#define SW_PHY_AUTOMDIX_MASK 0x3E000000 -#define SW_PHY_AUTOMDIX_SHIFT 25 -#define SW_PHY_REC_MCCAVERAGE 0x40000000 - - -/* PHY_cntl3_REG */ -/* Pri_cntl_REG */ -/* VLAN_pri_REG */ -/* TOS_en_REG */ -/* TOS_map0_REG */ -/* TOS_map1_REG */ -/* Custom_pri1_REG */ -/* Custom_pri2_REG */ -/* Empty_cnt_REG */ -/* Port_cnt_sel_REG */ -/* Port_cnt_REG */ - - -/* SW_Int_st_REG & SW_Int_mask_REG */ -#define SEND_H_DONE_INT 0x0000001 -#define SEND_L_DONE_INT 0x0000002 -#define RX_H_DONE_INT 0x0000004 -#define RX_L_DONE_INT 0x0000008 -#define RX_H_DESC_FULL_INT 0x0000010 -#define RX_L_DESC_FULL_INT 0x0000020 -#define PORT0_QUE_FULL_INT 0x0000040 -#define PORT1_QUE_FULL_INT 0x0000080 -#define PORT2_QUE_FULL_INT 0x0000100 -#define PORT3_QUE_FULL_INT 0x0000200 -#define PORT4_QUE_FULL_INT 0x0000400 -#define PORT5_QUE_FULL_INT 0x0000800 - -#define CPU_QUE_FULL_INT 0x0002000 -#define GLOBAL_QUE_FULL_INT 0x0004000 -#define MUST_DROP_INT 0x0008000 -#define BC_STORM_INT 0x0010000 - -#define PORT_STATUS_CHANGE_INT 0x0040000 -#define INTRUDER_INT 0x0080000 -#define WATCHDOG0_EXPR_INT 0x0100000 -#define WATCHDOG1_EXPR_INT 0x0200000 -#define RX_DESC_ERR_INT 0x0400000 -#define SEND_DESC_ERR_INT 0x0800000 -#define CPU_HOLD_INT 0x1000000 -#define SWITCH_INT_MASK 0x1FDEFFF - - -/* GPIO_conf0_REG */ -#define GPIO0_INPUT_MODE 0x00000001 -#define GPIO1_INPUT_MODE 0x00000002 -#define GPIO2_INPUT_MODE 0x00000004 -#define GPIO3_INPUT_MODE 0x00000008 -#define GPIO4_INPUT_MODE 0x00000010 -#define GPIO5_INPUT_MODE 0x00000020 -#define GPIO6_INPUT_MODE 0x00000040 -#define GPIO7_INPUT_MODE 0x00000080 - -#define GPIO0_OUTPUT_MODE 0 -#define GPIO1_OUTPUT_MODE 0 -#define GPIO2_OUTPUT_MODE 0 -#define GPIO3_OUTPUT_MODE 0 -#define GPIO4_OUTPUT_MODE 0 -#define GPIO5_OUTPUT_MODE 0 -#define GPIO6_OUTPUT_MODE 0 -#define GPIO7_OUTPUT_MODE 0 - -#define GPIO0_INPUT_MASK 0x00000100 -#define GPIO1_INPUT_MASK 0x00000200 -#define GPIO2_INPUT_MASK 0x00000400 -#define GPIO3_INPUT_MASK 0x00000800 -#define GPIO4_INPUT_MASK 0x00001000 -#define GPIO5_INPUT_MASK 0x00002000 -#define GPIO6_INPUT_MASK 0x00004000 -#define GPIO7_INPUT_MASK 0x00008000 - -#define GPIO0_OUTPUT_EN 0x00010000 -#define GPIO1_OUTPUT_EN 0x00020000 -#define GPIO2_OUTPUT_EN 0x00040000 -#define GPIO3_OUTPUT_EN 0x00080000 -#define GPIO4_OUTPUT_EN 0x00100000 -#define GPIO5_OUTPUT_EN 0x00200000 -#define GPIO6_OUTPUT_EN 0x00400000 -#define GPIO7_OUTPUT_EN 0x00800000 - -#define GPIO_CONF0_OUTEN_MASK 0x00ff0000 - -#define GPIO0_OUTPUT_HI 0x01000000 -#define GPIO1_OUTPUT_HI 0x02000000 -#define GPIO2_OUTPUT_HI 0x04000000 -#define GPIO3_OUTPUT_HI 0x08000000 -#define GPIO4_OUTPUT_HI 0x10000000 -#define GPIO5_OUTPUT_HI 0x20000000 -#define GPIO6_OUTPUT_HI 0x40000000 -#define GPIO7_OUTPUT_HI 0x80000000 - -#define GPIO0_OUTPUT_LOW 0 -#define GPIO1_OUTPUT_LOW 0 -#define GPIO2_OUTPUT_LOW 0 -#define GPIO3_OUTPUT_LOW 0 -#define GPIO4_OUTPUT_LOW 0 -#define GPIO5_OUTPUT_LOW 0 -#define GPIO6_OUTPUT_LOW 0 -#define GPIO7_OUTPUT_LOW 0 - - -/* GPIO_conf2_REG */ -#define EXTIO_WAIT_EN (0x1 << 6) -#define EXTIO_CS1_INT1_EN (0x1 << 5) -#define EXTIO_CS0_INT0_EN (0x1 << 4) - -/* Timer_int_REG */ -#define SW_TIMER_INT_DISABLE 0x10000 -#define SW_TIMER_INT 0x1 - -/* Timer_REG */ -#define SW_TIMER_EN 0x10000 -#define SW_TIMER_MASK 0xffff -#define SW_TIMER_10MS_TICKS 0x3D09 -#define SW_TIMER_1MS_TICKS 0x61A -#define SW_TIMER_100US_TICKS 0x9D - - -/* Port0_LED_REG, Port1_LED_REG, Port2_LED_REG, Port3_LED_REG, Port4_LED_REG*/ -#define GPIOL_INPUT_MODE 0x00 -#define GPIOL_OUTPUT_FLASH 0x01 -#define GPIOL_OUTPUT_LOW 0x02 -#define GPIOL_OUTPUT_HIGH 0x03 -#define GPIOL_LINK_LED 0x04 -#define GPIOL_SPEED_LED 0x05 -#define GPIOL_DUPLEX_LED 0x06 -#define GPIOL_ACT_LED 0x07 -#define GPIOL_COL_LED 0x08 -#define GPIOL_LINK_ACT_LED 0x09 -#define GPIOL_DUPLEX_COL_LED 0x0A -#define GPIOL_10MLINK_ACT_LED 0x0B -#define GPIOL_100MLINK_ACT_LED 0x0C -#define GPIOL_CTRL_MASK 0x0F - -#define GPIOL_INPUT_MASK 0x7000 -#define GPIOL_INPUT_0_MASK 0x1000 -#define GPIOL_INPUT_1_MASK 0x2000 -#define GPIOL_INPUT_2_MASK 0x4000 - -#define PORT_LED0_SHIFT 0 -#define PORT_LED1_SHIFT 4 -#define PORT_LED2_SHIFT 8 -#endif - -#endif /* _IF_ADMSWREG_H_ */ diff --git a/sys/mips/adm5120/if_admswvar.h b/sys/mips/adm5120/if_admswvar.h deleted file mode 100644 index d7d341ade4e5..000000000000 --- a/sys/mips/adm5120/if_admswvar.h +++ /dev/null @@ -1,216 +0,0 @@ -/* $NetBSD: if_admswvar.h,v 1.1 2007/03/20 08:52:02 dyoung Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * 3. The names of the authors may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A - * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - */ -#ifndef _IF_ADMSWVAR_H_ -#define _IF_ADMSWVAR_H_ - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#ifdef INET -#include -#include -#include -#include -#endif - -#include -#include - -#include -#include - -#include -#include - -#define MAC_BUFLEN 0x07ff - -#define ADMSW_NTXHDESC 4 -#define ADMSW_NRXHDESC 32 -#define ADMSW_NTXLDESC 32 -#define ADMSW_NRXLDESC 32 - -#define ADMSW_NTXHDESC_MASK (ADMSW_NTXHDESC - 1) -#define ADMSW_NRXHDESC_MASK (ADMSW_NRXHDESC - 1) -#define ADMSW_NTXLDESC_MASK (ADMSW_NTXLDESC - 1) -#define ADMSW_NRXLDESC_MASK (ADMSW_NRXLDESC - 1) - -#define ADMSW_NEXTTXH(x) (((x) + 1) & ADMSW_NTXHDESC_MASK) -#define ADMSW_NEXTRXH(x) (((x) + 1) & ADMSW_NRXHDESC_MASK) -#define ADMSW_NEXTTXL(x) (((x) + 1) & ADMSW_NTXLDESC_MASK) -#define ADMSW_NEXTRXL(x) (((x) + 1) & ADMSW_NRXLDESC_MASK) - -#define ADMSW_IRQ 9 - -struct admsw_control_data { - /* The transmit descriptors. */ - struct admsw_desc acd_txhdescs[ADMSW_NTXHDESC]; - - /* The receive descriptors. */ - struct admsw_desc acd_rxhdescs[ADMSW_NRXHDESC]; - - /* The transmit descriptors. */ - struct admsw_desc acd_txldescs[ADMSW_NTXLDESC]; - - /* The receive descriptors. */ - struct admsw_desc acd_rxldescs[ADMSW_NRXLDESC]; -}; - -#define ADMSW_CDOFF(x) offsetof(struct admsw_control_data, x) -#define ADMSW_CDTXHOFF(x) ADMSW_CDOFF(acd_txhdescs[(x)]) -#define ADMSW_CDTXLOFF(x) ADMSW_CDOFF(acd_txldescs[(x)]) -#define ADMSW_CDRXHOFF(x) ADMSW_CDOFF(acd_rxhdescs[(x)]) -#define ADMSW_CDRXLOFF(x) ADMSW_CDOFF(acd_rxldescs[(x)]) - -struct admsw_descsoft { - struct mbuf *ds_mbuf; - bus_dmamap_t ds_dmamap; - /* Up to 2 segments */ - uint32_t ds_addr[2]; - uint32_t ds_len[2]; - uint32_t ds_nsegs; -}; - -/* - * Software state per device. - */ -struct admsw_softc { - device_t sc_dev; /* generic device information */ - uint8_t sc_enaddr[ETHER_ADDR_LEN]; - bus_dma_tag_t sc_control_dmat; - /* bus DMA tag for control structs*/ - bus_dma_tag_t sc_bufs_dmat; /* bus DMA tag for buffers */ - struct ifmedia sc_ifmedia[SW_DEVS]; - int ndevs; /* number of IFF_RUNNING interfaces */ - struct ifnet *sc_ifnet[SW_DEVS]; - struct callout sc_watchdog; - int sc_timer; - /* Ethernet common data */ - void *sc_ih; /* interrupt cookie */ - struct resource *irq_res; - struct resource *mem_res; - bus_dmamap_t sc_cddmamap; /* control data DMA map */ - uint32_t sc_cddma; - struct admsw_control_data *sc_control_data; - - struct admsw_descsoft sc_txhsoft[ADMSW_NTXHDESC]; - struct admsw_descsoft sc_rxhsoft[ADMSW_NRXHDESC]; - struct admsw_descsoft sc_txlsoft[ADMSW_NTXLDESC]; - struct admsw_descsoft sc_rxlsoft[ADMSW_NRXLDESC]; -#define sc_txhdescs sc_control_data->acd_txhdescs -#define sc_rxhdescs sc_control_data->acd_rxhdescs -#define sc_txldescs sc_control_data->acd_txldescs -#define sc_rxldescs sc_control_data->acd_rxldescs - - int sc_txfree; /* number of free Tx descriptors */ - int sc_txnext; /* next Tx descriptor to use */ - int sc_txdirty; /* first dirty Tx descriptor */ - int sc_rxptr; /* next ready Rx descriptor */ -}; - -#define ADMSW_CDTXHADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDTXHOFF((x))) -#define ADMSW_CDTXLADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDTXLOFF((x))) -#define ADMSW_CDRXHADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDRXHOFF((x))) -#define ADMSW_CDRXLADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDRXLOFF((x))) - -#define ADMSW_CDTXHSYNC(sc, x, ops) \ - bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops)) - -#define ADMSW_CDTXLSYNC(sc, x, ops) \ - bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops)) - -#define ADMSW_CDRXHSYNC(sc, x, ops) \ - bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops)) - -#define ADMSW_CDRXLSYNC(sc, x, ops) \ - bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops)) - -#define ADMSW_INIT_RXHDESC(sc, x) \ -do { \ - struct admsw_descsoft *__ds = &(sc)->sc_rxhsoft[(x)]; \ - struct admsw_desc *__desc = &(sc)->sc_rxhdescs[(x)]; \ - struct mbuf *__m = __ds->ds_mbuf; \ - \ - __m->m_data = __m->m_ext.ext_buf + 2; \ - __desc->data = __ds->ds_addr[0] + 2; \ - __desc->cntl = 0; \ - __desc->len = min(MCLBYTES - 2, MAC_BUFLEN - 2); \ - __desc->status = 0; \ - if ((x) == ADMSW_NRXHDESC - 1) \ - __desc->data |= ADM5120_DMA_RINGEND; \ - __desc->data |= ADM5120_DMA_OWN; \ - ADMSW_CDRXHSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \ -} while (0) - -#define ADMSW_INIT_RXLDESC(sc, x) \ -do { \ - struct admsw_descsoft *__ds = &(sc)->sc_rxlsoft[(x)]; \ - struct admsw_desc *__desc = &(sc)->sc_rxldescs[(x)]; \ - struct mbuf *__m = __ds->ds_mbuf; \ - \ - __m->m_data = __m->m_ext.ext_buf + 2; \ - __desc->data = __ds->ds_addr[0] + 2; \ - __desc->cntl = 0; \ - __desc->len = min(MCLBYTES - 2, MAC_BUFLEN - 2); \ - __desc->status = 0; \ - if ((x) == ADMSW_NRXLDESC - 1) \ - __desc->data |= ADM5120_DMA_RINGEND; \ - __desc->data |= ADM5120_DMA_OWN; \ - ADMSW_CDRXLSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \ -} while (0) - -void admwdog_attach(struct admsw_softc *); - -#endif /* _IF_ADMSWVAR_H_ */ diff --git a/sys/mips/adm5120/obio.c b/sys/mips/adm5120/obio.c deleted file mode 100644 index a52b405c7f14..000000000000 --- a/sys/mips/adm5120/obio.c +++ /dev/null @@ -1,542 +0,0 @@ -/* $NetBSD: obio.c,v 1.11 2003/07/15 00:25:05 lukem Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Jason R. Thorpe for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -/* MIPS HW interrupts of IRQ/FIQ respectively */ -#define ADM5120_INTR 0 -#define ADM5120_FAST_INTR 1 - -/* Interrupt levels */ -#define INTR_IRQ 0 -#define INTR_FIQ 1 - -int irq_priorities[NIRQS] = { - INTR_IRQ, /* flash */ - INTR_FIQ, /* uart0 */ - INTR_FIQ, /* uart1 */ - INTR_IRQ, /* ahci */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* admsw */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ - INTR_IRQ, /* unknown */ -}; - - -#define REG_READ(o) *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(ADM5120_BASE_ICU + (o))) -#define REG_WRITE(o,v) (REG_READ(o)) = (v) - -static int obio_activate_resource(device_t, device_t, int, int, - struct resource *); -static device_t obio_add_child(device_t, u_int, const char *, int); -static struct resource * - obio_alloc_resource(device_t, device_t, int, int *, rman_res_t, - rman_res_t, rman_res_t, u_int); -static int obio_attach(device_t); -static int obio_deactivate_resource(device_t, device_t, int, int, - struct resource *); -static struct resource_list * - obio_get_resource_list(device_t, device_t); -static void obio_hinted_child(device_t, const char *, int); -static int obio_intr(void *); -static int obio_probe(device_t); -static int obio_release_resource(device_t, device_t, int, int, - struct resource *); -static int obio_setup_intr(device_t, device_t, struct resource *, int, - driver_filter_t *, driver_intr_t *, void *, void **); -static int obio_teardown_intr(device_t, device_t, struct resource *, - void *); - - -static void -obio_mask_irq(void *source) -{ - int irq; - uint32_t irqmask; - uint32_t reg; - - irq = (int)source; - irqmask = 1 << irq; - - /* disable IRQ */ - reg = REG_READ(ICU_DISABLE_REG); - REG_WRITE(ICU_DISABLE_REG, (reg | irqmask)); -} - -static void -obio_unmask_irq(void *source) -{ - int irq; - uint32_t irqmask; - uint32_t reg; - - irq = (int)source; - irqmask = 1 << irq; - - /* disable IRQ */ - reg = REG_READ(ICU_DISABLE_REG); - REG_WRITE(ICU_DISABLE_REG, (reg & ~irqmask)); - -} - - -static int -obio_probe(device_t dev) -{ - - return (BUS_PROBE_NOWILDCARD); -} - -static int -obio_attach(device_t dev) -{ - struct obio_softc *sc = device_get_softc(dev); - int rid; - - sc->oba_mem_rman.rm_type = RMAN_ARRAY; - sc->oba_mem_rman.rm_descr = "OBIO memeory"; - if (rman_init(&sc->oba_mem_rman) != 0 || - rman_manage_region(&sc->oba_mem_rman, OBIO_MEM_START, - OBIO_MEM_START + OBIO_MEM_SIZE) != 0) - panic("obio_attach: failed to set up I/O rman"); - - sc->oba_irq_rman.rm_type = RMAN_ARRAY; - sc->oba_irq_rman.rm_descr = "OBIO IRQ"; - - if (rman_init(&sc->oba_irq_rman) != 0 || - rman_manage_region(&sc->oba_irq_rman, 0, NIRQS-1) != 0) - panic("obio_attach: failed to set up IRQ rman"); - - /* Hook up our interrupt handler. */ - if ((sc->sc_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, - ADM5120_INTR, ADM5120_INTR, 1, - RF_SHAREABLE | RF_ACTIVE)) == NULL) { - device_printf(dev, "unable to allocate IRQ resource\n"); - return (ENXIO); - } - - if ((bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC, obio_intr, NULL, - sc, &sc->sc_ih))) { - device_printf(dev, - "WARNING: unable to register interrupt handler\n"); - return (ENXIO); - } - - /* Hook up our FAST interrupt handler. */ - if ((sc->sc_fast_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, - ADM5120_FAST_INTR, ADM5120_FAST_INTR, 1, - RF_SHAREABLE | RF_ACTIVE)) == NULL) { - device_printf(dev, "unable to allocate IRQ resource\n"); - return (ENXIO); - } - - if ((bus_setup_intr(dev, sc->sc_fast_irq, INTR_TYPE_MISC, obio_intr, - NULL, sc, &sc->sc_fast_ih))) { - device_printf(dev, - "WARNING: unable to register interrupt handler\n"); - return (ENXIO); - } - - /* disable all interrupts */ - REG_WRITE(ICU_ENABLE_REG, ICU_INT_MASK); - - bus_generic_probe(dev); - bus_enumerate_hinted_children(dev); - bus_generic_attach(dev); - - return (0); -} - -static struct resource * -obio_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct obio_softc *sc = device_get_softc(bus); - struct obio_ivar *ivar = device_get_ivars(child); - struct resource *rv; - struct resource_list_entry *rle; - struct rman *rm; - int isdefault, needactivate, passthrough; - - isdefault = (RMAN_IS_DEFAULT_RANGE(start, end) && count == 1); - needactivate = flags & RF_ACTIVE; - passthrough = (device_get_parent(child) != bus); - rle = NULL; - - if (passthrough) - return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type, - rid, start, end, count, flags)); - - /* - * If this is an allocation of the "default" range for a given RID, - * and we know what the resources for this device are (ie. they aren't - * maintained by a child bus), then work out the start/end values. - */ - if (isdefault) { - rle = resource_list_find(&ivar->resources, type, *rid); - if (rle == NULL) - return (NULL); - if (rle->res != NULL) { - panic("%s: resource entry is busy", __func__); - } - start = rle->start; - end = rle->end; - count = rle->count; - } - - switch (type) { - case SYS_RES_IRQ: - rm = &sc->oba_irq_rman; - break; - case SYS_RES_MEMORY: - rm = &sc->oba_mem_rman; - break; - default: - printf("%s: unknown resource type %d\n", __func__, type); - return (0); - } - - rv = rman_reserve_resource(rm, start, end, count, flags, child); - if (rv == NULL) { - printf("%s: could not reserve resource\n", __func__); - return (0); - } - - rman_set_rid(rv, *rid); - - if (needactivate) { - if (bus_activate_resource(child, type, *rid, rv)) { - printf("%s: could not activate resource\n", __func__); - rman_release_resource(rv); - return (0); - } - } - - return (rv); -} - -static int -obio_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - - /* - * If this is a memory resource, track the direct mapping - * in the uncached MIPS KSEG1 segment. - */ - if (type == SYS_RES_MEMORY) { - void *vaddr; - - vaddr = (void *)MIPS_PHYS_TO_KSEG1((intptr_t)rman_get_start(r)); - rman_set_virtual(r, vaddr); - rman_set_bustag(r, mips_bus_space_generic); - rman_set_bushandle(r, (bus_space_handle_t)vaddr); - } - - return (rman_activate_resource(r)); -} - -static int -obio_deactivate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - - return (rman_deactivate_resource(r)); -} - -static int -obio_release_resource(device_t dev, device_t child, int type, - int rid, struct resource *r) -{ - struct resource_list *rl; - struct resource_list_entry *rle; - - rl = obio_get_resource_list(dev, child); - if (rl == NULL) - return (EINVAL); - rle = resource_list_find(rl, type, rid); - if (rle == NULL) - return (EINVAL); - rman_release_resource(r); - rle->res = NULL; - - return (0); -} - -static int -obio_setup_intr(device_t dev, device_t child, struct resource *ires, - int flags, driver_filter_t *filt, driver_intr_t *handler, - void *arg, void **cookiep) -{ - struct obio_softc *sc = device_get_softc(dev); - struct intr_event *event; - int irq, error, priority; - uint32_t irqmask; - - irq = rman_get_start(ires); - - if (irq >= NIRQS) - panic("%s: bad irq %d", __func__, irq); - - event = sc->sc_eventstab[irq]; - if (event == NULL) { - error = intr_event_create(&event, (void *)irq, 0, irq, - obio_mask_irq, obio_unmask_irq, - NULL, NULL, "obio intr%d:", irq); - - sc->sc_eventstab[irq] = event; - } - else - panic("obio: Can't share IRQs"); - - intr_event_add_handler(event, device_get_nameunit(child), filt, - handler, arg, intr_priority(flags), flags, cookiep); - - irqmask = 1 << irq; - priority = irq_priorities[irq]; - - if (priority == INTR_FIQ) - REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) | irqmask); - else - REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) & ~irqmask); - - /* enable */ - REG_WRITE(ICU_ENABLE_REG, irqmask); - - obio_unmask_irq((void*)irq); - - return (0); -} - -static int -obio_teardown_intr(device_t dev, device_t child, struct resource *ires, - void *cookie) -{ - struct obio_softc *sc = device_get_softc(dev); - int irq, result, priority; - uint32_t irqmask; - - irq = rman_get_start(ires); - if (irq >= NIRQS) - panic("%s: bad irq %d", __func__, irq); - - if (sc->sc_eventstab[irq] == NULL) - panic("Trying to teardown unoccupied IRQ"); - - irqmask = (1 << irq); - priority = irq_priorities[irq]; - - if (priority == INTR_FIQ) - REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) & ~irqmask); - else - REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) | irqmask); - - /* disable */ - irqmask = REG_READ(ICU_ENABLE_REG); - irqmask &= ~(1 << irq); - REG_WRITE(ICU_ENABLE_REG, irqmask); - - result = intr_event_remove_handler(cookie); - if (!result) { - sc->sc_eventstab[irq] = NULL; - } - - return (result); -} - -static int -obio_intr(void *arg) -{ - struct obio_softc *sc = arg; - struct intr_event *event; - uint32_t irqstat; - int irq; - - irqstat = REG_READ(ICU_FIQ_STATUS_REG); - irqstat |= REG_READ(ICU_STATUS_REG); - - irq = 0; - while (irqstat != 0) { - if ((irqstat & 1) == 1) { - event = sc->sc_eventstab[irq]; - if (!event || TAILQ_EMPTY(&event->ie_handlers)) - continue; - - /* TODO: pass frame as an argument*/ - /* TODO: log stray interrupt */ - intr_event_handle(event, NULL); - } - - irq++; - irqstat >>= 1; - } - - return (FILTER_HANDLED); -} - -static void -obio_hinted_child(device_t bus, const char *dname, int dunit) -{ - device_t child; - long maddr; - int msize; - int irq; - int result; - - child = BUS_ADD_CHILD(bus, 0, dname, dunit); - - /* - * Set hard-wired resources for hinted child using - * specific RIDs. - */ - resource_long_value(dname, dunit, "maddr", &maddr); - resource_int_value(dname, dunit, "msize", &msize); - - - result = bus_set_resource(child, SYS_RES_MEMORY, 0, - maddr, msize); - if (result != 0) - device_printf(bus, "warning: bus_set_resource() failed\n"); - - if (resource_int_value(dname, dunit, "irq", &irq) == 0) { - result = bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1); - if (result != 0) - device_printf(bus, - "warning: bus_set_resource() failed\n"); - } -} - -static device_t -obio_add_child(device_t bus, u_int order, const char *name, int unit) -{ - device_t child; - struct obio_ivar *ivar; - - ivar = malloc(sizeof(struct obio_ivar), M_DEVBUF, M_WAITOK | M_ZERO); - resource_list_init(&ivar->resources); - - child = device_add_child_ordered(bus, order, name, unit); - if (child == NULL) { - printf("Can't add child %s%d ordered\n", name, unit); - return (0); - } - - device_set_ivars(child, ivar); - - return (child); -} - -/* - * Helper routine for bus_generic_rl_get_resource/bus_generic_rl_set_resource - * Provides pointer to resource_list for these routines - */ -static struct resource_list * -obio_get_resource_list(device_t dev, device_t child) -{ - struct obio_ivar *ivar; - - ivar = device_get_ivars(child); - return (&(ivar->resources)); -} - -static device_method_t obio_methods[] = { - DEVMETHOD(bus_activate_resource, obio_activate_resource), - DEVMETHOD(bus_add_child, obio_add_child), - DEVMETHOD(bus_alloc_resource, obio_alloc_resource), - DEVMETHOD(bus_deactivate_resource, obio_deactivate_resource), - DEVMETHOD(bus_get_resource_list, obio_get_resource_list), - DEVMETHOD(bus_hinted_child, obio_hinted_child), - DEVMETHOD(bus_release_resource, obio_release_resource), - DEVMETHOD(bus_setup_intr, obio_setup_intr), - DEVMETHOD(bus_teardown_intr, obio_teardown_intr), - DEVMETHOD(device_attach, obio_attach), - DEVMETHOD(device_probe, obio_probe), - DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), - DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), - - {0, 0}, -}; - -static driver_t obio_driver = { - "obio", - obio_methods, - sizeof(struct obio_softc), -}; -static devclass_t obio_devclass; - -DRIVER_MODULE(obio, nexus, obio_driver, obio_devclass, 0, 0); diff --git a/sys/mips/adm5120/obiovar.h b/sys/mips/adm5120/obiovar.h deleted file mode 100644 index 8a688bfb2206..000000000000 --- a/sys/mips/adm5120/obiovar.h +++ /dev/null @@ -1,68 +0,0 @@ -/* $NetBSD: obiovar.h,v 1.4 2003/06/16 17:40:53 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 2002, 2003 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Jason R. Thorpe for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * $FreeBSD$ - * - */ - -#ifndef _ADM5120_OBIOVAR_H_ -#define _ADM5120_OBIOVAR_H_ - -#include - -/* Number of IRQs */ -#define NIRQS 32 - -#define OBIO_MEM_START 0x10C00000L -#define OBIO_MEM_SIZE 0x1e00000 - -struct obio_softc { - struct rman oba_mem_rman; - struct rman oba_irq_rman; - struct intr_event *sc_eventstab[NIRQS]; /* IRQ events structs */ - struct resource *sc_irq; /* IRQ resource */ - void *sc_ih; /* interrupt cookie */ - struct resource *sc_fast_irq; /* IRQ resource */ - void *sc_fast_ih; /* interrupt cookie */ -}; - -struct obio_ivar { - struct resource_list resources; -}; - -#endif /* _ADM5120_OBIOVAR_H_ */ diff --git a/sys/mips/adm5120/std.adm5120 b/sys/mips/adm5120/std.adm5120 deleted file mode 100644 index bbd9f0b5a33a..000000000000 --- a/sys/mips/adm5120/std.adm5120 +++ /dev/null @@ -1,12 +0,0 @@ -# $FreeBSD$ -# -# Standard include file for ADM5120 - -files "../adm5120/files.adm5120" - -machine mips mipsel -cpu CPU_MIPS4KC - -# device admpci -device admsw -device pci diff --git a/sys/mips/adm5120/uart_bus_adm5120.c b/sys/mips/adm5120/uart_bus_adm5120.c deleted file mode 100644 index 0367ae2fff96..000000000000 --- a/sys/mips/adm5120/uart_bus_adm5120.c +++ /dev/null @@ -1,95 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2007 Bruce M. Simpson. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * $Id$ - */ -/* - * Skeleton of this file was based on respective code for ARM - * code written by Olivier Houchard. - */ - -/* - * XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is - * experimental and was written for MIPS32 port. - */ -#include "opt_uart.h" - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include - -#include "uart_if.h" - -static int uart_adm5120_probe(device_t dev); - -extern struct uart_class uart_adm5120_uart_class; - -static device_method_t uart_adm5120_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, uart_adm5120_probe), - DEVMETHOD(device_attach, uart_bus_attach), - DEVMETHOD(device_detach, uart_bus_detach), - { 0, 0 } -}; - -static driver_t uart_adm5120_driver = { - uart_driver_name, - uart_adm5120_methods, - sizeof(struct uart_softc), -}; - -extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs; - -static int -uart_adm5120_probe(device_t dev) -{ - struct uart_softc *sc; - - sc = device_get_softc(dev); - sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs); - sc->sc_class = &uart_adm5120_uart_class; - bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); - - return (uart_bus_probe(dev, 0, 0, 0, 0, 0)); -} - -DRIVER_MODULE(uart, obio, uart_adm5120_driver, uart_devclass, 0, 0); diff --git a/sys/mips/adm5120/uart_cpu_adm5120.c b/sys/mips/adm5120/uart_cpu_adm5120.c deleted file mode 100644 index a9d93500297a..000000000000 --- a/sys/mips/adm5120/uart_cpu_adm5120.c +++ /dev/null @@ -1,85 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2006 Wojciech A. Koszek - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $Id$ - */ -/* - * Skeleton of this file was based on respective code for ARM - * code written by Olivier Houchard. - */ -/* - * XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is - * experimental and was written for MIPS32 port. - */ -#include "opt_uart.h" - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include - -#include - -#include -#include - -#include - -extern struct uart_class uart_adm5120_uart_class; -bus_space_tag_t uart_bus_space_io; -bus_space_tag_t uart_bus_space_mem; - -int -uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) -{ - - return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0); -} - -int -uart_cpu_getdev(int devtype, struct uart_devinfo *di) -{ - - di->ops = uart_getops(&uart_adm5120_uart_class); - di->bas.chan = 0; - di->bas.bst = mips_bus_space_generic; - di->bas.regshft = 0; - di->bas.rclk = 0; - di->baudrate = 115200; - di->databits = 8; - di->stopbits = 1; - di->parity = UART_PARITY_NONE; - - uart_bus_space_io = 0; - uart_bus_space_mem = mips_bus_space_generic; - di->bas.bsh = MIPS_PHYS_TO_KSEG1(ADM5120_BASE_UART0); - - return (0); -} diff --git a/sys/mips/adm5120/uart_dev_adm5120.c b/sys/mips/adm5120/uart_dev_adm5120.c deleted file mode 100644 index d7c8186898d6..000000000000 --- a/sys/mips/adm5120/uart_dev_adm5120.c +++ /dev/null @@ -1,482 +0,0 @@ -/* $NetBSD: uart.c,v 1.2 2007/03/23 20:05:47 dogcow Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko. - * Copyright (c) 2007 Oleksandr Tymoshenko. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * 3. The names of the authors may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A - * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include "uart_if.h" - -/* - * Low-level UART interface. - */ -static int adm5120_uart_probe(struct uart_bas *bas); -static void adm5120_uart_init(struct uart_bas *bas, int, int, int, int); -static void adm5120_uart_term(struct uart_bas *bas); -static void adm5120_uart_putc(struct uart_bas *bas, int); -static int adm5120_uart_rxready(struct uart_bas *bas); -static int adm5120_uart_getc(struct uart_bas *bas, struct mtx *); - -static struct uart_ops uart_adm5120_uart_ops = { - .probe = adm5120_uart_probe, - .init = adm5120_uart_init, - .term = adm5120_uart_term, - .putc = adm5120_uart_putc, - .rxready = adm5120_uart_rxready, - .getc = adm5120_uart_getc, -}; - -static int -adm5120_uart_probe(struct uart_bas *bas) -{ - - return (0); -} - -static void -adm5120_uart_init(struct uart_bas *bas, int baudrate, int databits, - int stopbits, int parity) -{ - - /* TODO: Set parameters for uart, meanwhile stick with 115200N1 */ -} - -static void -adm5120_uart_term(struct uart_bas *bas) -{ - -} - -static void -adm5120_uart_putc(struct uart_bas *bas, int c) -{ - char chr; - chr = c; - while (uart_getreg(bas, UART_FR_REG) & UART_FR_TX_FIFO_FULL) - ; - uart_setreg(bas, UART_DR_REG, c); - while (uart_getreg(bas, UART_FR_REG) & UART_FR_BUSY) - ; - uart_barrier(bas); -} - -static int -adm5120_uart_rxready(struct uart_bas *bas) -{ - if (uart_getreg(bas, UART_FR_REG) & UART_FR_RX_FIFO_EMPTY) - return (0); - - return (1); -} - -static int -adm5120_uart_getc(struct uart_bas *bas, struct mtx *hwmtx) -{ - int c; - - uart_lock(hwmtx); - - while (uart_getreg(bas, UART_FR_REG) & UART_FR_RX_FIFO_EMPTY) { - uart_unlock(hwmtx); - DELAY(10); - uart_lock(hwmtx); - } - - c = uart_getreg(bas, UART_DR_REG); - - uart_unlock(hwmtx); - - return (c); -} - -/* - * High-level UART interface. - */ -struct adm5120_uart_softc { - struct uart_softc base; -}; - -static int adm5120_uart_bus_attach(struct uart_softc *); -static int adm5120_uart_bus_detach(struct uart_softc *); -static int adm5120_uart_bus_flush(struct uart_softc *, int); -static int adm5120_uart_bus_getsig(struct uart_softc *); -static int adm5120_uart_bus_ioctl(struct uart_softc *, int, intptr_t); -static int adm5120_uart_bus_ipend(struct uart_softc *); -static int adm5120_uart_bus_param(struct uart_softc *, int, int, int, int); -static int adm5120_uart_bus_probe(struct uart_softc *); -static int adm5120_uart_bus_receive(struct uart_softc *); -static int adm5120_uart_bus_setsig(struct uart_softc *, int); -static int adm5120_uart_bus_transmit(struct uart_softc *); -static void adm5120_uart_bus_grab(struct uart_softc *); -static void adm5120_uart_bus_ungrab(struct uart_softc *); - -static kobj_method_t adm5120_uart_methods[] = { - KOBJMETHOD(uart_attach, adm5120_uart_bus_attach), - KOBJMETHOD(uart_detach, adm5120_uart_bus_detach), - KOBJMETHOD(uart_flush, adm5120_uart_bus_flush), - KOBJMETHOD(uart_getsig, adm5120_uart_bus_getsig), - KOBJMETHOD(uart_ioctl, adm5120_uart_bus_ioctl), - KOBJMETHOD(uart_ipend, adm5120_uart_bus_ipend), - KOBJMETHOD(uart_param, adm5120_uart_bus_param), - KOBJMETHOD(uart_probe, adm5120_uart_bus_probe), - KOBJMETHOD(uart_receive, adm5120_uart_bus_receive), - KOBJMETHOD(uart_setsig, adm5120_uart_bus_setsig), - KOBJMETHOD(uart_transmit, adm5120_uart_bus_transmit), - KOBJMETHOD(uart_grab, adm5120_uart_bus_grab), - KOBJMETHOD(uart_ungrab, adm5120_uart_bus_ungrab), - { 0, 0 } -}; - -struct uart_class uart_adm5120_uart_class = { - "adm5120", - adm5120_uart_methods, - sizeof(struct adm5120_uart_softc), - .uc_ops = &uart_adm5120_uart_ops, - .uc_range = 1, /* use hinted range */ - .uc_rclk = 62500000, - .uc_rshift = 0 -}; - -#define SIGCHG(c, i, s, d) \ - if (c) { \ - i |= (i & s) ? s : s | d; \ - } else { \ - i = (i & s) ? (i & ~s) | d : i; \ - } - -/* - * Disable TX interrupt. uart should be locked - */ -static __inline void -adm5120_uart_disable_txintr(struct uart_softc *sc) -{ - uint8_t cr; - - cr = uart_getreg(&sc->sc_bas, UART_CR_REG); - cr &= ~UART_CR_TX_INT_EN; - uart_setreg(&sc->sc_bas, UART_CR_REG, cr); -} - -/* - * Enable TX interrupt. uart should be locked - */ -static __inline void -adm5120_uart_enable_txintr(struct uart_softc *sc) -{ - uint8_t cr; - - cr = uart_getreg(&sc->sc_bas, UART_CR_REG); - cr |= UART_CR_TX_INT_EN; - uart_setreg(&sc->sc_bas, UART_CR_REG, cr); -} - -static int -adm5120_uart_bus_attach(struct uart_softc *sc) -{ - struct uart_bas *bas; - struct uart_devinfo *di; - - bas = &sc->sc_bas; - if (sc->sc_sysdev != NULL) { - di = sc->sc_sysdev; - /* TODO: set parameters from di */ - } else { - /* TODO: set parameters 115200, 8N1 */ - } - - (void)adm5120_uart_bus_getsig(sc); - -#if 1 - /* Enable FIFO */ - uart_setreg(bas, UART_LCR_H_REG, - uart_getreg(bas, UART_LCR_H_REG) | UART_LCR_H_FEN); -#endif - /* Enable interrupts */ - uart_setreg(bas, UART_CR_REG, - UART_CR_PORT_EN|UART_CR_RX_INT_EN|UART_CR_RX_TIMEOUT_INT_EN| - UART_CR_MODEM_STATUS_INT_EN); - - return (0); -} - -static int -adm5120_uart_bus_detach(struct uart_softc *sc) -{ - - return (0); -} - -static int -adm5120_uart_bus_flush(struct uart_softc *sc, int what) -{ - - return (0); -} - -static int -adm5120_uart_bus_getsig(struct uart_softc *sc) -{ - uint32_t new, old, sig; - uint8_t bes; - - do { - old = sc->sc_hwsig; - sig = old; - uart_lock(sc->sc_hwmtx); - bes = uart_getreg(&sc->sc_bas, UART_FR_REG); - uart_unlock(sc->sc_hwmtx); - SIGCHG(bes & UART_FR_CTS, sig, SER_CTS, SER_DCTS); - SIGCHG(bes & UART_FR_DCD, sig, SER_DCD, SER_DDCD); - SIGCHG(bes & UART_FR_DSR, sig, SER_DSR, SER_DDSR); - new = sig & ~SER_MASK_DELTA; - } while (!atomic_cmpset_32(&sc->sc_hwsig, old, new)); - - return (sig); -} - -static int -adm5120_uart_bus_ioctl(struct uart_softc *sc, int request, intptr_t data) -{ - struct uart_bas *bas; - int baudrate, divisor, error; - - bas = &sc->sc_bas; - error = 0; - uart_lock(sc->sc_hwmtx); - switch (request) { - case UART_IOCTL_BREAK: - /* TODO: Send BREAK */ - break; - case UART_IOCTL_BAUD: - divisor = uart_getreg(bas, UART_LCR_M_REG); - divisor = (divisor << 8) | - uart_getreg(bas, UART_LCR_L_REG); - baudrate = bas->rclk / 2 / (divisor + 2); - *(int*)data = baudrate; - break; - default: - error = EINVAL; - break; - } - uart_unlock(sc->sc_hwmtx); - return (error); -} - -static int -adm5120_uart_bus_ipend(struct uart_softc *sc) -{ - struct uart_bas *bas; - int ipend; - uint8_t ir, fr, rsr; - - bas = &sc->sc_bas; - ipend = 0; - - uart_lock(sc->sc_hwmtx); - ir = uart_getreg(&sc->sc_bas, UART_IR_REG); - fr = uart_getreg(&sc->sc_bas, UART_FR_REG); - rsr = uart_getreg(&sc->sc_bas, UART_RSR_REG); - - if (ir & UART_IR_RX_INT) - ipend |= SER_INT_RXREADY; - - if (ir & UART_IR_RX_TIMEOUT_INT) - ipend |= SER_INT_RXREADY; - - if (ir & UART_IR_MODEM_STATUS_INT) - ipend |= SER_INT_SIGCHG; - - if (rsr & UART_RSR_BE) - ipend |= SER_INT_BREAK; - - if (rsr & UART_RSR_OE) - ipend |= SER_INT_OVERRUN; - - if (fr & UART_FR_TX_FIFO_EMPTY) { - if (ir & UART_IR_TX_INT) { - adm5120_uart_disable_txintr(sc); - ipend |= SER_INT_TXIDLE; - } - } - - if (ipend) - uart_setreg(bas, UART_IR_REG, ir | UART_IR_UICR); - - uart_unlock(sc->sc_hwmtx); - - return (ipend); -} - -static int -adm5120_uart_bus_param(struct uart_softc *sc, int baudrate, int databits, - int stopbits, int parity) -{ - - /* TODO: Set parameters for uart, meanwhile stick with 115200 8N1 */ - return (0); -} - -static int -adm5120_uart_bus_probe(struct uart_softc *sc) -{ - char buf[80]; - int error; - char ch; - - error = adm5120_uart_probe(&sc->sc_bas); - if (error) - return (error); - - sc->sc_rxfifosz = 16; - sc->sc_txfifosz = 16; - - ch = sc->sc_bas.chan + 'A'; - - snprintf(buf, sizeof(buf), "adm5120_uart, channel %c", ch); - device_set_desc_copy(sc->sc_dev, buf); - - return (0); -} - -static int -adm5120_uart_bus_receive(struct uart_softc *sc) -{ - struct uart_bas *bas; - int xc; - uint8_t fr, rsr; - - bas = &sc->sc_bas; - uart_lock(sc->sc_hwmtx); - fr = uart_getreg(bas, UART_FR_REG); - while (!(fr & UART_FR_RX_FIFO_EMPTY)) { - if (uart_rx_full(sc)) { - sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; - break; - } - xc = 0; - rsr = uart_getreg(bas, UART_RSR_REG); - if (rsr & UART_RSR_FE) - xc |= UART_STAT_FRAMERR; - if (rsr & UART_RSR_PE) - xc |= UART_STAT_PARERR; - if (rsr & UART_RSR_OE) - xc |= UART_STAT_OVERRUN; - xc |= uart_getreg(bas, UART_DR_REG); - uart_barrier(bas); - uart_rx_put(sc, xc); - if (rsr & (UART_RSR_FE | UART_RSR_PE | UART_RSR_OE)) { - uart_setreg(bas, UART_ECR_REG, UART_ECR_RSR); - uart_barrier(bas); - } - fr = uart_getreg(bas, UART_FR_REG); - } - - /* Discard everything left in the Rx FIFO. */ - while (!(fr & UART_FR_RX_FIFO_EMPTY)) { - ( void)uart_getreg(bas, UART_DR_REG); - uart_barrier(bas); - rsr = uart_getreg(bas, UART_RSR_REG); - if (rsr & (UART_RSR_FE | UART_RSR_PE | UART_RSR_OE)) { - uart_setreg(bas, UART_ECR_REG, UART_ECR_RSR); - uart_barrier(bas); - } - fr = uart_getreg(bas, UART_FR_REG); - } - uart_unlock(sc->sc_hwmtx); - return (0); -} - -static int -adm5120_uart_bus_setsig(struct uart_softc *sc, int sig) -{ - - /* TODO: implement (?) */ - return (0); -} - -static int -adm5120_uart_bus_transmit(struct uart_softc *sc) -{ - struct uart_bas *bas; - - bas = &sc->sc_bas; - uart_lock(sc->sc_hwmtx); - sc->sc_txbusy = 1; - for (int i = 0; i < sc->sc_txdatasz; i++) { - if (uart_getreg(bas, UART_FR_REG) & UART_FR_TX_FIFO_FULL) - break; - uart_setreg(bas, UART_DR_REG, sc->sc_txbuf[i]); - } - - /* Enable TX interrupt */ - adm5120_uart_enable_txintr(sc); - uart_unlock(sc->sc_hwmtx); - return (0); -} - -static void -adm5120_uart_bus_grab(struct uart_softc *sc) -{ - - /* Enable interrupts - no RX_INT or RX_TIMEOUT */ - uart_lock(sc->sc_hwmtx); - uart_setreg(&sc->sc_bas, UART_CR_REG, - UART_CR_PORT_EN | UART_CR_MODEM_STATUS_INT_EN); - uart_unlock(sc->sc_hwmtx); -} - -static void -adm5120_uart_bus_ungrab(struct uart_softc *sc) -{ - - /* Enable interrupts */ - uart_lock(sc->sc_hwmtx); - uart_setreg(&sc->sc_bas, UART_CR_REG, - UART_CR_PORT_EN|UART_CR_RX_INT_EN|UART_CR_RX_TIMEOUT_INT_EN| - UART_CR_MODEM_STATUS_INT_EN); - uart_unlock(sc->sc_hwmtx); -} diff --git a/sys/mips/adm5120/uart_dev_adm5120.h b/sys/mips/adm5120/uart_dev_adm5120.h deleted file mode 100644 index e63434be360e..000000000000 --- a/sys/mips/adm5120/uart_dev_adm5120.h +++ /dev/null @@ -1,82 +0,0 @@ -/* $NetBSD: uart.h,v 1.1 2007/03/20 08:52:02 dyoung Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * 3. The names of the authors may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A - * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * $FreeBSD$ - */ -#ifndef _ADMUART_H -#define _ADMUART_H -/* UART registers */ -#define UART_DR_REG 0x00 -#define UART_RSR_REG 0x04 -#define UART_RSR_FE 0x01 -#define UART_RSR_PE 0x02 -#define UART_RSR_BE 0x04 -#define UART_RSR_OE 0x08 -#define UART_ECR_REG 0x04 -#define UART_ECR_RSR 0x80 -#define UART_LCR_H_REG 0x08 -#define UART_LCR_H_FEN 0x10 -#define UART_LCR_M_REG 0x0c -#define UART_LCR_L_REG 0x10 -#define UART_CR_REG 0x14 -#define UART_CR_PORT_EN 0x01 -#define UART_CR_SIREN 0x02 -#define UART_CR_SIRLP 0x04 -#define UART_CR_MODEM_STATUS_INT_EN 0x08 -#define UART_CR_RX_INT_EN 0x10 -#define UART_CR_TX_INT_EN 0x20 -#define UART_CR_RX_TIMEOUT_INT_EN 0x40 -#define UART_CR_LOOPBACK_EN 0x80 -#define UART_FR_REG 0x18 -#define UART_FR_CTS 0x01 -#define UART_FR_DSR 0x02 -#define UART_FR_DCD 0x04 -#define UART_FR_BUSY 0x08 -#define UART_FR_RX_FIFO_EMPTY 0x10 -#define UART_FR_TX_FIFO_FULL 0x20 -#define UART_FR_RX_FIFO_FULL 0x40 -#define UART_FR_TX_FIFO_EMPTY 0x80 -#define UART_IR_REG 0x1c -#define UART_IR_MODEM_STATUS_INT 0x01 -#define UART_IR_RX_INT 0x02 -#define UART_IR_TX_INT 0x04 -#define UART_IR_RX_TIMEOUT_INT 0x08 -#define UART_IR_INT_MASK 0x0f -#define UART_IR_UICR 0x80 -#define UART_ILPR_REG 0x20 - -/* UART interrupts */ - -int uart_cnattach(void); -#endif /* _ADMUART_H */ diff --git a/sys/mips/conf/ADM5120 b/sys/mips/conf/ADM5120 deleted file mode 100644 index 7990e56f8cc2..000000000000 --- a/sys/mips/conf/ADM5120 +++ /dev/null @@ -1,65 +0,0 @@ -# ADM5120 -- Kernel configuration file for FreeBSD/mips for adm5120 systems -# -# For more information on this file, please read the handbook section on -# Kernel Configuration Files: -# -# https://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html -# -# The handbook is also available locally in /usr/share/doc/handbook -# if you've installed the doc distribution, otherwise always see the -# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the -# latest information. -# -# An exhaustive list of options and more detailed explanations of the -# device lines is also present in the ../../conf/NOTES and NOTES files. -# If you are in doubt as to the purpose or necessity of a line, check first -# in NOTES. -# -# $FreeBSD$ - -ident ADM5120 - -# Don't build any modules yet. -makeoptions MODULES_OVERRIDE="" - -include "../adm5120/std.adm5120" - -hints "ADM5120.hints" #Default places to look for devices. - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols - -options DDB -options KDB - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -options TCP_HHOOK # hhook(9) framework for TCP -options NFSCL #Network Filesystem Client -options NFS_ROOT #NFS usable as /, requires NFSCL -options PSEUDOFS #Pseudo-filesystem framework -#options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -options BOOTP -options BOOTP_NFSROOT -options BOOTP_NFSV3 -options BOOTP_WIRED_TO=admsw0 -options BOOTP_COMPAT - -#options FFS #Berkeley Fast Filesystem -#options SOFTUPDATES #Enable FFS soft updates support -#options UFS_ACL #Support for access control lists -#options UFS_DIRHASH #Improve performance on big directories -options ROOTDEVNAME=\"nfs:10.0.0.1:/mnt/bsd\" - -# Debugging for use in -current -#options DEADLKRES #Enable the deadlock resolver -options INVARIANTS #Enable calls of extra sanity checking -options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS -#options WITNESS #Enable checks to detect deadlocks and cycles -#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed - -device loop -device ether -device uart -nodevice uart_ns8250 # ADM5120's UART not 16550-like -# device md diff --git a/sys/mips/conf/QEMU b/sys/mips/conf/QEMU deleted file mode 100644 index ca46c22641b8..000000000000 --- a/sys/mips/conf/QEMU +++ /dev/null @@ -1,56 +0,0 @@ -# QEMU -- Generic kernel configuration file for FreeBSD/mips -# -# For more information on this file, please read the handbook section on -# Kernel Configuration Files: -# -# https://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html -# -# The handbook is also available locally in /usr/share/doc/handbook -# if you've installed the doc distribution, otherwise always see the -# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the -# latest information. -# -# An exhaustive list of options and more detailed explanations of the -# device lines is also present in the ../../conf/NOTES and NOTES files. -# If you are in doubt as to the purpose or necessity of a line, check first -# in NOTES. -# -# $FreeBSD$ - -cpu CPU_MIPS32 -ident QEMU - -# Don't build any modules yet. -makeoptions MODULES_OVERRIDE="" - -include "../adm5120/std.adm5120" - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols - -options DDB -options KDB - -options SCHED_4BSD #4BSD scheduler -options VIMAGE # Subsystem virtualization, e.g. VNET -options INET #InterNETworking -options TCP_HHOOK # hhook(9) framework for TCP -options NFSCL #Network Filesystem Client -options NFS_ROOT #NFS usable as /, requires NFSCL -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -# Debugging for use in -current -#options DEADLKRES #Enable the deadlock resolver -#options INVARIANTS #Enable calls of extra sanity checking -#options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS -#options WITNESS #Enable checks to detect deadlocks and cycles -#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed - -# The `bpf' device enables the Berkeley Packet Filter. -# Be aware of the administrative consequences of enabling this! -# Note that 'bpf' is required for DHCP. -device bpf # Berkeley packet filter - -device loop -device ether -device md