Import DTS from Linux 4.20

MFC after:	2 months
This commit is contained in:
manu 2019-01-11 09:40:34 +00:00
commit adcbc2aaa7
540 changed files with 31211 additions and 6622 deletions

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@ -379,7 +379,7 @@
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "mii";
};
@ -396,6 +396,10 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&mmc1 {

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@ -7,6 +7,7 @@
*/
#include <dt-bindings/display/tda998x.h>
#include <dt-bindings/interrupt-controller/irq.h>
&ldo3_reg {
regulator-min-microvolt = <1800000>;
@ -88,9 +89,11 @@
};
&i2c0 {
tda19988: tda19988 {
tda19988: tda19988@70 {
compatible = "nxp,tda998x";
reg = <0x70>;
nxp,calib-gpios = <&gpio1 25 0>;
interrupts-extended = <&gpio1 25 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default", "off";
pinctrl-0 = <&nxp_hdmi_bonelt_pins>;

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@ -140,10 +140,14 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "rmii";
};

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@ -486,10 +486,14 @@ status = "okay";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid";
};

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@ -713,6 +713,7 @@
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
slaves = <1>;
};
&davinci_mdio {
@ -720,15 +721,14 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-mode = "rgmii-txid";
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid";
};

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@ -639,16 +639,24 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-handle = <&ethphy1>;
phy-mode = "rgmii-txid";
dual_emac_res_vlan = <2>;
};

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@ -102,15 +102,24 @@
&davinci_mdio {
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "rmii";
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-handle = <&ethphy1>;
phy-mode = "rmii";
};

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@ -317,13 +317,13 @@
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <5>;
phy-handle = <&ethphy0>;
phy-mode = "rmii";
dual_emac_res_vlan = <2>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <4>;
phy-handle = <&ethphy1>;
phy-mode = "rmii";
dual_emac_res_vlan = <3>;
};
@ -345,6 +345,14 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@5 {
reg = <5>;
};
ethphy1: ethernet-phy@4 {
reg = <4>;
};
};
&mmc1 {

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@ -0,0 +1,249 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2018 MOXA Inc. - https://www.moxa.com/
*
* Authors: SZ Lin (林上智) <sz.lin@moxa.com>
* Wes Huang (黃淵河) <wes.huang@moxa.com>
* Fero JD Zhou (周俊達) <FeroJD.Zhou@moxa.com>
*/
#include "am33xx.dtsi"
/ {
vbat: vbat-regulator {
compatible = "regulator-fixed";
};
/* Power supply provides a fixed 3.3V @3A */
vmmcsd_fixed: vmmcsd-regulator {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
buttons: push_button {
compatible = "gpio-keys";
};
};
&am33xx_pinmux {
pinctrl-names = "default";
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
push_button_pins: pinmux_push_button {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.gpio2_23 */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
mmc1_pins_default: pinmux_mmc1_pins {
pinctrl-single,pins = <
/* eMMC */
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad12.mmc1_dat0 */
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad13.mmc1_dat1 */
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad14.mmc1_dat2 */
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad15.mmc1_dat3 */
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad8.mmc1_dat4 */
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad9.mmc1_dat5 */
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad10.mmc1_dat6 */
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad11.mmc1_dat7 */
AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
>;
};
spi0_pins: pinmux_spi0 {
pinctrl-single,pins = <
AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
>;
};
};
&uart0 {
/* Console */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
eeprom: eeprom@50 {
compatible = "atmel,24c16";
pagesize = <16>;
reg = <0x50>;
};
rtc_wdt: rtc_wdt@68 {
compatible = "dallas,ds1374";
reg = <0x68>;
};
};
&usb {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb0_phy {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "host";
};
&cppi41dma {
status = "okay";
};
/* Power */
&vbat {
regulator-name = "vbat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
&mac {
pinctrl-names = "default";
pinctrl-0 = <&cpsw_default>;
status = "okay";
};
&davinci_mdio {
pinctrl-names = "default";
pinctrl-0 = <&davinci_mdio_default>;
status = "okay";
};
&cpsw_emac0 {
status = "okay";
};
&cpsw_emac1 {
status = "okay";
};
&phy_sel {
reg= <0x44e10650 0xf5>;
rmii-clock-ext;
};
&sham {
status = "okay";
};
&aes {
status = "okay";
};
&gpio0 {
ti,no-reset-on-init;
};
&mmc2 {
pinctrl-names = "default";
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <8>;
pinctrl-0 = <&mmc1_pins_default>;
ti,non-removable;
status = "okay";
};
&buttons {
pinctrl-names = "default";
pinctrl-0 = <&push_button_pins>;
#address-cells = <1>;
#size-cells = <0>;
button@0 {
label = "push_button";
linux,code = <0x100>;
gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
};
};
/* SPI Busses */
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
m25p80@0 {
compatible = "mx25l6405d";
spi-max-frequency = <40000000>;
reg = <0>;
spi-cpol;
spi-cpha;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* reg : The partition's offset and size within the mtd bank. */
partitions@0 {
label = "MLO";
reg = <0x0 0x80000>;
};
partitions@1 {
label = "U-Boot";
reg = <0x80000 0x100000>;
};
partitions@2 {
label = "U-Boot Env";
reg = <0x180000 0x40000>;
};
};
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
tpm_spi_tis@0 {
compatible = "tcg,tpm_tis-spi";
reg = <0>;
spi-max-frequency = <500000>;
};
};

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@ -0,0 +1,69 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2018 MOXA Inc. - https://www.moxa.com/
*
* Authors: SZ Lin (林上智) <sz.lin@moxa.com>
* Wes Huang (黃淵河) <wes.huang@moxa.com>
* Fero JD Zhou (周俊達) <FeroJD.Zhou@moxa.com>
*/
/dts-v1/;
#include "am335x-moxa-uc-2100-common.dtsi"
/ {
model = "Moxa UC-2101";
compatible = "moxa,uc-2101", "ti,am33xx";
leds {
compatible = "gpio-leds";
led1 {
label = "UC2100:GREEN:USER";
gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
};
&am33xx_pinmux {
pinctrl-names = "default";
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mii1_refclk.rmii1_refclk */
>;
};
spi1_pins: pinmux_spi1 {
pinctrl-single,pins = <
AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE4) /* ecap0_in_pwm0_out.spi1_sclk */
AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE4) /* uart1_ctsn.spi1_cs0 */
AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE4) /* uart0_ctsn.spi1_d0 */
AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE4) /* uart0_rtsn.spi1_d1 */
>;
};
};
&davinci_mdio {
phy0: ethernet-phy@4 {
reg = <4>;
};
};
&cpsw_emac0 {
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rmii";
};
&cpsw_emac1 {
status = "disabled";
};

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@ -422,18 +422,26 @@
pinctrl-names = "default";
pinctrl-0 = <&davinci_mdio_default>;
status = "okay";
ethphy0: ethernet-phy@4 {
reg = <4>;
};
ethphy1: ethernet-phy@5 {
reg = <5>;
};
};
&cpsw_emac0 {
status = "okay";
phy_id = <&davinci_mdio>, <4>;
phy-handle = <&ethphy0>;
phy-mode = "rmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
status = "okay";
phy_id = <&davinci_mdio>, <5>;
phy-handle = <&ethphy1>;
phy-mode = "rmii";
dual_emac_res_vlan = <2>;
};

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@ -380,16 +380,24 @@
&davinci_mdio {
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "mii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-handle = <&ethphy1>;
phy-mode = "mii";
dual_emac_res_vlan = <2>;
};

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@ -161,7 +161,7 @@
invensense,key = [4e cc 7e eb f6 1e 35 22 00 34 0d 65 32 e9 94 89];*/
};
bmp280: pressure@78 {
bmp280: pressure@76 {
compatible = "bosch,bmp280";
reg = <0x76>;
};
@ -424,7 +424,7 @@
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <4>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid";
};
@ -441,6 +441,10 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@4 {
reg = <4>;
};
};
&mmc1 {

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@ -373,7 +373,7 @@
ti,pindir-d0-out-d1-in;
status = "okay";
cfaf240320a032t {
display-controller@0 {
compatible = "orisetech,otm3225a";
reg = <0>;
spi-max-frequency = <1000000>;
@ -533,16 +533,24 @@
pinctrl-names = "default";
pinctrl-0 = <&davinci_mdio_default>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "mii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-handle = <&ethphy1>;
phy-mode = "mii";
dual_emac_res_vlan = <2>;
};

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@ -265,13 +265,13 @@
/* Ethernet */
&cpsw_emac0 {
status = "okay";
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
};
&cpsw_emac1 {
status = "okay";
phy_id = <&davinci_mdio>, <1>;
phy-handle = <&ethphy1>;
phy-mode = "rgmii";
};
@ -279,6 +279,14 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
&mac {

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@ -103,10 +103,14 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid";
};

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@ -206,7 +206,6 @@
status = "okay";
slaves = <1>;
cpsw_emac0: slave@4a100200 {
phy_id = <&davinci_mdio>, <0>;
phy-mode = "mii";
phy-handle = <&ethernetphy0>;
};

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@ -0,0 +1,220 @@
/*
* Copyright (C) 2018 Logic PD, Inc - http://www.logicpd.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <dt-bindings/input/input.h>
/ {
codec1 {
compatible = "simple-audio-card";
simple-audio-card,name = "tlv320aic23-hifi";
simple-audio-card,widgets =
"Microphone", "Mic In",
"Line", "Line In",
"Line", "Line Out";
simple-audio-card,routing =
"Line Out", "LOUT",
"Line Out", "ROUT",
"LLINEIN", "Line In",
"RLINEIN", "Line In",
"MICIN", "Mic In";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound_master>;
simple-audio-card,frame-master = <&sound_master>;
simple-audio-card,cpu {
sound-dai = <&mcbsp1>;
};
sound_master: simple-audio-card,codec {
sound-dai = <&tlv320aic23_1>;
system-clock-frequency = <12000000>;
};
};
codec2 {
compatible = "simple-audio-card";
simple-audio-card,name = "tlv320aic23-hifi";
simple-audio-card,widgets =
"Microphone", "Mic In",
"Line", "Line In",
"Line", "Line Out";
simple-audio-card,routing =
"Line Out", "LOUT",
"Line Out", "ROUT",
"LLINEIN", "Line In",
"RLINEIN", "Line In",
"MICIN", "Mic In";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound_master2>;
simple-audio-card,frame-master = <&sound_master2>;
simple-audio-card,cpu {
sound-dai = <&mcbsp2>;
};
sound_master2: simple-audio-card,codec {
sound-dai = <&tlv320aic23_2>;
system-clock-frequency = <12000000>;
};
};
expander-keys {
compatible = "gpio-keys-polled";
poll-interval = <100>;
record {
label = "Record";
/* linux,code = <BTN_0>; */
gpios = <&tca6416_2 15 GPIO_ACTIVE_LOW>;
};
play {
label = "Play";
linux,code = <KEY_PLAY>;
gpios = <&tca6416_2 14 GPIO_ACTIVE_LOW>;
};
Stop {
label = "Stop";
linux,code = <KEY_STOP>;
gpios = <&tca6416_2 13 GPIO_ACTIVE_LOW>;
};
fwd {
label = "FWD";
linux,code = <KEY_FASTFORWARD>;
gpios = <&tca6416_2 12 GPIO_ACTIVE_LOW>;
};
rwd {
label = "RWD";
linux,code = <KEY_REWIND>;
gpios = <&tca6416_2 11 GPIO_ACTIVE_LOW>;
};
shift {
label = "Shift";
linux,code = <KEY_LEFTSHIFT>;
gpios = <&tca6416_2 10 GPIO_ACTIVE_LOW>;
};
Mode {
label = "Mode";
linux,code = <BTN_MODE>;
gpios = <&tca6416_2 9 GPIO_ACTIVE_LOW>;
};
Menu {
label = "Menu";
linux,code = <KEY_MENU>;
gpios = <&tca6416_2 8 GPIO_ACTIVE_LOW>;
};
Up {
label = "Up";
linux,code = <KEY_UP>;
gpios = <&tca6416_2 7 GPIO_ACTIVE_LOW>;
};
Down {
label = "Down";
linux,code = <KEY_DOWN>;
gpios = <&tca6416_2 6 GPIO_ACTIVE_LOW>;
};
};
};
&i2c2 {
/* Audio codecs */
tlv320aic23_1: codec@1a {
compatible = "ti,tlv320aic23";
reg = <0x1a>;
#sound-dai-cells= <0>;
status = "okay";
};
tlv320aic23_2: codec@1b {
compatible = "ti,tlv320aic23";
reg = <0x1b>;
#sound-dai-cells= <0>;
status = "okay";
};
};
&i2c3 {
/* Audio codecs */
tlv320aic23_3: codec@1a {
compatible = "ti,tlv320aic23";
reg = <0x1a>;
#sound-dai-cells= <0>;
status = "okay";
};
/* GPIO Expanders */
tca6416_2: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
vcc-supply = <&vdd_io_reg>;
};
tca6416_3: gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
vcc-supply = <&vdd_io_reg>;
};
/* TVP5146 Analog Video decoder input */
tvp5146@5c {
compatible = "ti,tvp5146m2";
reg = <0x5c>;
};
};
&mcbsp1 {
status = "ok";
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mcbsp1_pins>;
};
&mcbsp2 {
status = "ok";
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mcbsp2_pins>;
};
&omap3_pmx_core {
mcbsp1_pins: pinmux_mcbsp1_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dx */
OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dr */
OMAP3_CORE1_IOPAD(0x2196, PIN_INPUT | MUX_MODE0) /* mcbsp_clks.mcbsp1_fsx */
OMAP3_CORE1_IOPAD(0x2198, PIN_INPUT | MUX_MODE0) /* mcbsp1_clkx.mcbsp1_clkx */
>;
};
mcbsp2_pins: pinmux_mcbsp2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
>;
};
};

View File

@ -9,6 +9,7 @@
#include "am3517.dtsi"
#include "am3517-som.dtsi"
#include "am3517-evm-ui.dtsi"
#include <dt-bindings/input/input.h>
/ {
@ -227,7 +228,7 @@
vmmc-supply = <&vmmc_fixed>;
bus-width = <4>;
wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */
cd-gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>; /* gpio_127 */
cd-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>; /* gpio_127 */
};
&mmc3 {

View File

@ -163,7 +163,7 @@
compatible = "ti,wl1271";
reg = <2>;
interrupt-parent = <&gpio6>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; /* gpio_170 */
interrupts = <10 IRQ_TYPE_EDGE_RISING>; /* gpio_170 */
ref-clock-frequency = <26000000>;
tcxo-clock-frequency = <26000000>;
};

View File

@ -1101,7 +1101,7 @@
};
};
qspi: qspi@47900000 {
qspi: spi@47900000 {
compatible = "ti,am4372-qspi";
reg = <0x47900000 0x100>,
<0x30000000 0x4000000>;

View File

@ -339,16 +339,24 @@
pinctrl-names = "default";
pinctrl-0 = <&davinci_mdio_default>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-handle = <&ethphy1>;
phy-mode = "rgmii-txid";
dual_emac_res_vlan = <2>;
};

View File

@ -831,10 +831,14 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
};

View File

@ -499,10 +499,14 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
};

View File

@ -799,16 +799,24 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@4 {
reg = <4>;
};
ethphy1: ethernet-phy@5 {
reg = <5>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <4>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <5>;
phy-handle = <&ethphy1>;
phy-mode = "rgmii";
dual_emac_res_vlan = <2>;
};

View File

@ -575,10 +575,14 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@16 {
reg = <16>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <16>;
phy-handle = <&ethphy0>;
phy-mode = "rmii";
};

View File

@ -64,6 +64,82 @@
linux,default-trigger = "mmc0";
};
};
idk-leds {
status = "disabled";
compatible = "gpio-leds";
red0-led {
label = "idk:red0";
gpios = <&gpio6 19 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green0-led {
label = "idk:green0";
gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue0-led {
label = "idk:blue0";
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
red1-led {
label = "idk:red1";
gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green1-led {
label = "idk:green1";
gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue1-led {
label = "idk:blue1";
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
red2-led {
label = "idk:red2";
gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green2-led {
label = "idk:green2";
gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue2-led {
label = "idk:blue2";
gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
red3-led {
label = "idk:red3";
gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green3-led {
label = "idk:green3";
gpios = <&gpio7 25 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue3-led {
label = "idk:blue3";
gpios = <&gpio7 24 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
};
&extcon_usb2 {
@ -71,6 +147,10 @@
vbus-gpio = <&gpio7 22 GPIO_ACTIVE_HIGH>;
};
&sn65hvs882 {
load-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
};
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
@ -114,7 +194,3 @@
pinctrl-1 = <&mmc2_pins_hs>;
pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
};
&cpu0 {
vdd-supply = <&smps12_reg>;
};

View File

@ -55,6 +55,82 @@
linux,default-trigger = "mmc0";
};
};
idk-leds {
status = "disabled";
compatible = "gpio-leds";
red0-led {
label = "idk:red0";
gpios = <&gpio6 19 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green0-led {
label = "idk:green0";
gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue0-led {
label = "idk:blue0";
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
red1-led {
label = "idk:red1";
gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green1-led {
label = "idk:green1";
gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue1-led {
label = "idk:blue1";
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
red2-led {
label = "idk:red2";
gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green2-led {
label = "idk:green2";
gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue2-led {
label = "idk:blue2";
gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
red3-led {
label = "idk:red3";
gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green3-led {
label = "idk:green3";
gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue3-led {
label = "idk:blue3";
gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
};
&extcon_usb2 {

View File

@ -36,7 +36,3 @@
pinctrl-1 = <&mmc2_pins_hs>;
pinctrl-2 = <&mmc2_pins_ddr_rev20>;
};
&cpu0 {
vdd-supply = <&smps12_reg>;
};

View File

@ -518,7 +518,7 @@
};
/* touch controller */
ads7846@0 {
touchscreen@1 {
pinctrl-names = "default";
pinctrl-0 = <&ads7846_pins>;
@ -558,13 +558,13 @@
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid";
dual_emac_res_vlan = <0>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-handle = <&ethphy1>;
phy-mode = "rgmii-txid";
dual_emac_res_vlan = <1>;
};
@ -573,6 +573,14 @@
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_pins_default>;
pinctrl-1 = <&davinci_mdio_pins_sleep>;
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
&usb2_phy1 {

View File

@ -372,17 +372,27 @@
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-handle = <&ethphy1>;
phy-mode = "rgmii";
dual_emac_res_vlan = <2>;
};
&davinci_mdio {
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
&usb2_phy1 {
phy-supply = <&ldousb_reg>;
};
@ -478,3 +488,7 @@
};
};
};
&cpu0 {
vdd-supply = <&smps12_reg>;
};

View File

@ -371,7 +371,7 @@
clock-names = "uartclk", "apb_pclk";
};
ssp: ssp@1000d000 {
ssp: spi@1000d000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x1000d000 0x1000>;
clocks = <&sspclk>, <&pclk>;

View File

@ -45,7 +45,7 @@
};
/* The voltage to the MMC card is hardwired at 3.3V */
vmmc: fixedregulator@0 {
vmmc: regulator-vmmc {
compatible = "regulator-fixed";
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
@ -53,7 +53,7 @@
regulator-boot-on;
};
veth: fixedregulator@0 {
veth: regulator-veth {
compatible = "regulator-fixed";
regulator-name = "veth";
regulator-min-microvolt = <3300000>;
@ -380,7 +380,7 @@
clock-names = "apb_pclk";
};
pb1176_ssp: ssp@1010b000 {
pb1176_ssp: spi@1010b000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x1010b000 0x1000>;
interrupt-parent = <&intc_dc1176>;

View File

@ -145,7 +145,7 @@
};
/* The voltage to the MMC card is hardwired at 3.3V */
vmmc: fixedregulator@0 {
vmmc: regulator-vmmc {
compatible = "regulator-fixed";
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
@ -153,7 +153,7 @@
regulator-boot-on;
};
veth: fixedregulator@0 {
veth: regulator-veth {
compatible = "regulator-fixed";
regulator-name = "veth";
regulator-min-microvolt = <3300000>;
@ -523,7 +523,7 @@
clock-names = "uartclk", "apb_pclk";
};
ssp@1000d000 {
spi@1000d000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x1000d000 0x1000>;
interrupt-parent = <&intc_pb11mp>;

View File

@ -362,7 +362,7 @@
clock-names = "uartclk", "apb_pclk";
};
ssp: ssp@1000d000 {
ssp: spi@1000d000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x1000d000 0x1000>;
clocks = <&sspclk>, <&pclk>;

View File

@ -0,0 +1,155 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Device Tree file for Marvell Armada 385 AMC board
* (DB-88F6820-AMC)
*
* Copyright (C) 2017 Allied Telesis Labs
*/
/dts-v1/;
#include "armada-385.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Marvell Armada 385 AMC";
compatible = "marvell,a385-db-amc", "marvell,armada385", "marvell,armada380";
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
ethernet0 = &eth0;
ethernet1 = &eth1;
spi1 = &spi1;
};
memory {
device_type = "memory";
reg = <0x00000000 0x80000000>; /* 2GB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
};
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
};
&uart0 {
/*
* Exported on the micro USB connector CON3
* through an FTDI
*/
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&eth0 {
pinctrl-names = "default";
/*
* The Reference Clock 0 is used to provide a
* clock to the PHY
*/
pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
&eth2 {
status = "okay";
phy = <&phy1>;
phy-mode = "sgmii";
};
&usb0 {
status = "okay";
};
&mdio {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
phy0: ethernet-phy@1 {
reg = <1>;
};
phy1: ethernet-phy@0 {
reg = <0>;
};
};
&nand_controller {
status = "okay";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
nand-on-flash-bbt;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x00000000 0x40000000>;
label = "user";
};
};
};
};
&pciec {
status = "okay";
};
&pcie1 {
/* Port 0, Lane 0 */
status = "okay";
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <50000000>;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x00000000 0x00100000>;
label = "u-boot";
};
partition@100000 {
reg = <0x00100000 0x00040000>;
label = "u-boot-env";
};
};
};
};
&refclk {
clock-frequency = <20000000>;
};

View File

@ -48,7 +48,7 @@
&clearfog_sdhci_cd_pins>;
pinctrl-names = "default";
status = "okay";
vmmc = <&reg_3p3v>;
vmmc-supply = <&reg_3p3v>;
wp-inverted;
};

View File

@ -189,7 +189,7 @@
};
};
nand: nand@d0000 {
nand_controller: nand-controller@d0000 {
clocks = <&dfx_coredivclk 0>;
};
@ -243,7 +243,7 @@
ranges = <0 MBUS_ID(0x03, 0x00) 0 0x100000>;
pp0: packet-processor@0 {
compatible = "marvell,prestera-98dx3236";
compatible = "marvell,prestera-98dx3236", "marvell,prestera";
reg = <0 0x4000000>;
interrupts = <33>, <34>, <35>;
dfx = <&dfx>;

View File

@ -35,5 +35,5 @@
};
&pp0 {
compatible = "marvell,prestera-98dx3336";
compatible = "marvell,prestera-98dx3336", "marvell,prestera";
};

View File

@ -49,6 +49,6 @@
};
&pp0 {
compatible = "marvell,prestera-98dx4251";
compatible = "marvell,prestera-98dx4251", "marvell,prestera";
interrupts = <33>, <34>, <35>, <36>;
};

View File

@ -68,14 +68,18 @@
status = "okay";
};
&nand {
&nand_controller {
status = "okay";
label = "pxa3xx_nand-0";
num-cs = <1>;
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
};
};
&sdio {

View File

@ -67,14 +67,18 @@
status = "okay";
};
&nand {
&nand_controller {
status = "okay";
label = "pxa3xx_nand-0";
num-cs = <1>;
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
};
};
&spi0 {

View File

@ -0,0 +1,207 @@
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "HXT StarDragon 4800 REP2 AST2520";
compatible = "hxt,stardragon4800-rep2-bmc", "aspeed,ast2500";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory@80000000 {
reg = <0x80000000 0x40000000>;
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 8>;
};
iio-hwmon-battery {
compatible = "iio-hwmon";
io-channels = <&adc 7>;
};
leds {
compatible = "gpio-leds";
system_fault1 {
label = "System_fault1";
gpios = <&gpio ASPEED_GPIO(I, 3) GPIO_ACTIVE_LOW>;
};
system_fault2 {
label = "System_fault2";
gpios = <&gpio ASPEED_GPIO(I, 2) GPIO_ACTIVE_LOW>;
};
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "openbmc-flash-layout.dtsi"
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
};
};
&spi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2ck_default
&pinctrl_spi2miso_default
&pinctrl_spi2mosi_default
&pinctrl_spi2cs0_default>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
current-speed = <115200>;
};
&uart5 {
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii2_default>;
use-ncsi;
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
tmp421@1e {
compatible = "ti,tmp421";
reg = <0x1e>;
};
tmp421@2a {
compatible = "ti,tmp421";
reg = <0x2a>;
};
tmp421@1c {
compatible = "ti,tmp421";
reg = <0x1c>;
};
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
tmp421@1f {
compatible = "ti,tmp421";
reg = <0x1f>;
};
nvt210@4c {
compatible = "nvt210";
reg = <0x4c>;
};
eeprom@50 {
compatible = "atmel,24c128";
reg = <0x50>;
pagesize = <128>;
};
};
&i2c7 {
status = "okay";
};
&i2c8 {
status = "okay";
pca9641@70 {
compatible = "nxp,pca9641";
reg = <0x70>;
i2c-arb {
#address-cells = <1>;
#size-cells = <0>;
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
};
dps650ab@58 {
compatible = "dps650ab";
reg = <0x58>;
};
};
};
};
&i2c9 {
status = "okay";
};
&vuart {
status = "okay";
};
&gfx {
status = "okay";
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
&gpio {
pin_gpio_c7 {
gpio-hog;
gpios = <ASPEED_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "BIOS_SPI_MUX_S";
};
pin_gpio_d1 {
gpio-hog;
gpios = <ASPEED_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PHY2_RESET_N";
};
};

View File

@ -0,0 +1,146 @@
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2018 Facebook Inc.
// Author: Vijay Khemka <vijaykhemka@fb.com>
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "Facebook TiogaPass BMC";
compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
aliases {
serial0 = &uart1;
serial4 = &uart5;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
#include "openbmc-flash-layout.dtsi"
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
};
};
&uart1 {
// Host Console
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&uart5 {
// BMC Console
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
use-ncsi;
};
&i2c0 {
status = "okay";
//Airmax Conn B, CPU0 PIROM, CPU1 PIROM
};
&i2c1 {
status = "okay";
//X24 Riser
};
&i2c2 {
status = "okay";
// Mezz Management SMBus
};
&i2c3 {
status = "okay";
// SMBus to Board ID EEPROM
};
&i2c4 {
status = "okay";
// BMC Debug Header
};
&i2c5 {
status = "okay";
// CPU Voltage regulators
};
&i2c6 {
status = "okay";
tpm@20 {
compatible = "infineon,slb9645tt";
reg = <0x20>;
};
tmp421@4e {
compatible = "ti,tmp421";
reg = <0x4e>;
};
tmp421@4f {
compatible = "ti,tmp421";
reg = <0x4f>;
};
eeprom@54 {
compatible = "atmel,24c64";
reg = <0x54>;
pagesize = <32>;
};
};
&i2c7 {
status = "okay";
//HSC, AirMax Conn A
};
&i2c8 {
status = "okay";
//Mezz Sensor SMBus
};
&i2c9 {
status = "okay";
//USB Debug Connector
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@1 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
};
};

View File

@ -7,6 +7,25 @@
model = "Quanta Q71L BMC";
compatible = "quanta,q71l-bmc", "aspeed,ast2400";
aliases {
i2c14 = &i2c_pcie2;
i2c15 = &i2c_pcie3;
i2c16 = &i2c_pcie6;
i2c17 = &i2c_pcie7;
i2c18 = &i2c_pcie1;
i2c19 = &i2c_pcie4;
i2c20 = &i2c_pcie5;
i2c21 = &i2c_pcie8;
i2c22 = &i2c_pcie9;
i2c23 = &i2c_pcie10;
i2c24 = &i2c_ssd1;
i2c25 = &i2c_ssd2;
i2c26 = &i2c_psu4;
i2c27 = &i2c_psu1;
i2c28 = &i2c_psu3;
i2c29 = &i2c_psu2;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
@ -93,6 +112,10 @@
&pinctrl_ddcclk_default &pinctrl_ddcdat_default>;
};
&ibt {
status = "okay";
};
&lpc_snoop {
status = "okay";
snoop-ports = <0x80>;
@ -299,24 +322,44 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
psu@59 {
compatible = "pmbus";
reg = <0x59>;
};
};
i2c_psu1: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
psu@58 {
compatible = "pmbus";
reg = <0x58>;
};
};
i2c_psu3: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
psu@58 {
compatible = "pmbus";
reg = <0x58>;
};
};
i2c_psu2: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
psu@59 {
compatible = "pmbus";
reg = <0x59>;
};
};
};
@ -345,6 +388,10 @@
status = "okay";
};
&adc {
status = "okay";
};
&pwm_tacho {
status = "okay";

View File

@ -350,7 +350,7 @@
status = "disabled";
};
i2c: i2c@1e78a000 {
i2c: bus@1e78a000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;

View File

@ -410,7 +410,7 @@
status = "disabled";
};
i2c: i2c@1e78a000 {
i2c: bus@1e78a000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;

View File

@ -70,9 +70,9 @@
&i2c1 {
status = "okay";
eeprom@87 {
eeprom@57 {
compatible = "giantec,gt24c32a", "atmel,24c32";
reg = <87>;
reg = <0x57>;
pagesize = <32>;
};
};

View File

@ -59,9 +59,9 @@
&i2c1 {
status = "okay";
ft5426@56 {
ft5426@38 {
compatible = "focaltech,ft5426", "edt,edt-ft5406";
reg = <56>;
reg = <0x38>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_ctp_int>;

View File

@ -16,46 +16,6 @@
compatible = "axentia,nattis-2", "axentia,natte-2", "axentia,linea",
"atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
ahb {
apb {
pinctrl@fffff200 {
nattis {
pinctrl_usba_vbus: usba_vbus {
atmel,pins =
<AT91_PIOD 28
AT91_PERIPH_GPIO
AT91_PINCTRL_DEGLITCH>;
};
pinctrl_mmc0_cd: mmc0_cd {
atmel,pins =
<AT91_PIOD 5
AT91_PERIPH_GPIO
AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
pinctrl_lcd_prlud0: lcd_prlud0 {
atmel,pins =
<AT91_PIOA 21
AT91_PERIPH_GPIO
AT91_PINCTRL_OUTPUT_VAL(0)>;
};
pinctrl_lcd_hipow0: lcd_hipow0 {
atmel,pins =
<AT91_PIOA 23
AT91_PERIPH_GPIO
AT91_PINCTRL_OUTPUT_VAL(0)>;
};
};
};
watchdog@fffffe40 {
status = "okay";
};
};
};
gpio-keys {
compatible = "gpio-keys";
@ -103,10 +63,29 @@
};
panel: panel {
compatible = "sharp,lq150x1lg11";
compatible = "sharp,lq150x1lg11", "panel-lvds";
backlight = <&panel_bl>;
power-supply = <&panel_reg>;
width-mm = <304>;
height-mm = <228>;
data-mapping = "jeida-18";
panel-timing {
// 1024x768 @ 60Hz (typical)
clock-frequency = <50000000 65000000 80000000>;
hactive = <1024>;
vactive = <768>;
hfront-porch = <48 88 88>;
hback-porch = <96 168 168>;
hsync-len = <32 64 64>;
vsync-len = <3 13 74>;
vfront-porch = <3 13 74>;
vback-porch = <3 12 74>;
};
port {
panel_input: endpoint {
remote-endpoint = <&lvds_encoder_output>;
@ -115,7 +94,10 @@
};
lvds-encoder {
compatible = "lvds-encoder";
compatible = "ti,ds90c185", "lvds-encoder";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lvds_prlud0 &pinctrl_lvds_hipow0>;
ports {
#address-cells = <1>;
@ -159,6 +141,36 @@
};
};
&pinctrl {
nattis {
pinctrl_usba_vbus: usba_vbus {
atmel,pins = <AT91_PIOD 28 AT91_PERIPH_GPIO
AT91_PINCTRL_DEGLITCH>;
};
pinctrl_mmc0_cd: mmc0_cd {
atmel,pins = <AT91_PIOD 5 AT91_PERIPH_GPIO
AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
pinctrl_lvds_prlud0: lvds_prlud0 {
atmel,pins = <AT91_PIOA 21 AT91_PERIPH_GPIO
(AT91_PINCTRL_OUTPUT |
AT91_PINCTRL_OUTPUT_VAL(0))>;
};
pinctrl_lvds_hipow0: lvds_hipow0 {
atmel,pins = <AT91_PIOA 23 AT91_PERIPH_GPIO
(AT91_PINCTRL_OUTPUT |
AT91_PINCTRL_OUTPUT_VAL(0))>;
};
};
};
&watchdog {
status = "okay";
};
&i2c0 {
status = "okay";
@ -195,14 +207,12 @@
hlcdc-display-controller {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base
&pinctrl_lcd_rgb565
&pinctrl_lcd_prlud0
&pinctrl_lcd_hipow0>;
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb565>;
port@0 {
hlcdc_output: endpoint {
remote-endpoint = <&lvds_encoder_input>;
bus-width = <16>;
};
};
};
@ -219,6 +229,7 @@
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
cd-inverted;
};
};

View File

@ -283,6 +283,13 @@
status = "okay";
};
adc: adc@fc030000 {
vddana-supply = <&vddana>;
vref-supply = <&advref>;
status = "disabled";
};
pinctrl@fc038000 {
pinctrl_can1_default: can1_default {
@ -549,4 +556,39 @@
linux,default-trigger = "heartbeat";
};
};
vddin_3v3: fixed-regulator-vddin_3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDIN_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
status = "okay";
};
vddana: fixed-regulator-vddana {
compatible = "regulator-fixed";
regulator-name = "VDDANA";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vddin_3v3>;
status = "okay";
};
advref: fixed-regulator-advref {
compatible = "regulator-fixed";
regulator-name = "advref";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vddana>;
status = "okay";
};
};

View File

@ -92,13 +92,13 @@
reg = <0x40000 0xc0000>;
};
bootloaderenv@0x100000 {
label = "bootloader env";
bootloaderenvred@0x100000 {
label = "bootloader env redundant";
reg = <0x100000 0x40000>;
};
bootloaderenvred@0x140000 {
label = "bootloader env redundant";
bootloaderenv@0x140000 {
label = "bootloader env";
reg = <0x140000 0x40000>;
};

View File

@ -281,6 +281,12 @@
status = "okay";
};
i2s0: i2s@f8050000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2s0_default>;
status = "disabled"; /* conflict with can0 */
};
can0: can@f8054000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can0_default>;
@ -424,6 +430,24 @@
bias-disable;
};
pinctrl_i2s0_default: i2s0_default {
pinmux = <PIN_PC1__I2SC0_CK>,
<PIN_PC2__I2SC0_MCK>,
<PIN_PC3__I2SC0_WS>,
<PIN_PC4__I2SC0_DI0>,
<PIN_PC5__I2SC0_DO0>;
bias-disable;
};
pinctrl_i2s1_default: i2s1_default {
pinmux = <PIN_PA15__I2SC1_CK>,
<PIN_PA14__I2SC1_MCK>,
<PIN_PA16__I2SC1_WS>,
<PIN_PA17__I2SC1_DI0>,
<PIN_PA18__I2SC1_DO0>;
bias-disable;
};
pinctrl_key_gpio_default: key_gpio_default {
pinmux = <PIN_PB9__GPIO>;
bias-pull-up;
@ -546,6 +570,12 @@
status = "okay";
};
i2s1: i2s@fc04c000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2s1_default>;
status = "disabled"; /* conflict with spi0, sdmmc1 */
};
can1: can@fc050000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1_default>;

View File

@ -297,12 +297,17 @@
bootloader@40000 {
label = "bootloader";
reg = <0x40000 0x80000>;
reg = <0x40000 0xc0000>;
};
bootloaderenv@c0000 {
bootloaderenvred@100000 {
label = "bootloader env redundant";
reg = <0x100000 0x40000>;
};
bootloaderenv@140000 {
label = "bootloader env";
reg = <0xc0000 0xc0000>;
reg = <0x140000 0x40000>;
};
dtb@180000 {

View File

@ -232,12 +232,17 @@
bootloader@40000 {
label = "bootloader";
reg = <0x40000 0x80000>;
reg = <0x40000 0xc0000>;
};
bootloaderenv@c0000 {
bootloaderenvred@100000 {
label = "bootloader env redundant";
reg = <0x100000 0x40000>;
};
bootloaderenv@140000 {
label = "bootloader env";
reg = <0xc0000 0xc0000>;
reg = <0x140000 0x40000>;
};
dtb@180000 {
@ -252,7 +257,7 @@
rootfs@800000 {
label = "rootfs";
reg = <0x800000 0x0f800000>;
reg = <0x800000 0x1f800000>;
};
};
};

View File

@ -16,25 +16,6 @@
compatible = "axentia,tse850v3", "axentia,linea",
"atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
ahb {
apb {
pinctrl@fffff200 {
tse850 {
pinctrl_usba_vbus: usba-vbus {
atmel,pins =
<AT91_PIOC 31
AT91_PERIPH_GPIO
AT91_PINCTRL_DEGLITCH>;
};
};
};
watchdog@fffffe40 {
status = "okay";
};
};
};
sck: oscillator {
compatible = "fixed-clock";
@ -253,6 +234,19 @@
};
};
&pinctrl {
tse850 {
pinctrl_usba_vbus: usba-vbus {
atmel,pins = <AT91_PIOC 31 AT91_PERIPH_GPIO
AT91_PINCTRL_DEGLITCH>;
};
};
};
&watchdog {
status = "okay";
};
&usart0 {
status = "okay";

View File

@ -128,7 +128,7 @@
i2c2: i2c@f8024000 {
status = "okay";
rtc1: rtc@64 {
rtc1: rtc@32 {
compatible = "epson,rx8900";
reg = <0x32>;
};

View File

@ -127,7 +127,7 @@
spi0: spi@fffc8000 {
cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
mtd_dataflash@0 {
mtd_dataflash@1 {
compatible = "atmel,at45", "atmel,dataflash";
spi-max-frequency = <50000000>;
reg = <1>;

View File

@ -160,7 +160,7 @@
spi-max-frequency = <15000000>;
};
tsc2046@0 {
tsc2046@2 {
reg = <2>;
compatible = "ti,ads7843";
interrupts-extended = <&pioC 2 IRQ_TYPE_EDGE_BOTH>;

View File

@ -109,7 +109,7 @@
spi0: spi@fffc8000 {
cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
mtd_dataflash@0 {
mtd_dataflash@1 {
compatible = "atmel,at45", "atmel,dataflash";
spi-max-frequency = <50000000>;
reg = <1>;

View File

@ -570,7 +570,7 @@
};
};
uart1 {
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE

View File

@ -85,12 +85,22 @@
uboot@40000 {
label = "u-boot";
reg = <0x40000 0x80000>;
reg = <0x40000 0xc0000>;
};
ubootenv@c0000 {
ubootenvred@100000 {
label = "U-Boot Env Redundant";
reg = <0x100000 0x40000>;
};
ubootenv@140000 {
label = "U-Boot Env";
reg = <0xc0000 0x140000>;
reg = <0x140000 0x40000>;
};
dtb@180000 {
label = "device tree";
reg = <0x180000 0x80000>;
};
kernel@200000 {
@ -100,7 +110,7 @@
rootfs@800000 {
label = "rootfs";
reg = <0x800000 0x1f800000>;
reg = <0x800000 0x0f800000>;
};
};
};

View File

@ -216,7 +216,7 @@
reg = <0x33000 0x14>;
};
qspi: qspi@27200 {
qspi: spi@27200 {
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
reg = <0x027200 0x184>,
<0x027000 0x124>,

View File

@ -273,7 +273,7 @@
brcm,nand-has-wp;
};
qspi: qspi@27200 {
qspi: spi@27200 {
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
reg = <0x027200 0x184>,
<0x027000 0x124>,
@ -377,7 +377,36 @@
srab: srab@36000 {
compatible = "brcm,nsp-srab";
reg = <0x36000 0x1000>;
reg = <0x36000 0x1000>,
<0x3f308 0x8>,
<0x3f410 0xc>;
reg-names = "srab", "mux_config", "sgmii";
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "link_state_p0",
"link_state_p1",
"link_state_p2",
"link_state_p3",
"link_state_p4",
"link_state_p5",
"link_state_p7",
"link_state_p8",
"phy",
"ts",
"imp_sleep_timer_p5",
"imp_sleep_timer_p7",
"imp_sleep_timer_p8";
#address-cells = <1>;
#size-cells = <0>;

View File

@ -31,7 +31,7 @@
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&expgpio 1 GPIO_ACTIVE_HIGH>;
reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
};
};

View File

@ -26,7 +26,7 @@
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&expgpio 1 GPIO_ACTIVE_HIGH>;
reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
};
};

View File

@ -0,0 +1,87 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "bcm2837-rpi-cm3.dtsi"
#include "bcm283x-rpi-usb-host.dtsi"
/ {
compatible = "raspberrypi,3-compute-module", "brcm,bcm2837";
model = "Raspberry Pi Compute Module 3 IO board V3.0";
};
&gpio {
/*
* This is based on the official GPU firmware DT blob.
*
* Legend:
* "NC" = not connected (no rail from the SoC)
* "FOO" = GPIO line named "FOO" on the schematic
* "FOO_N" = GPIO line named "FOO" on schematic, active low
*/
gpio-line-names = "GPIO0",
"GPIO1",
"GPIO2",
"GPIO3",
"GPIO4",
"GPIO5",
"GPIO6",
"GPIO7",
"GPIO8",
"GPIO9",
"GPIO10",
"GPIO11",
"GPIO12",
"GPIO13",
"GPIO14",
"GPIO15",
"GPIO16",
"GPIO17",
"GPIO18",
"GPIO19",
"GPIO20",
"GPIO21",
"GPIO22",
"GPIO23",
"GPIO24",
"GPIO25",
"GPIO26",
"GPIO27",
"GPIO28",
"GPIO29",
"GPIO30",
"GPIO31",
"GPIO32",
"GPIO33",
"GPIO34",
"GPIO35",
"GPIO36",
"GPIO37",
"GPIO38",
"GPIO39",
"GPIO40",
"GPIO41",
"GPIO42",
"GPIO43",
"GPIO44",
"GPIO45",
"GPIO46",
"GPIO47",
/* Used by eMMC */
"SD_CLK_R",
"SD_CMD_R",
"SD_DATA0_R",
"SD_DATA1_R",
"SD_DATA2_R",
"SD_DATA3_R";
pinctrl-0 = <&gpioout &alt0>;
};
&hdmi {
hpd-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_gpio14>;
status = "okay";
};

View File

@ -0,0 +1,52 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "bcm2837.dtsi"
#include "bcm2835-rpi.dtsi"
/ {
memory {
reg = <0 0x40000000>;
};
reg_3v3: fixed-regulator {
compatible = "regulator-fixed";
regulator-name = "3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_1v8: fixed-regulator {
compatible = "regulator-fixed";
regulator-name = "1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
};
&firmware {
expgpio: gpio {
compatible = "raspberrypi,firmware-gpio";
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "HDMI_HPD_N",
"EMMC_EN_N",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC";
status = "okay";
};
};
&sdhost {
pinctrl-names = "default";
pinctrl-0 = <&sdhost_gpio48>;
bus-width = <4>;
vmmc-supply = <&reg_3v3>;
vqmmc-supply = <&reg_1v8>;
status = "okay";
};

View File

@ -1,4 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/net/microchip-lan78xx.h>
/ {
aliases {
ethernet0 = &ethernet;
@ -21,6 +23,18 @@
ethernet: ethernet@1 {
compatible = "usb424,7800";
reg = <1>;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
eth_phy: ethernet-phy@1 {
reg = <1>;
microchip,led-modes = <
LAN78XX_LINK_1000_ACTIVITY
LAN78XX_LINK_10_100_ACTIVITY
>;
};
};
};
};
};

View File

@ -94,6 +94,34 @@
&spi_nor {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot@0 {
label = "boot";
reg = <0x000000 0x040000>;
read-only;
};
os-image@100000 {
label = "os-image";
reg = <0x040000 0x200000>;
compatible = "brcm,trx";
};
rootfs@240000 {
label = "rootfs";
reg = <0x240000 0xc00000>;
};
nvram@ff0000 {
label = "nvram";
reg = <0xff0000 0x010000>;
};
};
};
&usb2 {

View File

@ -66,3 +66,34 @@
&usb3_phy {
status = "okay";
};
&nandcs {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot@0 {
label = "boot";
reg = <0x00000000 0x00080000>;
read-only;
};
nvram@80000 {
label = "nvram";
reg = <0x00080000 0x00180000>;
};
firmware@200000 {
label = "firmware";
reg = <0x00200000 0x07cc0000>;
compatible = "brcm,trx";
};
asus@7ec0000 {
label = "asus";
reg = <0x07ec0000 0x00140000>;
read-only;
};
};
};

View File

@ -103,6 +103,34 @@
&spi_nor {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot@0 {
label = "boot";
reg = <0x000000 0x040000>;
read-only;
};
os-image@100000 {
label = "os-image";
reg = <0x040000 0x200000>;
compatible = "brcm,trx";
};
rootfs@240000 {
label = "rootfs";
reg = <0x240000 0xc00000>;
};
nvram@ff0000 {
label = "nvram";
reg = <0xff0000 0x010000>;
};
};
};
&usb3_phy {

View File

@ -12,6 +12,10 @@
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
partitions {
compatible = "brcm,bcm947xx-cfe-partitions";
};
};
};
};

View File

@ -475,8 +475,11 @@
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <20000000>;
linux,part-probe = "ofpart", "bcm47xxpart";
status = "disabled";
partitions {
compatible = "brcm,bcm947xx-cfe-partitions";
};
};
};

View File

@ -58,6 +58,24 @@
open-source;
priority = <200>;
};
/* Hardware I2C block cannot do more than 63 bytes per transfer,
* which would prevent reading from a SFP's EEPROM (256 byte).
*/
i2c1: i2c {
compatible = "i2c-gpio";
sda-gpios = <&gpioa 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpioa 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
};
sfp: sfp {
compatible = "sff,sfp";
i2c-bus = <&i2c1>;
mod-def0-gpios = <&gpioa 28 GPIO_ACTIVE_LOW>;
los-gpios = <&gpioa 24 GPIO_ACTIVE_HIGH>;
tx-fault-gpios = <&gpioa 30 GPIO_ACTIVE_HIGH>;
tx-disable-gpios = <&gpioa 26 GPIO_ACTIVE_HIGH>;
};
};
&amac0 {
@ -210,6 +228,14 @@
reg = <4>;
};
port@5 {
label = "sfp";
phy-mode = "sgmii";
reg = <5>;
sfp = <&sfp>;
managed = "in-band-status";
};
port@8 {
ethernet = <&amac2>;
label = "cpu";

View File

@ -221,6 +221,12 @@
gpio-controller;
#gpio-cells = <2>;
};
tca6416_bb: gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
};
};
&wdt {

View File

@ -352,7 +352,8 @@
compatible = "ti,ads7957";
reg = <3>;
#io-channel-cells = <1>;
spi-max-frequency = <10000000>;
spi-max-frequency = <1000000>;
ti,spi-wdelay = <63>;
vref-supply = <&adc_ref>;
};
};

View File

@ -27,15 +27,25 @@
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-handle = <&ethphy1>;
phy-mode = "rgmii";
};
&davinci_mdio {
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
&gpmc {
ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */

View File

@ -36,15 +36,25 @@
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-handle = <&ethphy1>;
phy-mode = "rgmii";
};
&davinci_mdio {
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc1 {
status = "disabled";
};

View File

@ -87,7 +87,7 @@
status = "okay";
clock-frequency = <100000>;
si5351: clock-generator {
si5351: clock-generator@60 {
compatible = "silabs,si5351a-msop";
reg = <0x60>;
#address-cells = <1>;

View File

@ -155,7 +155,7 @@
0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800 /* CESA SRAM 2k */
0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU SRAM 2k */
spi0: spi-ctrl@10600 {
spi0: spi@10600 {
compatible = "marvell,orion-spi";
#address-cells = <1>;
#size-cells = <0>;
@ -168,7 +168,7 @@
status = "disabled";
};
i2c: i2c-ctrl@11000 {
i2c: i2c@11000 {
compatible = "marvell,mv64xxx-i2c";
reg = <0x11000 0x20>;
#address-cells = <1>;
@ -218,7 +218,7 @@
status = "disabled";
};
spi1: spi-ctrl@14600 {
spi1: spi@14600 {
compatible = "marvell,orion-spi";
#address-cells = <1>;
#size-cells = <0>;

View File

@ -27,15 +27,25 @@
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-handle = <&ethphy1>;
phy-mode = "rgmii";
};
&davinci_mdio {
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
&gpmc {
ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */

View File

@ -512,17 +512,27 @@
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <2>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <3>;
phy-handle = <&ethphy1>;
phy-mode = "rgmii";
dual_emac_res_vlan = <2>;
};
&davinci_mdio {
ethphy0: ethernet-phy@2 {
reg = <2>;
};
ethphy1: ethernet-phy@3 {
reg = <3>;
};
};
&dcan1 {
status = "ok";
pinctrl-names = "default", "sleep", "active";

View File

@ -336,6 +336,7 @@
<0 0 0 2 &pcie1_intc 2>,
<0 0 0 3 &pcie1_intc 3>,
<0 0 0 4 &pcie1_intc 4>;
ti,syscon-unaligned-access = <&scm_conf1 0x14 1>;
status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
@ -354,7 +355,7 @@
ti,hwmods = "pcie1";
phys = <&pcie1_phy>;
phy-names = "pcie-phy0";
ti,syscon-unaligned-access = <&scm_conf1 0x14 2>;
ti,syscon-unaligned-access = <&scm_conf1 0x14 1>;
status = "disabled";
};
};
@ -387,6 +388,7 @@
<0 0 0 2 &pcie2_intc 2>,
<0 0 0 3 &pcie2_intc 3>,
<0 0 0 4 &pcie2_intc 4>;
ti,syscon-unaligned-access = <&scm_conf1 0x14 2>;
pcie2_intc: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
@ -1369,7 +1371,7 @@
status = "disabled";
};
qspi: qspi@4b300000 {
qspi: spi@4b300000 {
compatible = "ti,dra7xxx-qspi";
reg = <0x4b300000 0x100>,
<0x5c000000 0x4000000>;

View File

@ -203,13 +203,13 @@
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <2>;
phy-handle = <&dp83867_0>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <3>;
phy-handle = <&dp83867_1>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
};

View File

@ -61,13 +61,13 @@
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <2>;
phy-handle = <&dp83867_0>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <3>;
phy-handle = <&dp83867_1>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
};

View File

@ -51,10 +51,16 @@
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <3>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
};
&davinci_mdio {
ethphy0: ethernet-phy@3 {
reg = <3>;
};
};
&mmc1 {
pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
pinctrl-0 = <&mmc1_pins_default>;

View File

@ -375,13 +375,13 @@
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <2>;
phy-handle = <&dp83867_0>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <3>;
phy-handle = <&dp83867_1>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
};

View File

@ -69,6 +69,8 @@
compatible = "samsung,s2mps14-pmic";
interrupt-parent = <&gpx3>;
interrupts = <5 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&s2mps14_irq>;
reg = <0x66>;
s2mps14_osc: clocks {
@ -350,6 +352,11 @@
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV3>;
samsung,pin-val = <1>;
};
s2mps14_irq: s2mps14-irq {
samsung,pins = "gpx3-5";
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
};
&rtc {

View File

@ -151,6 +151,8 @@
reg = <0x66>;
interrupt-parent = <&gpx0>;
interrupts = <4 IRQ_TYPE_NONE>, <3 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&max8997_irq>;
max8997,pmic-buck1-dvs-voltage = <1350000>;
max8997,pmic-buck2-dvs-voltage = <1100000>;
@ -288,6 +290,13 @@
};
};
&pinctrl_1 {
max8997_irq: max8997-irq {
samsung,pins = "gpx0-3", "gpx0-4";
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
};
&sdhci_0 {
bus-width = <4>;
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_cd>;

View File

@ -385,6 +385,12 @@
regulator-max-microvolt = <1800000>;
};
tflash_reg: LDO17 {
regulator-name = "VTF_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
vddq_reg: LDO21 {
regulator-name = "VDDQ_M1M2_1.2V";
regulator-min-microvolt = <1200000>;
@ -452,6 +458,15 @@
status = "okay";
};
&sdhci_2 {
bus-width = <4>;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
pinctrl-names = "default";
vmmc-supply = <&tflash_reg>;
cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>;
status = "okay";
};
&serial_0 {
status = "okay";
};

View File

@ -310,6 +310,9 @@
pmic@66 {
compatible = "national,lp3974";
interrupts-extended = <&gpx0 7 0>, <&gpx2 7 0>;
pinctrl-names = "default";
pinctrl-0 = <&lp3974_irq>;
reg = <0x66>;
max8998,pmic-buck1-default-dvs-idx = <0>;
@ -503,6 +506,11 @@
};
&pinctrl_1 {
lp3974_irq: lp3974-irq {
samsung,pins = "gpx0-7", "gpx2-7";
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
hdmi_hpd: hdmi-hpd {
samsung,pins = "gpx3-7";
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
@ -537,8 +545,7 @@
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
pinctrl-names = "default";
vmmc-supply = <&ldo5_reg>;
cd-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
cd-inverted;
cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>;
status = "okay";
};

View File

@ -1269,8 +1269,7 @@
&sdhci_2 {
bus-width = <4>;
cd-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
cd-inverted;
cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sdhci2_cd>;
pinctrl-names = "default";
vmmc-supply = <&ldo21_reg>;

View File

@ -539,8 +539,7 @@
pinctrl-names = "default";
vmmc-supply = <&ldo21_reg>;
vqmmc-supply = <&ldo4_reg>;
cd-gpios = <&gpk2 2 GPIO_ACTIVE_HIGH>;
cd-inverted;
cd-gpios = <&gpk2 2 GPIO_ACTIVE_LOW>;
status = "okay";
};

View File

@ -71,6 +71,17 @@
};
};
panel: panel {
compatible = "boe,hv070wsa-100";
power-supply = <&vcc_3v3_reg>;
enable-gpios = <&gpd1 3 GPIO_ACTIVE_HIGH>;
port {
panel_ep: endpoint {
remote-endpoint = <&bridge_out_ep>;
};
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
@ -97,6 +108,30 @@
reg = <2>;
regulator-name = "hdmi-en";
};
vcc_1v2_reg: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "VCC_1V2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vcc_1v8_reg: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "VCC_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vcc_3v3_reg: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "VCC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
fixed-rate-clocks {
@ -119,6 +154,32 @@
cpu0-supply = <&buck2_reg>;
};
&dsi_0 {
vddcore-supply = <&ldo8_reg>;
vddio-supply = <&ldo10_reg>;
samsung,pll-clock-frequency = <24000000>;
samsung,burst-clock-frequency = <320000000>;
samsung,esc-clock-frequency = <10000000>;
status = "okay";
bridge@0 {
reg = <0>;
compatible = "toshiba,tc358764";
vddc-supply = <&vcc_1v2_reg>;
vddio-supply = <&vcc_1v8_reg>;
vddlvds-supply = <&vcc_3v3_reg>;
reset-gpios = <&gpd1 6 GPIO_ACTIVE_LOW>;
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
bridge_out_ep: endpoint {
remote-endpoint = <&panel_ep>;
};
};
};
};
&dp {
status = "okay";
samsung,color-space = <0>;
@ -149,9 +210,11 @@
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&hdmi_hpd>;
status = "okay";
ddc = <&i2c_2>;
hpd-gpios = <&gpx3 7 GPIO_ACTIVE_LOW>;
ddc = <&i2c_ddc>;
hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
vdd_osc-supply = <&ldo10_reg>;
vdd_pll-supply = <&ldo8_reg>;
vdd-supply = <&ldo8_reg>;
@ -168,6 +231,8 @@
reg = <0x66>;
interrupt-parent = <&gpx3>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&s5m8767_irq>;
vinb1-supply = <&main_dc_reg>;
vinb2-supply = <&main_dc_reg>;
@ -452,13 +517,6 @@
};
};
&i2c_2 {
status = "okay";
/* used by HDMI DDC */
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
};
&i2c_3 {
status = "okay";
@ -535,6 +593,13 @@
cap-sd-highspeed;
};
&pinctrl_0 {
s5m8767_irq: s5m8767-irq {
samsung,pins = "gpx3-2";
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
};
&rtc {
status = "okay";
};
@ -547,3 +612,22 @@
status = "okay";
samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
};
&soc {
/*
* For unknown reasons HDMI-DDC does not work with Exynos I2C
* controllers. Lets use software I2C over GPIO pins as a workaround.
*/
i2c_ddc: i2c-gpio {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_gpio_bus>;
status = "okay";
compatible = "i2c-gpio";
gpios = <&gpa0 6 0 /* sda */
&gpa0 7 0 /* scl */
>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
};
};

View File

@ -225,6 +225,12 @@
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c2_gpio_bus: i2c2-gpio-bus {
samsung,pins = "gpa0-6", "gpa0-7";
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart2_data: uart2-data {
samsung,pins = "gpa1-0", "gpa1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
@ -593,6 +599,11 @@
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
hdmi_hpd: hdmi-hpd {
samsung,pins = "gpx3-7";
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
};
&pinctrl_1 {

View File

@ -20,6 +20,14 @@
samsung,model = "Snow-I2S-MAX98090";
samsung,audio-codec = <&max98090>;
cpu {
sound-dai = <&i2s0 0>;
};
codec {
sound-dai = <&max98090 0>, <&hdmi>;
};
};
};
@ -31,6 +39,9 @@
interrupt-parent = <&gpx0>;
pinctrl-names = "default";
pinctrl-0 = <&max98090_irq>;
clocks = <&pmu_system_controller 0>;
clock-names = "mclk";
#sound-dai-cells = <1>;
};
};

View File

@ -54,62 +54,109 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0>;
clock-frequency = <1700000000>;
clocks = <&clock CLK_ARM_CLK>;
clock-names = "cpu";
clock-latency = <140000>;
operating-points = <
1700000 1300000
1600000 1250000
1500000 1225000
1400000 1200000
1300000 1150000
1200000 1125000
1100000 1100000
1000000 1075000
900000 1050000
800000 1025000
700000 1012500
600000 1000000
500000 975000
400000 950000
300000 937500
200000 925000
>;
operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>; /* min followed by max */
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <1>;
clock-frequency = <1700000000>;
clocks = <&clock CLK_ARM_CLK>;
clock-names = "cpu";
clock-latency = <140000>;
operating-points = <
1700000 1300000
1600000 1250000
1500000 1225000
1400000 1200000
1300000 1150000
1200000 1125000
1100000 1100000
1000000 1075000
900000 1050000
800000 1025000
700000 1012500
600000 1000000
500000 975000
400000 950000
300000 937500
200000 925000
>;
operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>; /* min followed by max */
};
};
cpu0_opp_table: opp_table0 {
compatible = "operating-points-v2";
opp-shared;
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <925000>;
clock-latency-ns = <140000>;
};
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <937500>;
clock-latency-ns = <140000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <950000>;
clock-latency-ns = <140000>;
};
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <975000>;
clock-latency-ns = <140000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <140000>;
};
opp-700000000 {
opp-hz = /bits/ 64 <700000000>;
opp-microvolt = <1012500>;
clock-latency-ns = <140000>;
};
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1025000>;
clock-latency-ns = <140000>;
};
opp-900000000 {
opp-hz = /bits/ 64 <900000000>;
opp-microvolt = <1050000>;
clock-latency-ns = <140000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1075000>;
clock-latency-ns = <140000>;
opp-suspend;
};
opp-1100000000 {
opp-hz = /bits/ 64 <1100000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <140000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1125000>;
clock-latency-ns = <140000>;
};
opp-1300000000 {
opp-hz = /bits/ 64 <1300000000>;
opp-microvolt = <1150000>;
clock-latency-ns = <140000>;
};
opp-1400000000 {
opp-hz = /bits/ 64 <1400000000>;
opp-microvolt = <1200000>;
clock-latency-ns = <140000>;
};
opp-1500000000 {
opp-hz = /bits/ 64 <1500000000>;
opp-microvolt = <1225000>;
clock-latency-ns = <140000>;
};
opp-1600000000 {
opp-hz = /bits/ 64 <1600000000>;
opp-microvolt = <1250000>;
clock-latency-ns = <140000>;
};
opp-1700000000 {
opp-hz = /bits/ 64 <1700000000>;
opp-microvolt = <1300000>;
clock-latency-ns = <140000>;
};
};
soc: soc {
sysram@2020000 {
compatible = "mmio-sram";
@ -756,6 +803,27 @@
#phy-cells = <0>;
};
mipi_phy: video-phy@10040710 {
compatible = "samsung,s5pv210-mipi-video-phy";
reg = <0x10040710 0x100>;
#phy-cells = <1>;
syscon = <&pmu_system_controller>;
};
dsi_0: dsi@14500000 {
compatible = "samsung,exynos4210-mipi-dsi";
reg = <0x14500000 0x10000>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
samsung,power-domain = <&pd_disp1>;
phys = <&mipi_phy 3>;
phy-names = "dsim";
clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI1>;
clock-names = "bus_clk", "sclk_mipi";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
adc: adc@12d10000 {
compatible = "samsung,exynos-adc-v1";
reg = <0x12D10000 0x100>;

View File

@ -530,7 +530,7 @@
samsung,dw-mshc-sdr-timing = <0 4>;
samsung,dw-mshc-ddr-timing = <0 2>;
pinctrl-names = "default";
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4 &sd2_wp>;
bus-width = <4>;
cap-sd-highspeed;
vmmc-supply = <&ldo21_reg>;
@ -545,6 +545,14 @@
samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
};
sd2_wp: sd2-wp {
samsung,pins = "gpm5-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
/* Pin is floating so be sure to disable write-protect */
samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
};
pmic_dvs_3: pmic-dvs-3 {
samsung,pins = "gpx0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;

View File

@ -153,7 +153,7 @@
&clock_audss {
assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
assigned-clock-parents = <&clock CLK_FOUT_EPLL>;
assigned-clock-parents = <&clock CLK_MAU_EPLL>;
};
&cpu0 {
@ -312,6 +312,7 @@
regulator-name = "vdd_1v35";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
@ -333,6 +334,7 @@
regulator-name = "vdd_2v";
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
@ -343,6 +345,7 @@
regulator-name = "vdd_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;

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