Use uint32_t consistently to store registers values.
Always use unsigned numbers to avoid undefined behavior on (1 << 31). Remove unused variables and some stray semicolons. No functional changes.
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@ -89,21 +89,21 @@ __FBSDID("$FreeBSD$");
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#define DWC_LOCK(sc) mtx_lock(&(sc)->mtx)
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#define DWC_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
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#define DWC_ASSERT_LOCKED(sc) mtx_assert(&(sc)->mtx, MA_OWNED);
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#define DWC_ASSERT_UNLOCKED(sc) mtx_assert(&(sc)->mtx, MA_NOTOWNED);
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#define DWC_ASSERT_LOCKED(sc) mtx_assert(&(sc)->mtx, MA_OWNED)
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#define DWC_ASSERT_UNLOCKED(sc) mtx_assert(&(sc)->mtx, MA_NOTOWNED)
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#define DDESC_TDES0_OWN (1 << 31)
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#define DDESC_TDES0_TXINT (1 << 30)
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#define DDESC_TDES0_TXLAST (1 << 29)
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#define DDESC_TDES0_TXFIRST (1 << 28)
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#define DDESC_TDES0_TXCRCDIS (1 << 27)
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#define DDESC_TDES0_TXRINGEND (1 << 21)
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#define DDESC_TDES0_TXCHAIN (1 << 20)
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#define DDESC_TDES0_OWN (1U << 31)
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#define DDESC_TDES0_TXINT (1U << 30)
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#define DDESC_TDES0_TXLAST (1U << 29)
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#define DDESC_TDES0_TXFIRST (1U << 28)
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#define DDESC_TDES0_TXCRCDIS (1U << 27)
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#define DDESC_TDES0_TXRINGEND (1U << 21)
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#define DDESC_TDES0_TXCHAIN (1U << 20)
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#define DDESC_RDES0_OWN (1 << 31)
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#define DDESC_RDES0_OWN (1U << 31)
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#define DDESC_RDES0_FL_MASK 0x3fff
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#define DDESC_RDES0_FL_SHIFT 16 /* Frame Length */
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#define DDESC_RDES1_CHAINED (1 << 14)
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#define DDESC_RDES1_CHAINED (1U << 14)
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struct dwc_bufmap {
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bus_dmamap_t map;
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@ -149,8 +149,6 @@ struct dwc_softc {
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struct mtx mtx;
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void * intr_cookie;
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struct callout dwc_callout;
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uint8_t phy_conn_type;
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uint8_t mactype;
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boolean_t link_is_up;
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boolean_t is_attached;
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boolean_t is_detaching;
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@ -331,7 +329,7 @@ static void
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dwc_stop_locked(struct dwc_softc *sc)
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{
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struct ifnet *ifp;
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int reg;
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uint32_t reg;
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DWC_ASSERT_LOCKED(sc);
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@ -365,7 +363,7 @@ dwc_stop_locked(struct dwc_softc *sc)
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static void dwc_clear_stats(struct dwc_softc *sc)
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{
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int reg;
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uint32_t reg;
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reg = READ4(sc, MMC_CONTROL);
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reg |= (MMC_CONTROL_CNTRST);
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@ -448,7 +446,7 @@ static void
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dwc_init_locked(struct dwc_softc *sc)
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{
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struct ifnet *ifp = sc->ifp;
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int reg;
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uint32_t reg;
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DWC_ASSERT_LOCKED(sc);
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@ -618,15 +616,8 @@ dwc_setup_rxfilter(struct dwc_softc *sc)
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{
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struct ifmultiaddr *ifma;
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struct ifnet *ifp;
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uint8_t *eaddr;
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uint32_t crc;
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uint8_t val;
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int hashbit;
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int hashreg;
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int ffval;
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int reg;
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int lo;
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int hi;
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uint8_t *eaddr, val;
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uint32_t crc, ffval, hashbit, hashreg, hi, lo, reg;
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DWC_ASSERT_LOCKED(sc);
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@ -774,10 +765,8 @@ dwc_rxfinish_locked(struct dwc_softc *sc)
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struct ifnet *ifp;
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struct mbuf *m0;
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struct mbuf *m;
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int error;
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int rdes0;
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int idx;
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int len;
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int error, idx, len;
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uint32_t rdes0;
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ifp = sc->ifp;
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@ -1029,9 +1018,7 @@ out:
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static int
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dwc_get_hwaddr(struct dwc_softc *sc, uint8_t *hwaddr)
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{
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int rnd;
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int lo;
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int hi;
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uint32_t hi, lo, rnd;
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/*
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* Try to recover a MAC address from the running hardware. If there's
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@ -1084,9 +1071,8 @@ dwc_attach(device_t dev)
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uint8_t macaddr[ETHER_ADDR_LEN];
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struct dwc_softc *sc;
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struct ifnet *ifp;
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int error;
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int reg;
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int i;
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int error, i;
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uint32_t reg;
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sc = device_get_softc(dev);
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sc->dev = dev;
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@ -1251,7 +1237,7 @@ dwc_miibus_statchg(device_t dev)
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{
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struct dwc_softc *sc;
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struct mii_data *mii;
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int reg;
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uint32_t reg;
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/*
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* Called by the MII bus driver when the PHY establishes
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@ -44,7 +44,7 @@
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#define CONF_TE (1 << 3)
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#define CONF_RE (1 << 2)
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#define MAC_FRAME_FILTER 0x4
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#define FRAME_FILTER_RA (1 << 31) /* Receive All */
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#define FRAME_FILTER_RA (1U << 31) /* Receive All */
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#define FRAME_FILTER_HPF (1 << 10) /* Hash or Perfect Filter */
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#define FRAME_FILTER_PM (1 << 4) /* Pass multicast */
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#define FRAME_FILTER_HMC (1 << 2)
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