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sfxge(4): improve names for RXQ descriptor counts

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Submitted by:   Andy Moreton <amoreton at solarflare.com>
Sponsored by:   Solarflare Communications, Inc.
Differential Revision:  https://reviews.freebsd.org/D18108
This commit is contained in:
arybchik 2018-11-24 15:23:22 +00:00
parent 67796d5c07
commit af050e908f
4 changed files with 65 additions and 63 deletions
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16
sys/dev/sfxge/common/ef10_impl.h
View File

@ -956,14 +956,14 @@ ef10_rx_prefix_pktlen(
__in uint8_t *buffer, __in uint8_t *buffer,
__out uint16_t *lengthp); __out uint16_t *lengthp);
extern void extern void
ef10_rx_qpost( ef10_rx_qpost(
__in efx_rxq_t *erp, __in efx_rxq_t *erp,
__in_ecount(n) efsys_dma_addr_t *addrp, __in_ecount(ndescs) efsys_dma_addr_t *addrp,
__in size_t size, __in size_t size,
__in unsigned int n, __in unsigned int ndescs,
__in unsigned int completed, __in unsigned int completed,
__in unsigned int added); __in unsigned int added);
extern void extern void
ef10_rx_qpush( ef10_rx_qpush(
@ -986,7 +986,7 @@ ef10_rx_qcreate(
__in unsigned int label, __in unsigned int label,
__in efx_rxq_type_t type, __in efx_rxq_type_t type,
__in efsys_mem_t *esmp, __in efsys_mem_t *esmp,
__in size_t n, __in size_t ndescs,
__in uint32_t id, __in uint32_t id,
__in efx_evq_t *eep, __in efx_evq_t *eep,
__in efx_rxq_t *erp); __in efx_rxq_t *erp);

33
sys/dev/sfxge/common/ef10_rx.c
View File

@ -41,7 +41,7 @@ __FBSDID("$FreeBSD$");
static __checkReturn efx_rc_t static __checkReturn efx_rc_t
efx_mcdi_init_rxq( efx_mcdi_init_rxq(
__in efx_nic_t *enp, __in efx_nic_t *enp,
__in uint32_t size, __in uint32_t ndescs,
__in uint32_t target_evq, __in uint32_t target_evq,
__in uint32_t label, __in uint32_t label,
__in uint32_t instance, __in uint32_t instance,
@ -53,7 +53,7 @@ efx_mcdi_init_rxq(
efx_mcdi_req_t req; efx_mcdi_req_t req;
uint8_t payload[MAX(MC_CMD_INIT_RXQ_EXT_IN_LEN, uint8_t payload[MAX(MC_CMD_INIT_RXQ_EXT_IN_LEN,
MC_CMD_INIT_RXQ_EXT_OUT_LEN)]; MC_CMD_INIT_RXQ_EXT_OUT_LEN)];
int npages = EFX_RXQ_NBUFS(size); int npages = EFX_RXQ_NBUFS(ndescs);
int i; int i;
efx_qword_t *dma_addr; efx_qword_t *dma_addr;
uint64_t addr; uint64_t addr;
@ -61,7 +61,7 @@ efx_mcdi_init_rxq(
uint32_t dma_mode; uint32_t dma_mode;
boolean_t want_outer_classes; boolean_t want_outer_classes;
EFSYS_ASSERT3U(size, <=, EFX_RXQ_MAXNDESCS); EFSYS_ASSERT3U(ndescs, <=, EFX_RXQ_MAXNDESCS);
if (ps_bufsize > 0) if (ps_bufsize > 0)
dma_mode = MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM; dma_mode = MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM;
@ -94,7 +94,7 @@ efx_mcdi_init_rxq(
req.emr_out_buf = payload; req.emr_out_buf = payload;
req.emr_out_length = MC_CMD_INIT_RXQ_EXT_OUT_LEN; req.emr_out_length = MC_CMD_INIT_RXQ_EXT_OUT_LEN;
MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, size); MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, ndescs);
MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, target_evq); MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, target_evq);
MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_LABEL, label); MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_LABEL, label);
MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_INSTANCE, instance); MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_INSTANCE, instance);
@ -738,14 +738,14 @@ ef10_rx_prefix_hash(
#define EFX_RXQ_PACKED_STREAM_FAKE_BUF_SIZE 32 #define EFX_RXQ_PACKED_STREAM_FAKE_BUF_SIZE 32
#endif #endif
void void
ef10_rx_qpost( ef10_rx_qpost(
__in efx_rxq_t *erp, __in efx_rxq_t *erp,
__in_ecount(n) efsys_dma_addr_t *addrp, __in_ecount(ndescs) efsys_dma_addr_t *addrp,
__in size_t size, __in size_t size,
__in unsigned int n, __in unsigned int ndescs,
__in unsigned int completed, __in unsigned int completed,
__in unsigned int added) __in unsigned int added)
{ {
efx_qword_t qword; efx_qword_t qword;
unsigned int i; unsigned int i;
@ -762,11 +762,11 @@ ef10_rx_qpost(
#endif #endif
/* The client driver must not overfill the queue */ /* The client driver must not overfill the queue */
EFSYS_ASSERT3U(added - completed + n, <=, EFSYS_ASSERT3U(added - completed + ndescs, <=,
EFX_RXQ_LIMIT(erp->er_mask + 1)); EFX_RXQ_LIMIT(erp->er_mask + 1));
id = added & (erp->er_mask); id = added & (erp->er_mask);
for (i = 0; i < n; i++) { for (i = 0; i < ndescs; i++) {
EFSYS_PROBE4(rx_post, unsigned int, erp->er_index, EFSYS_PROBE4(rx_post, unsigned int, erp->er_index,
unsigned int, id, efsys_dma_addr_t, addrp[i], unsigned int, id, efsys_dma_addr_t, addrp[i],
size_t, size); size_t, size);
@ -944,7 +944,7 @@ ef10_rx_qcreate(
__in unsigned int label, __in unsigned int label,
__in efx_rxq_type_t type, __in efx_rxq_type_t type,
__in efsys_mem_t *esmp, __in efsys_mem_t *esmp,
__in size_t n, __in size_t ndescs,
__in uint32_t id, __in uint32_t id,
__in efx_evq_t *eep, __in efx_evq_t *eep,
__in efx_rxq_t *erp) __in efx_rxq_t *erp)
@ -963,7 +963,8 @@ ef10_rx_qcreate(
EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS)); EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS));
EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS)); EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS));
if (!ISP2(n) || (n < EFX_RXQ_MINNDESCS) || (n > EFX_RXQ_MAXNDESCS)) { if (!ISP2(ndescs) ||
(ndescs < EFX_RXQ_MINNDESCS) || (ndescs > EFX_RXQ_MAXNDESCS)) {
rc = EINVAL; rc = EINVAL;
goto fail1; goto fail1;
} }
@ -1023,7 +1024,7 @@ ef10_rx_qcreate(
else else
disable_scatter = encp->enc_rx_disable_scatter_supported; disable_scatter = encp->enc_rx_disable_scatter_supported;
if ((rc = efx_mcdi_init_rxq(enp, n, eep->ee_index, label, index, if ((rc = efx_mcdi_init_rxq(enp, ndescs, eep->ee_index, label, index,
esmp, disable_scatter, ps_buf_size)) != 0) esmp, disable_scatter, ps_buf_size)) != 0)
goto fail6; goto fail6;

16
sys/dev/sfxge/common/efx.h
View File

@ -2018,7 +2018,7 @@ efx_rx_qcreate(
__in unsigned int label, __in unsigned int label,
__in efx_rxq_type_t type, __in efx_rxq_type_t type,
__in efsys_mem_t *esmp, __in efsys_mem_t *esmp,
__in size_t n, __in size_t ndescs,
__in uint32_t id, __in uint32_t id,
__in efx_evq_t *eep, __in efx_evq_t *eep,
__deref_out efx_rxq_t **erpp); __deref_out efx_rxq_t **erpp);
@ -2033,14 +2033,14 @@ typedef struct efx_desc_s {
efx_qword_t ed_eq; efx_qword_t ed_eq;
} efx_desc_t; } efx_desc_t;
extern void extern void
efx_rx_qpost( efx_rx_qpost(
__in efx_rxq_t *erp, __in efx_rxq_t *erp,
__in_ecount(n) efsys_dma_addr_t *addrp, __in_ecount(ndescs) efsys_dma_addr_t *addrp,
__in size_t size, __in size_t size,
__in unsigned int n, __in unsigned int ndescs,
__in unsigned int completed, __in unsigned int completed,
__in unsigned int added); __in unsigned int added);
extern void extern void
efx_rx_qpush( efx_rx_qpush(

63
sys/dev/sfxge/common/efx_rx.c
View File

@ -91,14 +91,14 @@ siena_rx_prefix_pktlen(
__in uint8_t *buffer, __in uint8_t *buffer,
__out uint16_t *lengthp); __out uint16_t *lengthp);
static void static void
siena_rx_qpost( siena_rx_qpost(
__in efx_rxq_t *erp, __in efx_rxq_t *erp,
__in_ecount(n) efsys_dma_addr_t *addrp, __in_ecount(ndescs) efsys_dma_addr_t *addrp,
__in size_t size, __in size_t size,
__in unsigned int n, __in unsigned int ndescs,
__in unsigned int completed, __in unsigned int completed,
__in unsigned int added); __in unsigned int added);
static void static void
siena_rx_qpush( siena_rx_qpush(
@ -137,7 +137,7 @@ siena_rx_qcreate(
__in unsigned int label, __in unsigned int label,
__in efx_rxq_type_t type, __in efx_rxq_type_t type,
__in efsys_mem_t *esmp, __in efsys_mem_t *esmp,
__in size_t n, __in size_t ndescs,
__in uint32_t id, __in uint32_t id,
__in efx_evq_t *eep, __in efx_evq_t *eep,
__in efx_rxq_t *erp); __in efx_rxq_t *erp);
@ -517,21 +517,21 @@ fail1:
} }
#endif /* EFSYS_OPT_RX_SCALE */ #endif /* EFSYS_OPT_RX_SCALE */
void void
efx_rx_qpost( efx_rx_qpost(
__in efx_rxq_t *erp, __in efx_rxq_t *erp,
__in_ecount(n) efsys_dma_addr_t *addrp, __in_ecount(ndescs) efsys_dma_addr_t *addrp,
__in size_t size, __in size_t size,
__in unsigned int n, __in unsigned int ndescs,
__in unsigned int completed, __in unsigned int completed,
__in unsigned int added) __in unsigned int added)
{ {
efx_nic_t *enp = erp->er_enp; efx_nic_t *enp = erp->er_enp;
const efx_rx_ops_t *erxop = enp->en_erxop; const efx_rx_ops_t *erxop = enp->en_erxop;
EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC); EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
erxop->erxo_qpost(erp, addrp, size, n, completed, added); erxop->erxo_qpost(erp, addrp, size, ndescs, completed, added);
} }
#if EFSYS_OPT_RX_PACKED_STREAM #if EFSYS_OPT_RX_PACKED_STREAM
@ -622,7 +622,7 @@ efx_rx_qcreate(
__in unsigned int label, __in unsigned int label,
__in efx_rxq_type_t type, __in efx_rxq_type_t type,
__in efsys_mem_t *esmp, __in efsys_mem_t *esmp,
__in size_t n, __in size_t ndescs,
__in uint32_t id, __in uint32_t id,
__in efx_evq_t *eep, __in efx_evq_t *eep,
__deref_out efx_rxq_t **erpp) __deref_out efx_rxq_t **erpp)
@ -645,10 +645,10 @@ efx_rx_qcreate(
erp->er_magic = EFX_RXQ_MAGIC; erp->er_magic = EFX_RXQ_MAGIC;
erp->er_enp = enp; erp->er_enp = enp;
erp->er_index = index; erp->er_index = index;
erp->er_mask = n - 1; erp->er_mask = ndescs - 1;
erp->er_esmp = esmp; erp->er_esmp = esmp;
if ((rc = erxop->erxo_qcreate(enp, index, label, type, esmp, n, id, if ((rc = erxop->erxo_qcreate(enp, index, label, type, esmp, ndescs, id,
eep, erp)) != 0) eep, erp)) != 0)
goto fail2; goto fail2;
@ -1168,14 +1168,14 @@ siena_rx_prefix_pktlen(
} }
static void static void
siena_rx_qpost( siena_rx_qpost(
__in efx_rxq_t *erp, __in efx_rxq_t *erp,
__in_ecount(n) efsys_dma_addr_t *addrp, __in_ecount(ndescs) efsys_dma_addr_t *addrp,
__in size_t size, __in size_t size,
__in unsigned int n, __in unsigned int ndescs,
__in unsigned int completed, __in unsigned int completed,
__in unsigned int added) __in unsigned int added)
{ {
efx_qword_t qword; efx_qword_t qword;
unsigned int i; unsigned int i;
@ -1183,11 +1183,11 @@ siena_rx_qpost(
unsigned int id; unsigned int id;
/* The client driver must not overfill the queue */ /* The client driver must not overfill the queue */
EFSYS_ASSERT3U(added - completed + n, <=, EFSYS_ASSERT3U(added - completed + ndescs, <=,
EFX_RXQ_LIMIT(erp->er_mask + 1)); EFX_RXQ_LIMIT(erp->er_mask + 1));
id = added & (erp->er_mask); id = added & (erp->er_mask);
for (i = 0; i < n; i++) { for (i = 0; i < ndescs; i++) {
EFSYS_PROBE4(rx_post, unsigned int, erp->er_index, EFSYS_PROBE4(rx_post, unsigned int, erp->er_index,
unsigned int, id, efsys_dma_addr_t, addrp[i], unsigned int, id, efsys_dma_addr_t, addrp[i],
size_t, size); size_t, size);
@ -1309,7 +1309,7 @@ siena_rx_qcreate(
__in unsigned int label, __in unsigned int label,
__in efx_rxq_type_t type, __in efx_rxq_type_t type,
__in efsys_mem_t *esmp, __in efsys_mem_t *esmp,
__in size_t n, __in size_t ndescs,
__in uint32_t id, __in uint32_t id,
__in efx_evq_t *eep, __in efx_evq_t *eep,
__in efx_rxq_t *erp) __in efx_rxq_t *erp)
@ -1330,7 +1330,8 @@ siena_rx_qcreate(
EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS)); EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS));
EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS)); EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS));
if (!ISP2(n) || (n < EFX_RXQ_MINNDESCS) || (n > EFX_RXQ_MAXNDESCS)) { if (!ISP2(ndescs) ||
(ndescs < EFX_RXQ_MINNDESCS) || (ndescs > EFX_RXQ_MAXNDESCS)) {
rc = EINVAL; rc = EINVAL;
goto fail1; goto fail1;
} }
@ -1340,7 +1341,7 @@ siena_rx_qcreate(
} }
for (size = 0; (1 << size) <= (EFX_RXQ_MAXNDESCS / EFX_RXQ_MINNDESCS); for (size = 0; (1 << size) <= (EFX_RXQ_MAXNDESCS / EFX_RXQ_MINNDESCS);
size++) size++)
if ((1 << size) == (int)(n / EFX_RXQ_MINNDESCS)) if ((1 << size) == (int)(ndescs / EFX_RXQ_MINNDESCS))
break; break;
if (id + (1 << size) >= encp->enc_buftbl_limit) { if (id + (1 << size) >= encp->enc_buftbl_limit) {
rc = EINVAL; rc = EINVAL;