Since the PLL changes aren't in here yet for the AR9130 half/quarter

rate support, disable it.

sys/dev/ath/ath_hal/ar9001/ar9130_attach.c

@@ -301,6 +301,13 @@ ar9130FillCapabilityInfo(struct ath_hal *ah)
 	/* BB Read WAR */
 	pCap->halHasBBReadWar = AH_TRUE;
 
+	/*
+	 * Implement the PLL/config changes needed for half/quarter
+	 * rates before re-enabling them here.
+	 */
+	pCap->halChanHalfRate = AH_FALSE;
+	pCap->halChanQuarterRate = AH_FALSE;
+
 	return AH_TRUE;
 }
 

sys/dev/ath/ath_hal/ar9001/ar9130_phy.c

@@ -33,6 +33,9 @@ ar9130InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan)
 
 	uint32_t pll;
 
+	/*
+	 * XXX TODO: support half/quarter rates
+	 */
 	if (chan && IEEE80211_IS_CHAN_5GHZ(chan))
 		pll = 0x1450;
 	else