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Check if the device is marked as dma-coherent in the FDT, and if so, let

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busdma know, so that on architectures where dma isn't always coherent, we
know we don't have to write-back/invalidates cachelines on DMA operations.

Reviewed by:	andrew, mav
This commit is contained in:
Olivier Houchard 2017-04-26 16:13:22 +00:00
parent 76c239924e
commit b05e505d6d
3 changed files with 7 additions and 1 deletions
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3
sys/dev/ahci/ahci.c
View File

@ -249,7 +249,8 @@ ahci_attach(device_t dev)
(ctlr->caps & AHCI_CAP_64BIT) ? BUS_SPACE_MAXADDR :
BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
BUS_SPACE_MAXSIZE, BUS_SPACE_UNRESTRICTED, BUS_SPACE_MAXSIZE,
0, NULL, NULL, &ctlr->dma_tag)) {
ctlr->dma_coherent ? BUS_DMA_COHERENT : 0, NULL, NULL,
&ctlr->dma_tag)) {
ahci_free_mem(dev);
rman_fini(&ctlr->sc_iomem);
return (ENXIO);

1
sys/dev/ahci/ahci.h
View File

@ -519,6 +519,7 @@ struct ahci_controller {
void *argument;
} interrupt[AHCI_MAX_PORTS];
void (*ch_start)(struct ahci_channel *);
int dma_coherent; /* DMA is cache-coherent */
};
enum ahci_err_type {

4
sys/dev/ahci/ahci_generic.c
View File

@ -68,6 +68,8 @@ static struct ofw_compat_data compat_data[] = {
static int
ahci_fdt_probe(device_t dev)
{
struct ahci_controller *ctlr = device_get_softc(dev);
phandle_t node;
if (!ofw_bus_status_okay(dev))
return (ENXIO);
@ -76,6 +78,8 @@ ahci_fdt_probe(device_t dev)
return (ENXIO);
device_set_desc_copy(dev, "AHCI SATA controller");
node = ofw_bus_get_node(dev);
ctlr->dma_coherent = OF_hasprop(node, "dma-coherent");
return (BUS_PROBE_DEFAULT);
}
#endif