Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to

3.9.1 release.

Please note that from 3.5.0 onwards, clang, llvm and lldb require C++11
support to build; see UPDATING for more information.

Release notes for llvm, clang and lld will be available here:
<http://releases.llvm.org/3.9.1/docs/ReleaseNotes.html>
<http://releases.llvm.org/3.9.1/tools/clang/docs/ReleaseNotes.html>
<http://releases.llvm.org/3.9.1/tools/lld/docs/ReleaseNotes.html>

Relnotes:	yes
MFC after:	2 weeks
X-MFC-with:	r309124
This commit is contained in:
dim 2016-12-17 22:34:19 +00:00
commit b13376c79d
81 changed files with 2671 additions and 696 deletions

View File

@ -38,6 +38,115 @@
# xargs -n1 | sort | uniq -d;
# done
# 20161217: new clang import which bumps version from 3.9.0 to 3.9.1.
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/allocator_interface.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/asan_interface.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/common_interface_defs.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/coverage_interface.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/dfsan_interface.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/esan_interface.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/linux_syscall_hooks.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/lsan_interface.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/msan_interface.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/tsan_interface_atomic.h
OLD_DIRS+=usr/lib/clang/3.9.0/include/sanitizer
OLD_FILES+=usr/lib/clang/3.9.0/include/__clang_cuda_cmath.h
OLD_FILES+=usr/lib/clang/3.9.0/include/__clang_cuda_intrinsics.h
OLD_FILES+=usr/lib/clang/3.9.0/include/__clang_cuda_math_forward_declares.h
OLD_FILES+=usr/lib/clang/3.9.0/include/__clang_cuda_runtime_wrapper.h
OLD_FILES+=usr/lib/clang/3.9.0/include/__stddef_max_align_t.h
OLD_FILES+=usr/lib/clang/3.9.0/include/__wmmintrin_aes.h
OLD_FILES+=usr/lib/clang/3.9.0/include/__wmmintrin_pclmul.h
OLD_FILES+=usr/lib/clang/3.9.0/include/adxintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/altivec.h
OLD_FILES+=usr/lib/clang/3.9.0/include/ammintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/arm_acle.h
OLD_FILES+=usr/lib/clang/3.9.0/include/arm_neon.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx2intrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512bwintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512cdintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512dqintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512erintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512fintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512ifmaintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512ifmavlintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512pfintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vbmiintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vbmivlintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vlbwintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vlcdintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vldqintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vlintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avxintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/bmi2intrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/bmiintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/clflushoptintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/cpuid.h
OLD_FILES+=usr/lib/clang/3.9.0/include/cuda_builtin_vars.h
OLD_FILES+=usr/lib/clang/3.9.0/include/emmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/f16cintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/fma4intrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/fmaintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/fxsrintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/htmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/htmxlintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/ia32intrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/immintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/lzcntintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/mm3dnow.h
OLD_FILES+=usr/lib/clang/3.9.0/include/mm_malloc.h
OLD_FILES+=usr/lib/clang/3.9.0/include/mmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/module.modulemap
OLD_FILES+=usr/lib/clang/3.9.0/include/mwaitxintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/nmmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/opencl-c.h
OLD_FILES+=usr/lib/clang/3.9.0/include/pkuintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/pmmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/popcntintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/prfchwintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/rdseedintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/rtmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/s390intrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/shaintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/smmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/tbmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/tmmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/vadefs.h
OLD_FILES+=usr/lib/clang/3.9.0/include/vecintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/wmmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/x86intrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/xmmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/xopintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/xsavecintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/xsaveintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/xsaveoptintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/xsavesintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/xtestintrin.h
OLD_DIRS+=usr/lib/clang/3.9.0/include
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-i386.so
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-preinit-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-preinit-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-x86_64.so
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan_cxx-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan_cxx-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.profile-arm.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.profile-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.profile-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.safestack-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.safestack-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.stats-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.stats-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.stats_client-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.stats_client-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.ubsan_standalone-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.ubsan_standalone-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.ubsan_standalone_cxx-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.ubsan_standalone_cxx-x86_64.a
OLD_DIRS+=usr/lib/clang/3.9.0/lib/freebsd
OLD_DIRS+=usr/lib/clang/3.9.0/lib
OLD_DIRS+=usr/lib/clang/3.9.0
# 20161205: libproc version bump
OLD_LIBS+=usr/lib/libproc.so.3
OLD_LIBS+=usr/lib32/libproc.so.3

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@ -51,6 +51,11 @@ NOTE TO PEOPLE WHO THINK THAT FreeBSD 12.x IS SLOW:
****************************** SPECIAL WARNING: ******************************
20161217:
Clang, llvm, lldb, compiler-rt and libc++ have been upgraded to 3.9.1.
Please see the 20141231 entry below for information about prerequisites
and upgrading, if you are not already using clang 3.5.0 or higher.
20161124:
Clang, llvm, lldb, compiler-rt and libc++ have been upgraded to 3.9.0.
Please see the 20141231 entry below for information about prerequisites

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@ -12,6 +12,17 @@
#include "int_lib.h"
#include <unwind.h>
#if defined(__arm__) && !defined(__ARM_DWARF_EH__) && !defined(__USING_SJLJ_EXCEPTIONS__)
/*
* When building with older compilers (e.g. clang <3.9), it is possible that we
* have a version of unwind.h which does not provide the EHABI declarations
* which are quired for the C personality to conform to the specification. In
* order to provide forward compatibility for such compilers, we re-declare the
* necessary interfaces in the helper to permit a standalone compilation of the
* builtins (which contains the C unwinding personality for historical reasons).
*/
#include "unwind-ehabi-helpers.h"
#endif
/*
* Pointer encodings documented at:

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@ -0,0 +1,55 @@
/* ===-- arm-ehabi-helpers.h - Supplementary ARM EHABI declarations --------===
*
* The LLVM Compiler Infrastructure
*
* This file is dual licensed under the MIT and the University of Illinois Open
* Source Licenses. See LICENSE.TXT for details.
*
* ===--------------------------------------------------------------------=== */
#ifndef UNWIND_EHABI_HELPERS_H
#define UNWIND_EHABI_HELPERS_H
#include <stdint.h>
/* NOTE: see reasoning for this inclusion below */
#include <unwind.h>
#if !defined(__ARM_EABI_UNWINDER__)
/*
* NOTE: _URC_OK, _URC_FAILURE must be present as preprocessor tokens. This
* allows for a substitution of a constant which can be cast into the
* appropriate enumerated type. This header is expected to always be included
* AFTER unwind.h (which is why it is forcefully included above). This ensures
* that we do not overwrite the token for the enumeration. Subsequent uses of
* the token would be clean to rewrite with constant values.
*
* The typedef redeclaration should be safe. Due to the protection granted to
* us by the `__ARM_EABI_UNWINDER__` above, we are guaranteed that we are in a
* header not vended by gcc. The HP unwinder (being an itanium unwinder) does
* not support EHABI, and the GNU unwinder, derived from the HP unwinder, also
* does not support EHABI as of the introduction of this header. As such, we
* are fairly certain that we are in the LLVM case. Here, _Unwind_State is a
* typedef, and so we can get away with a redeclaration.
*
* Guarded redefinitions of the needed unwind state prevent the redefinition of
* those states.
*/
#define _URC_OK 0
#define _URC_FAILURE 9
typedef uint32_t _Unwind_State;
#if !defined(_US_UNWIND_FRAME_STARTING)
#define _US_UNWIND_FRAME_STARTING ((_Unwind_State)1)
#endif
#if !defined(_US_ACTION_MASK)
#define _US_ACTION_MASK ((_Unwind_State)3)
#endif
#endif
#endif

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@ -681,7 +681,7 @@ public:
<
_CheckArgsConstructor<
_Dummy
>::template __enable_implicit<_Tp...>(),
>::template __enable_implicit<_Tp const&...>(),
bool
>::type = false
>
@ -699,7 +699,7 @@ public:
<
_CheckArgsConstructor<
_Dummy
>::template __enable_explicit<_Tp...>(),
>::template __enable_explicit<_Tp const&...>(),
bool
>::type = false
>
@ -717,7 +717,7 @@ public:
<
_CheckArgsConstructor<
_Dummy
>::template __enable_implicit<_Tp...>(),
>::template __enable_implicit<_Tp const&...>(),
bool
>::type = false
>
@ -736,7 +736,7 @@ public:
<
_CheckArgsConstructor<
_Dummy
>::template __enable_explicit<_Tp...>(),
>::template __enable_explicit<_Tp const&...>(),
bool
>::type = false
>

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@ -334,9 +334,11 @@ class RuntimePointerChecking {
struct PointerInfo {
/// Holds the pointer value that we need to check.
TrackingVH<Value> PointerValue;
/// Holds the pointer value at the beginning of the loop.
/// Holds the smallest byte address accessed by the pointer throughout all
/// iterations of the loop.
const SCEV *Start;
/// Holds the pointer value at the end of the loop.
/// Holds the largest byte address accessed by the pointer throughout all
/// iterations of the loop, plus 1.
const SCEV *End;
/// Holds the information if this pointer is used for writing to memory.
bool IsWritePtr;

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@ -72,7 +72,7 @@ class RTDyldMemoryManager : public MCJITMemoryManager,
}
void deregisterEHFrames(uint8_t *Addr, uint64_t LoadAddr, size_t Size) override {
registerEHFramesInProcess(Addr, Size);
deregisterEHFramesInProcess(Addr, Size);
}
/// This method returns the address of the specified function or variable in

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@ -668,13 +668,12 @@ def int_masked_gather: Intrinsic<[llvm_anyvector_ty],
[LLVMVectorOfPointersToElt<0>, llvm_i32_ty,
LLVMVectorSameWidth<0, llvm_i1_ty>,
LLVMMatchType<0>],
[IntrReadMem, IntrArgMemOnly]>;
[IntrReadMem]>;
def int_masked_scatter: Intrinsic<[],
[llvm_anyvector_ty,
LLVMVectorOfPointersToElt<0>, llvm_i32_ty,
LLVMVectorSameWidth<0, llvm_i1_ty>],
[IntrArgMemOnly]>;
LLVMVectorSameWidth<0, llvm_i1_ty>]>;
// Test whether a pointer is associated with a type metadata identifier.
def int_type_test : Intrinsic<[llvm_i1_ty], [llvm_ptr_ty, llvm_metadata_ty],

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@ -59,6 +59,8 @@ class TypeFinder {
StructType *&operator[](unsigned Idx) { return StructTypes[Idx]; }
DenseSet<const MDNode *> &getVisitedMetadata() { return VisitedMetadata; }
private:
/// incorporateType - This method adds the type to the list of used
/// structures if it's not in there already.

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@ -20,11 +20,11 @@
#include <ciso646> // So we can check the C++ standard lib macros.
#include <functional>
// We use std::call_once on all Unix platforms except for NetBSD with
// libstdc++. That platform has a bug they are working to fix, and they'll
// remove the NetBSD checks once fixed.
#if defined(LLVM_ON_UNIX) && \
!(defined(__NetBSD__) && !defined(_LIBCPP_VERSION)) && !defined(__ppc__)
// std::call_once from libc++ is used on all Unix platforms. Other
// implementations like libstdc++ are known to have problems on NetBSD,
// OpenBSD and PowerPC.
#if defined(LLVM_ON_UNIX) && (defined(_LIBCPP_VERSION) || \
!(defined(__NetBSD__) || defined(__OpenBSD__) || defined(__ppc__)))
#define LLVM_THREADING_USE_STD_CALL_ONCE 1
#else
#define LLVM_THREADING_USE_STD_CALL_ONCE 0

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@ -148,6 +148,19 @@ const SCEV *llvm::replaceSymbolicStrideSCEV(PredicatedScalarEvolution &PSE,
return OrigSCEV;
}
/// Calculate Start and End points of memory access.
/// Let's assume A is the first access and B is a memory access on N-th loop
/// iteration. Then B is calculated as:
/// B = A + Step*N .
/// Step value may be positive or negative.
/// N is a calculated back-edge taken count:
/// N = (TripCount > 0) ? RoundDown(TripCount -1 , VF) : 0
/// Start and End points are calculated in the following way:
/// Start = UMIN(A, B) ; End = UMAX(A, B) + SizeOfElt,
/// where SizeOfElt is the size of single memory access in bytes.
///
/// There is no conflict when the intervals are disjoint:
/// NoConflict = (P2.Start >= P1.End) || (P1.Start >= P2.End)
void RuntimePointerChecking::insert(Loop *Lp, Value *Ptr, bool WritePtr,
unsigned DepSetId, unsigned ASId,
const ValueToValueMap &Strides,
@ -176,12 +189,17 @@ void RuntimePointerChecking::insert(Loop *Lp, Value *Ptr, bool WritePtr,
if (CStep->getValue()->isNegative())
std::swap(ScStart, ScEnd);
} else {
// Fallback case: the step is not constant, but the we can still
// Fallback case: the step is not constant, but we can still
// get the upper and lower bounds of the interval by using min/max
// expressions.
ScStart = SE->getUMinExpr(ScStart, ScEnd);
ScEnd = SE->getUMaxExpr(AR->getStart(), ScEnd);
}
// Add the size of the pointed element to ScEnd.
unsigned EltSize =
Ptr->getType()->getPointerElementType()->getScalarSizeInBits() / 8;
const SCEV *EltSizeSCEV = SE->getConstant(ScEnd->getType(), EltSize);
ScEnd = SE->getAddExpr(ScEnd, EltSizeSCEV);
}
Pointers.emplace_back(Ptr, ScStart, ScEnd, WritePtr, DepSetId, ASId, Sc);
@ -1863,9 +1881,17 @@ std::pair<Instruction *, Instruction *> LoopAccessInfo::addRuntimeChecks(
Value *End0 = ChkBuilder.CreateBitCast(A.End, PtrArithTy1, "bc");
Value *End1 = ChkBuilder.CreateBitCast(B.End, PtrArithTy0, "bc");
Value *Cmp0 = ChkBuilder.CreateICmpULE(Start0, End1, "bound0");
// [A|B].Start points to the first accessed byte under base [A|B].
// [A|B].End points to the last accessed byte, plus one.
// There is no conflict when the intervals are disjoint:
// NoConflict = (B.Start >= A.End) || (A.Start >= B.End)
//
// bound0 = (B.Start < A.End)
// bound1 = (A.Start < B.End)
// IsConflict = bound0 & bound1
Value *Cmp0 = ChkBuilder.CreateICmpULT(Start0, End1, "bound0");
FirstInst = getFirstInst(FirstInst, Cmp0, Loc);
Value *Cmp1 = ChkBuilder.CreateICmpULE(Start1, End0, "bound1");
Value *Cmp1 = ChkBuilder.CreateICmpULT(Start1, End0, "bound1");
FirstInst = getFirstInst(FirstInst, Cmp1, Loc);
Value *IsConflict = ChkBuilder.CreateAnd(Cmp0, Cmp1, "found.conflict");
FirstInst = getFirstInst(FirstInst, IsConflict, Loc);

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@ -776,9 +776,8 @@ bool BranchFolder::CreateCommonTailOnlyBlock(MachineBasicBlock *&PredBB,
}
static void
mergeMMOsFromMemoryOperations(MachineBasicBlock::iterator MBBIStartPos,
mergeOperations(MachineBasicBlock::iterator MBBIStartPos,
MachineBasicBlock &MBBCommon) {
// Merge MMOs from memory operations in the common block.
MachineBasicBlock *MBB = MBBIStartPos->getParent();
// Note CommonTailLen does not necessarily matches the size of
// the common BB nor all its instructions because of debug
@ -808,8 +807,18 @@ mergeMMOsFromMemoryOperations(MachineBasicBlock::iterator MBBIStartPos,
"Reached BB end within common tail length!");
assert(MBBICommon->isIdenticalTo(*MBBI) && "Expected matching MIIs!");
// Merge MMOs from memory operations in the common block.
if (MBBICommon->mayLoad() || MBBICommon->mayStore())
MBBICommon->setMemRefs(MBBICommon->mergeMemRefsWith(*MBBI));
// Drop undef flags if they aren't present in all merged instructions.
for (unsigned I = 0, E = MBBICommon->getNumOperands(); I != E; ++I) {
MachineOperand &MO = MBBICommon->getOperand(I);
if (MO.isReg() && MO.isUndef()) {
const MachineOperand &OtherMO = MBBI->getOperand(I);
if (!OtherMO.isUndef())
MO.setIsUndef(false);
}
}
++MBBI;
++MBBICommon;
@ -928,8 +937,8 @@ bool BranchFolder::TryTailMergeBlocks(MachineBasicBlock *SuccBB,
continue;
DEBUG(dbgs() << "BB#" << SameTails[i].getBlock()->getNumber()
<< (i == e-1 ? "" : ", "));
// Merge MMOs from memory operations as needed.
mergeMMOsFromMemoryOperations(SameTails[i].getTailStartPos(), *MBB);
// Merge operations (MMOs, undef flags)
mergeOperations(SameTails[i].getTailStartPos(), *MBB);
// Hack the end off BB i, making it jump to BB commonTailIndex instead.
ReplaceTailWithBranchTo(SameTails[i].getTailStartPos(), MBB);
// BB i is no longer a predecessor of SuccBB; remove it from the worklist.

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@ -2185,24 +2185,29 @@ void DAGTypeLegalizer::ExpandIntRes_MUL(SDNode *N,
// options. This is a trivially-generalized version of the code from
// Hacker's Delight (itself derived from Knuth's Algorithm M from section
// 4.3.1).
SDValue Mask =
DAG.getConstant(APInt::getLowBitsSet(NVT.getSizeInBits(),
NVT.getSizeInBits() >> 1), dl, NVT);
unsigned Bits = NVT.getSizeInBits();
unsigned HalfBits = Bits >> 1;
SDValue Mask = DAG.getConstant(APInt::getLowBitsSet(Bits, HalfBits), dl,
NVT);
SDValue LLL = DAG.getNode(ISD::AND, dl, NVT, LL, Mask);
SDValue RLL = DAG.getNode(ISD::AND, dl, NVT, RL, Mask);
SDValue T = DAG.getNode(ISD::MUL, dl, NVT, LLL, RLL);
SDValue TL = DAG.getNode(ISD::AND, dl, NVT, T, Mask);
SDValue Shift =
DAG.getConstant(NVT.getSizeInBits() >> 1, dl,
TLI.getShiftAmountTy(NVT, DAG.getDataLayout()));
EVT ShiftAmtTy = TLI.getShiftAmountTy(NVT, DAG.getDataLayout());
if (APInt::getMaxValue(ShiftAmtTy.getSizeInBits()).ult(HalfBits)) {
// The type from TLI is too small to fit the shift amount we want.
// Override it with i32. The shift will have to be legalized.
ShiftAmtTy = MVT::i32;
}
SDValue Shift = DAG.getConstant(HalfBits, dl, ShiftAmtTy);
SDValue TH = DAG.getNode(ISD::SRL, dl, NVT, T, Shift);
SDValue LLH = DAG.getNode(ISD::SRL, dl, NVT, LL, Shift);
SDValue RLH = DAG.getNode(ISD::SRL, dl, NVT, RL, Shift);
SDValue U = DAG.getNode(ISD::ADD, dl, NVT,
DAG.getNode(ISD::MUL, dl, NVT, LLH, RLL), TL);
DAG.getNode(ISD::MUL, dl, NVT, LLH, RLL), TH);
SDValue UL = DAG.getNode(ISD::AND, dl, NVT, U, Mask);
SDValue UH = DAG.getNode(ISD::SRL, dl, NVT, U, Shift);
@ -2211,9 +2216,9 @@ void DAGTypeLegalizer::ExpandIntRes_MUL(SDNode *N,
SDValue VH = DAG.getNode(ISD::SRL, dl, NVT, V, Shift);
SDValue W = DAG.getNode(ISD::ADD, dl, NVT,
DAG.getNode(ISD::MUL, dl, NVT, LL, RL),
DAG.getNode(ISD::MUL, dl, NVT, LLH, RLH),
DAG.getNode(ISD::ADD, dl, NVT, UH, VH));
Lo = DAG.getNode(ISD::ADD, dl, NVT, TH,
Lo = DAG.getNode(ISD::ADD, dl, NVT, TL,
DAG.getNode(ISD::SHL, dl, NVT, V, Shift));
Hi = DAG.getNode(ISD::ADD, dl, NVT, W,

View File

@ -694,6 +694,14 @@ void IRLinker::computeTypeMapping() {
if (!ST->hasName())
continue;
if (TypeMap.DstStructTypesSet.hasType(ST)) {
// This is actually a type from the destination module.
// getIdentifiedStructTypes() can have found it by walking debug info
// metadata nodes, some of which get linked by name when ODR Type Uniquing
// is enabled on the Context, from the source to the destination module.
continue;
}
// Check to see if there is a dot in the name followed by a digit.
size_t DotPos = ST->getName().rfind('.');
if (DotPos == 0 || DotPos == StringRef::npos ||
@ -1336,13 +1344,19 @@ bool IRMover::IdentifiedStructTypeSet::hasType(StructType *Ty) {
IRMover::IRMover(Module &M) : Composite(M) {
TypeFinder StructTypes;
StructTypes.run(M, true);
StructTypes.run(M, /* OnlyNamed */ false);
for (StructType *Ty : StructTypes) {
if (Ty->isOpaque())
IdentifiedStructTypes.addOpaque(Ty);
else
IdentifiedStructTypes.addNonOpaque(Ty);
}
// Self-map metadatas in the destination module. This is needed when
// DebugTypeODRUniquing is enabled on the LLVMContext, since metadata in the
// destination module may be reached from the source module.
for (auto *MD : StructTypes.getVisitedMetadata()) {
SharedMDs[MD].reset(const_cast<MDNode *>(MD));
}
}
Error IRMover::move(

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@ -412,7 +412,7 @@ void llvm::sys::PrintStackTrace(raw_ostream &OS) {
if (printSymbolizedStackTrace(Argv0, StackTrace, depth, OS))
return;
#if HAVE_DLFCN_H && __GNUG__
#if HAVE_DLFCN_H && __GNUG__ && !defined(__CYGWIN__)
int width = 0;
for (int i = 0; i < depth; ++i) {
Dl_info dlinfo;

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@ -718,13 +718,21 @@ bool AArch64ExpandPseudo::expandCMP_SWAP_128(
.addReg(DestLo.getReg(), getKillRegState(DestLo.isDead()))
.addOperand(DesiredLo)
.addImm(0);
BuildMI(LoadCmpBB, DL, TII->get(AArch64::SBCSXr), AArch64::XZR)
BuildMI(LoadCmpBB, DL, TII->get(AArch64::CSINCWr), StatusReg)
.addReg(AArch64::WZR)
.addReg(AArch64::WZR)
.addImm(AArch64CC::EQ);
BuildMI(LoadCmpBB, DL, TII->get(AArch64::SUBSXrs), AArch64::XZR)
.addReg(DestHi.getReg(), getKillRegState(DestHi.isDead()))
.addOperand(DesiredHi);
BuildMI(LoadCmpBB, DL, TII->get(AArch64::Bcc))
.addImm(AArch64CC::NE)
.addMBB(DoneBB)
.addReg(AArch64::NZCV, RegState::Implicit | RegState::Kill);
.addOperand(DesiredHi)
.addImm(0);
BuildMI(LoadCmpBB, DL, TII->get(AArch64::CSINCWr), StatusReg)
.addReg(StatusReg, RegState::Kill)
.addReg(StatusReg, RegState::Kill)
.addImm(AArch64CC::EQ);
BuildMI(LoadCmpBB, DL, TII->get(AArch64::CBNZW))
.addReg(StatusReg, RegState::Kill)
.addMBB(DoneBB);
LoadCmpBB->addSuccessor(DoneBB);
LoadCmpBB->addSuccessor(StoreBB);

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@ -10083,17 +10083,24 @@ static void ReplaceReductionResults(SDNode *N,
Results.push_back(SplitVal);
}
static std::pair<SDValue, SDValue> splitInt128(SDValue N, SelectionDAG &DAG) {
SDLoc DL(N);
SDValue Lo = DAG.getNode(ISD::TRUNCATE, DL, MVT::i64, N);
SDValue Hi = DAG.getNode(ISD::TRUNCATE, DL, MVT::i64,
DAG.getNode(ISD::SRL, DL, MVT::i128, N,
DAG.getConstant(64, DL, MVT::i64)));
return std::make_pair(Lo, Hi);
}
static void ReplaceCMP_SWAP_128Results(SDNode *N,
SmallVectorImpl<SDValue> & Results,
SelectionDAG &DAG) {
assert(N->getValueType(0) == MVT::i128 &&
"AtomicCmpSwap on types less than 128 should be legal");
SDValue Ops[] = {N->getOperand(1),
N->getOperand(2)->getOperand(0),
N->getOperand(2)->getOperand(1),
N->getOperand(3)->getOperand(0),
N->getOperand(3)->getOperand(1),
N->getOperand(0)};
auto Desired = splitInt128(N->getOperand(2), DAG);
auto New = splitInt128(N->getOperand(3), DAG);
SDValue Ops[] = {N->getOperand(1), Desired.first, Desired.second,
New.first, New.second, N->getOperand(0)};
SDNode *CmpSwap = DAG.getMachineNode(
AArch64::CMP_SWAP_128, SDLoc(N),
DAG.getVTList(MVT::i64, MVT::i64, MVT::i32, MVT::Other), Ops);

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@ -2203,7 +2203,8 @@ void SIInstrInfo::legalizeOperandsSMRD(MachineRegisterInfo &MRI,
}
void SIInstrInfo::legalizeOperands(MachineInstr &MI) const {
MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
MachineFunction &MF = *MI.getParent()->getParent();
MachineRegisterInfo &MRI = MF.getRegInfo();
// Legalize VOP2
if (isVOP2(MI) || isVOPC(MI)) {
@ -2321,8 +2322,14 @@ void SIInstrInfo::legalizeOperands(MachineInstr &MI) const {
return;
}
// Legalize MIMG
if (isMIMG(MI)) {
// Legalize MIMG and MUBUF/MTBUF for shaders.
//
// Shaders only generate MUBUF/MTBUF instructions via intrinsics or via
// scratch memory access. In both cases, the legalization never involves
// conversion to the addr64 form.
if (isMIMG(MI) ||
(AMDGPU::isShader(MF.getFunction()->getCallingConv()) &&
(isMUBUF(MI) || isMTBUF(MI)))) {
MachineOperand *SRsrc = getNamedOperand(MI, AMDGPU::OpName::srsrc);
if (SRsrc && !RI.isSGPRClass(MRI.getRegClass(SRsrc->getReg()))) {
unsigned SGPR = readlaneVGPRToSGPR(SRsrc->getReg(), MI, MRI);
@ -2337,9 +2344,10 @@ void SIInstrInfo::legalizeOperands(MachineInstr &MI) const {
return;
}
// Legalize MUBUF* instructions
// Legalize MUBUF* instructions by converting to addr64 form.
// FIXME: If we start using the non-addr64 instructions for compute, we
// may need to legalize them here.
// may need to legalize them as above. This especially applies to the
// buffer_load_format_* variants and variants with idxen (or bothen).
int SRsrcIdx =
AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::srsrc);
if (SRsrcIdx != -1) {

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@ -2029,6 +2029,7 @@ def SI_RETURN : PseudoInstSI <
let hasSideEffects = 1;
let SALU = 1;
let hasNoSchedulingInfo = 1;
let DisableWQM = 1;
}
let Uses = [EXEC], Defs = [EXEC, VCC, M0],

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@ -219,13 +219,6 @@ char SIWholeQuadMode::scanInstructions(MachineFunction &MF,
markInstruction(MI, Flags, Worklist);
GlobalFlags |= Flags;
}
if (WQMOutputs && MBB.succ_empty()) {
// This is a prolog shader. Make sure we go back to exact mode at the end.
Blocks[&MBB].OutNeeds = StateExact;
Worklist.push_back(&MBB);
GlobalFlags |= StateExact;
}
}
return GlobalFlags;

View File

@ -932,13 +932,10 @@ bool ARMExpandPseudo::ExpandCMP_SWAP_64(MachineBasicBlock &MBB,
.addReg(DestLo, getKillRegState(Dest.isDead()))
.addReg(DesiredLo, getKillRegState(Desired.isDead())));
unsigned SBCrr = IsThumb ? ARM::t2SBCrr : ARM::SBCrr;
MIB = BuildMI(LoadCmpBB, DL, TII->get(SBCrr))
.addReg(StatusReg, RegState::Define | RegState::Dead)
BuildMI(LoadCmpBB, DL, TII->get(CMPrr))
.addReg(DestHi, getKillRegState(Dest.isDead()))
.addReg(DesiredHi, getKillRegState(Desired.isDead()));
AddDefaultPred(MIB);
MIB.addReg(ARM::CPSR, RegState::Kill);
.addReg(DesiredHi, getKillRegState(Desired.isDead()))
.addImm(ARMCC::EQ).addReg(ARM::CPSR, RegState::Kill);
unsigned Bcc = IsThumb ? ARM::tBcc : ARM::Bcc;
BuildMI(LoadCmpBB, DL, TII->get(Bcc))

View File

@ -4819,6 +4819,10 @@ def : t2InstAlias<"add${p} $Rd, pc, $imm",
def t2LDRConstPool
: t2AsmPseudo<"ldr${p} $Rt, $immediate",
(ins GPRnopc:$Rt, const_pool_asm_imm:$immediate, pred:$p)>;
// Version w/ the .w suffix.
def : t2InstAlias<"ldr${p}.w $Rt, $immediate",
(t2LDRConstPool GPRnopc:$Rt,
const_pool_asm_imm:$immediate, pred:$p)>;
// PLD/PLDW/PLI with alternate literal form.
def : t2InstAlias<"pld${p} $addr",

View File

@ -6933,6 +6933,9 @@ bool ARMAsmParser::processInstruction(MCInst &Inst,
else if (Inst.getOpcode() == ARM::t2LDRConstPool)
TmpInst.setOpcode(ARM::t2LDRpci);
const ARMOperand &PoolOperand =
(static_cast<ARMOperand &>(*Operands[2]).isToken() &&
static_cast<ARMOperand &>(*Operands[2]).getToken() == ".w") ?
static_cast<ARMOperand &>(*Operands[4]) :
static_cast<ARMOperand &>(*Operands[3]);
const MCExpr *SubExprVal = PoolOperand.getConstantPoolImm();
// If SubExprVal is a constant we may be able to use a MOV

View File

@ -667,9 +667,10 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM,
addRegisterClass(MVT::v2i64, &PPC::VRRCRegClass);
addRegisterClass(MVT::v1i128, &PPC::VRRCRegClass);
}
if (Subtarget.hasP9Vector()) {
setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Legal);
setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Legal);
setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Custom);
setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Custom);
}
}
@ -7868,6 +7869,17 @@ SDValue PPCTargetLowering::LowerSCALAR_TO_VECTOR(SDValue Op,
return DAG.getLoad(Op.getValueType(), dl, Store, FIdx, MachinePointerInfo());
}
SDValue PPCTargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,
SelectionDAG &DAG) const {
assert(Op.getOpcode() == ISD::INSERT_VECTOR_ELT &&
"Should only be called for ISD::INSERT_VECTOR_ELT");
ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(2));
// We have legal lowering for constant indices but not for variable ones.
if (C)
return Op;
return SDValue();
}
SDValue PPCTargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op,
SelectionDAG &DAG) const {
SDLoc dl(Op);
@ -8273,6 +8285,7 @@ SDValue PPCTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
case ISD::SCALAR_TO_VECTOR: return LowerSCALAR_TO_VECTOR(Op, DAG);
case ISD::SIGN_EXTEND_INREG: return LowerSIGN_EXTEND_INREG(Op, DAG);
case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR_ELT(Op, DAG);
case ISD::INSERT_VECTOR_ELT: return LowerINSERT_VECTOR_ELT(Op, DAG);
case ISD::MUL: return LowerMUL(Op, DAG);
// For counter-based loop handling.
@ -8397,7 +8410,9 @@ Instruction* PPCTargetLowering::emitTrailingFence(IRBuilder<> &Builder,
MachineBasicBlock *
PPCTargetLowering::EmitAtomicBinary(MachineInstr &MI, MachineBasicBlock *BB,
unsigned AtomicSize,
unsigned BinOpcode) const {
unsigned BinOpcode,
unsigned CmpOpcode,
unsigned CmpPred) const {
// This also handles ATOMIC_SWAP, indicated by BinOpcode==0.
const TargetInstrInfo *TII = Subtarget.getInstrInfo();
@ -8437,8 +8452,12 @@ PPCTargetLowering::EmitAtomicBinary(MachineInstr &MI, MachineBasicBlock *BB,
DebugLoc dl = MI.getDebugLoc();
MachineBasicBlock *loopMBB = F->CreateMachineBasicBlock(LLVM_BB);
MachineBasicBlock *loop2MBB =
CmpOpcode ? F->CreateMachineBasicBlock(LLVM_BB) : nullptr;
MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB);
F->insert(It, loopMBB);
if (CmpOpcode)
F->insert(It, loop2MBB);
F->insert(It, exitMBB);
exitMBB->splice(exitMBB->begin(), BB,
std::next(MachineBasicBlock::iterator(MI)), BB->end());
@ -8460,11 +8479,40 @@ PPCTargetLowering::EmitAtomicBinary(MachineInstr &MI, MachineBasicBlock *BB,
// st[wd]cx. r0, ptr
// bne- loopMBB
// fallthrough --> exitMBB
// For max/min...
// loopMBB:
// l[wd]arx dest, ptr
// cmpl?[wd] incr, dest
// bgt exitMBB
// loop2MBB:
// st[wd]cx. dest, ptr
// bne- loopMBB
// fallthrough --> exitMBB
BB = loopMBB;
BuildMI(BB, dl, TII->get(LoadMnemonic), dest)
.addReg(ptrA).addReg(ptrB);
if (BinOpcode)
BuildMI(BB, dl, TII->get(BinOpcode), TmpReg).addReg(incr).addReg(dest);
if (CmpOpcode) {
// Signed comparisons of byte or halfword values must be sign-extended.
if (CmpOpcode == PPC::CMPW && AtomicSize < 4) {
unsigned ExtReg = RegInfo.createVirtualRegister(&PPC::GPRCRegClass);
BuildMI(BB, dl, TII->get(AtomicSize == 1 ? PPC::EXTSB : PPC::EXTSH),
ExtReg).addReg(dest);
BuildMI(BB, dl, TII->get(CmpOpcode), PPC::CR0)
.addReg(incr).addReg(ExtReg);
} else
BuildMI(BB, dl, TII->get(CmpOpcode), PPC::CR0)
.addReg(incr).addReg(dest);
BuildMI(BB, dl, TII->get(PPC::BCC))
.addImm(CmpPred).addReg(PPC::CR0).addMBB(exitMBB);
BB->addSuccessor(loop2MBB);
BB->addSuccessor(exitMBB);
BB = loop2MBB;
}
BuildMI(BB, dl, TII->get(StoreMnemonic))
.addReg(TmpReg).addReg(ptrA).addReg(ptrB);
BuildMI(BB, dl, TII->get(PPC::BCC))
@ -8482,10 +8530,13 @@ MachineBasicBlock *
PPCTargetLowering::EmitPartwordAtomicBinary(MachineInstr &MI,
MachineBasicBlock *BB,
bool is8bit, // operation
unsigned BinOpcode) const {
unsigned BinOpcode,
unsigned CmpOpcode,
unsigned CmpPred) const {
// If we support part-word atomic mnemonics, just use them
if (Subtarget.hasPartwordAtomics())
return EmitAtomicBinary(MI, BB, is8bit ? 1 : 2, BinOpcode);
return EmitAtomicBinary(MI, BB, is8bit ? 1 : 2, BinOpcode,
CmpOpcode, CmpPred);
// This also handles ATOMIC_SWAP, indicated by BinOpcode==0.
const TargetInstrInfo *TII = Subtarget.getInstrInfo();
@ -8507,8 +8558,12 @@ PPCTargetLowering::EmitPartwordAtomicBinary(MachineInstr &MI,
DebugLoc dl = MI.getDebugLoc();
MachineBasicBlock *loopMBB = F->CreateMachineBasicBlock(LLVM_BB);
MachineBasicBlock *loop2MBB =
CmpOpcode ? F->CreateMachineBasicBlock(LLVM_BB) : nullptr;
MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB);
F->insert(It, loopMBB);
if (CmpOpcode)
F->insert(It, loop2MBB);
F->insert(It, exitMBB);
exitMBB->splice(exitMBB->begin(), BB,
std::next(MachineBasicBlock::iterator(MI)), BB->end());
@ -8593,6 +8648,32 @@ PPCTargetLowering::EmitPartwordAtomicBinary(MachineInstr &MI,
.addReg(TmpDestReg).addReg(MaskReg);
BuildMI(BB, dl, TII->get(is64bit ? PPC::AND8 : PPC::AND), Tmp3Reg)
.addReg(TmpReg).addReg(MaskReg);
if (CmpOpcode) {
// For unsigned comparisons, we can directly compare the shifted values.
// For signed comparisons we shift and sign extend.
unsigned SReg = RegInfo.createVirtualRegister(RC);
BuildMI(BB, dl, TII->get(is64bit ? PPC::AND8 : PPC::AND), SReg)
.addReg(TmpDestReg).addReg(MaskReg);
unsigned ValueReg = SReg;
unsigned CmpReg = Incr2Reg;
if (CmpOpcode == PPC::CMPW) {
ValueReg = RegInfo.createVirtualRegister(RC);
BuildMI(BB, dl, TII->get(PPC::SRW), ValueReg)
.addReg(SReg).addReg(ShiftReg);
unsigned ValueSReg = RegInfo.createVirtualRegister(RC);
BuildMI(BB, dl, TII->get(is8bit ? PPC::EXTSB : PPC::EXTSH), ValueSReg)
.addReg(ValueReg);
ValueReg = ValueSReg;
CmpReg = incr;
}
BuildMI(BB, dl, TII->get(CmpOpcode), PPC::CR0)
.addReg(CmpReg).addReg(ValueReg);
BuildMI(BB, dl, TII->get(PPC::BCC))
.addImm(CmpPred).addReg(PPC::CR0).addMBB(exitMBB);
BB->addSuccessor(loop2MBB);
BB->addSuccessor(exitMBB);
BB = loop2MBB;
}
BuildMI(BB, dl, TII->get(is64bit ? PPC::OR8 : PPC::OR), Tmp4Reg)
.addReg(Tmp3Reg).addReg(Tmp2Reg);
BuildMI(BB, dl, TII->get(PPC::STWCX))
@ -9099,6 +9180,42 @@ PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_SUB_I64)
BB = EmitAtomicBinary(MI, BB, 8, PPC::SUBF8);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MIN_I8)
BB = EmitPartwordAtomicBinary(MI, BB, true, 0, PPC::CMPW, PPC::PRED_GE);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MIN_I16)
BB = EmitPartwordAtomicBinary(MI, BB, false, 0, PPC::CMPW, PPC::PRED_GE);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MIN_I32)
BB = EmitAtomicBinary(MI, BB, 4, 0, PPC::CMPW, PPC::PRED_GE);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MIN_I64)
BB = EmitAtomicBinary(MI, BB, 8, 0, PPC::CMPD, PPC::PRED_GE);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MAX_I8)
BB = EmitPartwordAtomicBinary(MI, BB, true, 0, PPC::CMPW, PPC::PRED_LE);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MAX_I16)
BB = EmitPartwordAtomicBinary(MI, BB, false, 0, PPC::CMPW, PPC::PRED_LE);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MAX_I32)
BB = EmitAtomicBinary(MI, BB, 4, 0, PPC::CMPW, PPC::PRED_LE);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MAX_I64)
BB = EmitAtomicBinary(MI, BB, 8, 0, PPC::CMPD, PPC::PRED_LE);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMIN_I8)
BB = EmitPartwordAtomicBinary(MI, BB, true, 0, PPC::CMPLW, PPC::PRED_GE);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMIN_I16)
BB = EmitPartwordAtomicBinary(MI, BB, false, 0, PPC::CMPLW, PPC::PRED_GE);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMIN_I32)
BB = EmitAtomicBinary(MI, BB, 4, 0, PPC::CMPLW, PPC::PRED_GE);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMIN_I64)
BB = EmitAtomicBinary(MI, BB, 8, 0, PPC::CMPLD, PPC::PRED_GE);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMAX_I8)
BB = EmitPartwordAtomicBinary(MI, BB, true, 0, PPC::CMPLW, PPC::PRED_LE);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMAX_I16)
BB = EmitPartwordAtomicBinary(MI, BB, false, 0, PPC::CMPLW, PPC::PRED_LE);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMAX_I32)
BB = EmitAtomicBinary(MI, BB, 4, 0, PPC::CMPLW, PPC::PRED_LE);
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMAX_I64)
BB = EmitAtomicBinary(MI, BB, 8, 0, PPC::CMPLD, PPC::PRED_LE);
else if (MI.getOpcode() == PPC::ATOMIC_SWAP_I8)
BB = EmitPartwordAtomicBinary(MI, BB, true, 0);
else if (MI.getOpcode() == PPC::ATOMIC_SWAP_I16)

View File

@ -585,11 +585,15 @@ namespace llvm {
MachineBasicBlock *EmitAtomicBinary(MachineInstr &MI,
MachineBasicBlock *MBB,
unsigned AtomicSize,
unsigned BinOpcode) const;
unsigned BinOpcode,
unsigned CmpOpcode = 0,
unsigned CmpPred = 0) const;
MachineBasicBlock *EmitPartwordAtomicBinary(MachineInstr &MI,
MachineBasicBlock *MBB,
bool is8bit,
unsigned Opcode) const;
unsigned Opcode,
unsigned CmpOpcode = 0,
unsigned CmpPred = 0) const;
MachineBasicBlock *emitEHSjLjSetJmp(MachineInstr &MI,
MachineBasicBlock *MBB) const;
@ -825,6 +829,7 @@ namespace llvm {
SDValue LowerSRA_PARTS(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) const;

View File

@ -224,6 +224,18 @@ let usesCustomInserter = 1 in {
def ATOMIC_LOAD_NAND_I64 : Pseudo<
(outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_NAND_I64",
[(set i64:$dst, (atomic_load_nand_64 xoaddr:$ptr, i64:$incr))]>;
def ATOMIC_LOAD_MIN_I64 : Pseudo<
(outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_MIN_I64",
[(set i64:$dst, (atomic_load_min_64 xoaddr:$ptr, i64:$incr))]>;
def ATOMIC_LOAD_MAX_I64 : Pseudo<
(outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_MAX_I64",
[(set i64:$dst, (atomic_load_max_64 xoaddr:$ptr, i64:$incr))]>;
def ATOMIC_LOAD_UMIN_I64 : Pseudo<
(outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_UMIN_I64",
[(set i64:$dst, (atomic_load_umin_64 xoaddr:$ptr, i64:$incr))]>;
def ATOMIC_LOAD_UMAX_I64 : Pseudo<
(outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_UMAX_I64",
[(set i64:$dst, (atomic_load_umax_64 xoaddr:$ptr, i64:$incr))]>;
def ATOMIC_CMP_SWAP_I64 : Pseudo<
(outs g8rc:$dst), (ins memrr:$ptr, g8rc:$old, g8rc:$new), "#ATOMIC_CMP_SWAP_I64",

View File

@ -1509,6 +1509,18 @@ let usesCustomInserter = 1 in {
def ATOMIC_LOAD_NAND_I8 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_NAND_I8",
[(set i32:$dst, (atomic_load_nand_8 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_LOAD_MIN_I8 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_MIN_I8",
[(set i32:$dst, (atomic_load_min_8 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_LOAD_MAX_I8 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_MAX_I8",
[(set i32:$dst, (atomic_load_max_8 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_LOAD_UMIN_I8 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_UMIN_I8",
[(set i32:$dst, (atomic_load_umin_8 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_LOAD_UMAX_I8 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_UMAX_I8",
[(set i32:$dst, (atomic_load_umax_8 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_LOAD_ADD_I16 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_ADD_I16",
[(set i32:$dst, (atomic_load_add_16 xoaddr:$ptr, i32:$incr))]>;
@ -1527,6 +1539,18 @@ let usesCustomInserter = 1 in {
def ATOMIC_LOAD_NAND_I16 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_NAND_I16",
[(set i32:$dst, (atomic_load_nand_16 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_LOAD_MIN_I16 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_MIN_I16",
[(set i32:$dst, (atomic_load_min_16 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_LOAD_MAX_I16 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_MAX_I16",
[(set i32:$dst, (atomic_load_max_16 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_LOAD_UMIN_I16 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_UMIN_I16",
[(set i32:$dst, (atomic_load_umin_16 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_LOAD_UMAX_I16 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_UMAX_I16",
[(set i32:$dst, (atomic_load_umax_16 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_LOAD_ADD_I32 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_ADD_I32",
[(set i32:$dst, (atomic_load_add_32 xoaddr:$ptr, i32:$incr))]>;
@ -1545,6 +1569,18 @@ let usesCustomInserter = 1 in {
def ATOMIC_LOAD_NAND_I32 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_NAND_I32",
[(set i32:$dst, (atomic_load_nand_32 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_LOAD_MIN_I32 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_MIN_I32",
[(set i32:$dst, (atomic_load_min_32 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_LOAD_MAX_I32 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_MAX_I32",
[(set i32:$dst, (atomic_load_max_32 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_LOAD_UMIN_I32 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_UMIN_I32",
[(set i32:$dst, (atomic_load_umin_32 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_LOAD_UMAX_I32 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_UMAX_I32",
[(set i32:$dst, (atomic_load_umax_32 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_CMP_SWAP_I8 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$old, gprc:$new), "#ATOMIC_CMP_SWAP_I8",

View File

@ -8656,6 +8656,17 @@ static SDValue lowerVectorShuffleAsBroadcast(const SDLoc &DL, MVT VT,
V = DAG.getLoad(SVT, DL, Ld->getChain(), NewAddr,
DAG.getMachineFunction().getMachineMemOperand(
Ld->getMemOperand(), Offset, SVT.getStoreSize()));
// Make sure the newly-created LOAD is in the same position as Ld in
// terms of dependency. We create a TokenFactor for Ld and V,
// and update uses of Ld's output chain to use the TokenFactor.
if (Ld->hasAnyUseOfValue(1)) {
SDValue NewChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
SDValue(Ld, 1), SDValue(V.getNode(), 1));
DAG.ReplaceAllUsesOfValueWith(SDValue(Ld, 1), NewChain);
DAG.UpdateNodeOperands(NewChain.getNode(), SDValue(Ld, 1),
SDValue(V.getNode(), 1));
}
} else if (!BroadcastFromReg) {
// We can't broadcast from a vector register.
return SDValue();

View File

@ -2124,7 +2124,7 @@ let Predicates = [HasAVX512] in {
(COPY_TO_REGCLASS (i16 (EXTRACT_SUBREG $src, sub_16bit)), VK1)>;
def : Pat<(i1 (trunc (i8 GR8:$src))),
(COPY_TO_REGCLASS (i16 (SUBREG_TO_REG (i64 0), (AND8ri8 $src, (i8 1)),
(COPY_TO_REGCLASS (i16 (SUBREG_TO_REG (i64 0), (AND8ri $src, (i8 1)),
sub_8bit)), VK1)>;
def : Pat<(i1 (trunc (i8 (assertzext_i1 GR8:$src)))),

View File

@ -634,7 +634,7 @@ static bool canRewriteGEPAsOffset(Value *Start, Value *Base,
}
if (!isa<IntToPtrInst>(V) && !isa<PtrToIntInst>(V) &&
!isa<GEPOperator>(V) && !isa<PHINode>(V))
!isa<GetElementPtrInst>(V) && !isa<PHINode>(V))
// We've found some value that we can't explore which is different from
// the base. Therefore we can't do this transformation.
return false;

View File

@ -579,6 +579,13 @@ static Instruction *unpackLoadToAggregate(InstCombiner &IC, LoadInst &LI) {
UndefValue::get(T), NewLoad, 0, Name));
}
// Bail out if the array is too large. Ideally we would like to optimize
// arrays of arbitrary size but this has a terrible impact on compile time.
// The threshold here is chosen arbitrarily, maybe needs a little bit of
// tuning.
if (NumElements > 1024)
return nullptr;
const DataLayout &DL = IC.getDataLayout();
auto EltSize = DL.getTypeAllocSize(ET);
auto Align = LI.getAlignment();
@ -1081,6 +1088,13 @@ static bool unpackStoreToAggregate(InstCombiner &IC, StoreInst &SI) {
return true;
}
// Bail out if the array is too large. Ideally we would like to optimize
// arrays of arbitrary size but this has a terrible impact on compile time.
// The threshold here is chosen arbitrarily, maybe needs a little bit of
// tuning.
if (NumElements > 1024)
return false;
const DataLayout &DL = IC.getDataLayout();
auto EltSize = DL.getTypeAllocSize(AT->getElementType());
auto Align = SI.getAlignment();

View File

@ -1322,6 +1322,10 @@ bool JumpThreadingPass::ProcessBranchOnXOR(BinaryOperator *BO) {
if (!isa<PHINode>(BB->front()))
return false;
// If this BB is a landing pad, we won't be able to split the edge into it.
if (BB->isEHPad())
return false;
// If we have a xor as the branch input to this block, and we know that the
// LHS or RHS of the xor in any predecessor is true/false, then we can clone
// the condition into the predecessor and fix that value to true, saving some

View File

@ -2024,14 +2024,20 @@ static bool FoldTwoEntryPHINode(PHINode *PN, const TargetTransformInfo &TTI,
// Move all 'aggressive' instructions, which are defined in the
// conditional parts of the if's up to the dominating block.
if (IfBlock1)
if (IfBlock1) {
for (auto &I : *IfBlock1)
I.dropUnknownNonDebugMetadata();
DomBlock->getInstList().splice(InsertPt->getIterator(),
IfBlock1->getInstList(), IfBlock1->begin(),
IfBlock1->getTerminator()->getIterator());
if (IfBlock2)
}
if (IfBlock2) {
for (auto &I : *IfBlock2)
I.dropUnknownNonDebugMetadata();
DomBlock->getInstList().splice(InsertPt->getIterator(),
IfBlock2->getInstList(), IfBlock2->begin(),
IfBlock2->getTerminator()->getIterator());
}
while (PHINode *PN = dyn_cast<PHINode>(BB->begin())) {
// Change the PHI node into a select instruction.

View File

@ -44,6 +44,8 @@ class VarTemplatePartialSpecializationDecl;
typedef llvm::PointerUnion3<TemplateTypeParmDecl*, NonTypeTemplateParmDecl*,
TemplateTemplateParmDecl*> TemplateParameter;
NamedDecl *getAsNamedDecl(TemplateParameter P);
/// \brief Stores a list of template parameters for a TemplateDecl and its
/// derived classes.
class TemplateParameterList final
@ -2912,6 +2914,14 @@ class VarTemplateDecl : public RedeclarableTemplateDecl {
friend class ASTDeclWriter;
};
inline NamedDecl *getAsNamedDecl(TemplateParameter P) {
if (auto *PD = P.dyn_cast<TemplateTypeParmDecl*>())
return PD;
if (auto *PD = P.dyn_cast<NonTypeTemplateParmDecl*>())
return PD;
return P.get<TemplateTemplateParmDecl*>();
}
} /* end of namespace clang */
#endif

View File

@ -159,8 +159,6 @@ def err_drv_bitcode_unsupported_on_toolchain : Error<
"-fembed-bitcode is not supported on versions of iOS prior to 6.0">;
def warn_O4_is_O3 : Warning<"-O4 is equivalent to -O3">, InGroup<Deprecated>;
def warn_drv_lto_libpath : Warning<"libLTO.dylib relative to clang installed dir not found; using 'ld' default search path instead">,
InGroup<LibLTO>;
def warn_drv_optimization_value : Warning<"optimization level '%0' is not supported; using '%1%2' instead">,
InGroup<InvalidCommandLineArgument>;
def warn_ignored_gcc_optimization : Warning<"optimization flag '%0' is not supported">,

View File

@ -4291,7 +4291,7 @@ def err_definition_of_implicitly_declared_member : Error<
def err_definition_of_explicitly_defaulted_member : Error<
"definition of explicitly defaulted %select{default constructor|copy "
"constructor|move constructor|copy assignment operator|move assignment "
"operator|destructor}0">;
"operator|destructor|function}0">;
def err_redefinition_extern_inline : Error<
"redefinition of a 'extern inline' function %0 is not supported in "
"%select{C99 mode|C++}1">;
@ -6917,6 +6917,10 @@ def err_in_class_initializer_not_yet_parsed
def err_in_class_initializer_not_yet_parsed_outer_class
: Error<"cannot use defaulted default constructor of %0 within "
"%1 outside of member functions because %2 has an initializer">;
def err_in_class_initializer_cycle
: Error<"default member initializer for %0 uses itself">;
def err_exception_spec_cycle
: Error<"exception specification of %0 uses itself">;
def ext_in_class_initializer_non_constant : Extension<
"in-class initializer for static data member is not a constant expression; "
@ -7617,6 +7621,8 @@ def err_invalid_neon_type_code : Error<
"incompatible constant for this __builtin_neon function">;
def err_argument_invalid_range : Error<
"argument should be a value from %0 to %1">;
def err_argument_not_multiple : Error<
"argument should be a multiple of %0">;
def warn_neon_vector_initializer_non_portable : Warning<
"vector initializers are not compatible with NEON intrinsics in big endian "
"mode">, InGroup<DiagGroup<"nonportable-vector-initialization">>;

View File

@ -18,6 +18,7 @@
#include "clang/AST/Attr.h"
#include "clang/AST/Availability.h"
#include "clang/AST/DeclarationName.h"
#include "clang/AST/DeclTemplate.h"
#include "clang/AST/Expr.h"
#include "clang/AST/ExprObjC.h"
#include "clang/AST/ExternalASTSource.h"
@ -1217,8 +1218,10 @@ class Sema {
/// \brief Retrieve the current block, if any.
sema::BlockScopeInfo *getCurBlock();
/// \brief Retrieve the current lambda scope info, if any.
sema::LambdaScopeInfo *getCurLambda();
/// Retrieve the current lambda scope info, if any.
/// \param IgnoreCapturedRegions true if should find the top-most lambda scope
/// info ignoring all inner captured regions scope infos.
sema::LambdaScopeInfo *getCurLambda(bool IgnoreCapturedRegions = false);
/// \brief Retrieve the current generic lambda info, if any.
sema::LambdaScopeInfo *getCurGenericLambda();
@ -6613,10 +6616,10 @@ class Sema {
TemplateInstantiation,
/// We are instantiating a default argument for a template
/// parameter. The Entity is the template, and
/// TemplateArgs/NumTemplateArguments provides the template
/// arguments as specified.
/// FIXME: Use a TemplateArgumentList
/// parameter. The Entity is the template parameter whose argument is
/// being instantiated, the Template is the template, and the
/// TemplateArgs/NumTemplateArguments provide the template arguments as
/// specified.
DefaultTemplateArgumentInstantiation,
/// We are instantiating a default argument for a function.
@ -6731,6 +6734,9 @@ class Sema {
SmallVector<ActiveTemplateInstantiation, 16>
ActiveTemplateInstantiations;
/// Specializations whose definitions are currently being instantiated.
llvm::DenseSet<std::pair<Decl *, unsigned>> InstantiatingSpecializations;
/// \brief Extra modules inspected when performing a lookup during a template
/// instantiation. Computed lazily.
SmallVector<Module*, 16> ActiveTemplateInstantiationLookupModules;
@ -6837,12 +6843,12 @@ class Sema {
/// \brief Note that we are instantiating a default argument in a
/// template-id.
InstantiatingTemplate(Sema &SemaRef, SourceLocation PointOfInstantiation,
TemplateDecl *Template,
TemplateParameter Param, TemplateDecl *Template,
ArrayRef<TemplateArgument> TemplateArgs,
SourceRange InstantiationRange = SourceRange());
/// \brief Note that we are instantiating a default argument in a
/// template-id.
/// \brief Note that we are substituting either explicitly-specified or
/// deduced template arguments during function template argument deduction.
InstantiatingTemplate(Sema &SemaRef, SourceLocation PointOfInstantiation,
FunctionTemplateDecl *FunctionTemplate,
ArrayRef<TemplateArgument> TemplateArgs,
@ -6909,9 +6915,14 @@ class Sema {
/// recursive template instantiations.
bool isInvalid() const { return Invalid; }
/// \brief Determine whether we are already instantiating this
/// specialization in some surrounding active instantiation.
bool isAlreadyInstantiating() const { return AlreadyInstantiating; }
private:
Sema &SemaRef;
bool Invalid;
bool AlreadyInstantiating;
bool SavedInNonInstantiationSFINAEContext;
bool CheckInstantiationDepth(SourceLocation PointOfInstantiation,
SourceRange InstantiationRange);
@ -9406,6 +9417,8 @@ class Sema {
llvm::APSInt &Result);
bool SemaBuiltinConstantArgRange(CallExpr *TheCall, int ArgNum,
int Low, int High);
bool SemaBuiltinConstantArgMultiple(CallExpr *TheCall, int ArgNum,
unsigned Multiple);
bool SemaBuiltinARMSpecialReg(unsigned BuiltinID, CallExpr *TheCall,
int ArgNum, unsigned ExpectedFieldNum,
bool AllowName);

View File

@ -158,14 +158,25 @@ static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
// Set the appropriate OS version define.
if (Triple.isiOS()) {
assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
char Str[6];
assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
char Str[7];
if (Maj < 10) {
Str[0] = '0' + Maj;
Str[1] = '0' + (Min / 10);
Str[2] = '0' + (Min % 10);
Str[3] = '0' + (Rev / 10);
Str[4] = '0' + (Rev % 10);
Str[5] = '\0';
} else {
// Handle versions >= 10.
Str[0] = '0' + (Maj / 10);
Str[1] = '0' + (Maj % 10);
Str[2] = '0' + (Min / 10);
Str[3] = '0' + (Min % 10);
Str[4] = '0' + (Rev / 10);
Str[5] = '0' + (Rev % 10);
Str[6] = '\0';
}
if (Triple.isTvOS())
Builder.defineMacro("__ENVIRONMENT_TV_OS_VERSION_MIN_REQUIRED__", Str);
else
@ -2085,6 +2096,8 @@ class AMDGPUTargetInfo final : public TargetInfo {
.Case("carrizo", GK_VOLCANIC_ISLANDS)
.Case("fiji", GK_VOLCANIC_ISLANDS)
.Case("stoney", GK_VOLCANIC_ISLANDS)
.Case("polaris10", GK_VOLCANIC_ISLANDS)
.Case("polaris11", GK_VOLCANIC_ISLANDS)
.Default(GK_NONE);
}
@ -8170,6 +8183,8 @@ static TargetInfo *AllocateTarget(const llvm::Triple &Triple,
return new DarwinARMTargetInfo(Triple, Opts);
switch (os) {
case llvm::Triple::CloudABI:
return new CloudABITargetInfo<ARMleTargetInfo>(Triple, Opts);
case llvm::Triple::Linux:
return new LinuxTargetInfo<ARMleTargetInfo>(Triple, Opts);
case llvm::Triple::FreeBSD:

View File

@ -36,7 +36,7 @@ std::string getClangRepositoryPath() {
// If the SVN_REPOSITORY is empty, try to use the SVN keyword. This helps us
// pick up a tag in an SVN export, for example.
StringRef SVNRepository("$URL: https://llvm.org/svn/llvm-project/cfe/tags/RELEASE_390/final/lib/Basic/Version.cpp $");
StringRef SVNRepository("$URL: https://llvm.org/svn/llvm-project/cfe/tags/RELEASE_391/final/lib/Basic/Version.cpp $");
if (URL.empty()) {
URL = SVNRepository.slice(SVNRepository.find(':'),
SVNRepository.find("/lib/Basic"));

View File

@ -2105,12 +2105,11 @@ LValue CodeGenFunction::EmitDeclRefLValue(const DeclRefExpr *E) {
if (auto *FD = LambdaCaptureFields.lookup(VD))
return EmitCapturedFieldLValue(*this, FD, CXXABIThisValue);
else if (CapturedStmtInfo) {
auto it = LocalDeclMap.find(VD);
if (it != LocalDeclMap.end()) {
if (auto RefTy = VD->getType()->getAs<ReferenceType>()) {
return EmitLoadOfReferenceLValue(it->second, RefTy);
}
return MakeAddrLValue(it->second, T);
auto I = LocalDeclMap.find(VD);
if (I != LocalDeclMap.end()) {
if (auto RefTy = VD->getType()->getAs<ReferenceType>())
return EmitLoadOfReferenceLValue(I->second, RefTy);
return MakeAddrLValue(I->second, T);
}
LValue CapLVal =
EmitCapturedFieldLValue(*this, CapturedStmtInfo->lookup(VD),
@ -2249,13 +2248,15 @@ LValue CodeGenFunction::EmitUnaryOpLValue(const UnaryOperator *E) {
return LV;
}
assert(E->getSubExpr()->getType()->isAnyComplexType());
QualType T = ExprTy->castAs<ComplexType>()->getElementType();
Address Component =
(E->getOpcode() == UO_Real
? emitAddrOfRealComponent(LV.getAddress(), LV.getType())
: emitAddrOfImagComponent(LV.getAddress(), LV.getType()));
return MakeAddrLValue(Component, ExprTy, LV.getAlignmentSource());
LValue ElemLV = MakeAddrLValue(Component, T, LV.getAlignmentSource());
ElemLV.getQuals().addQualifiers(LV.getQuals());
return ElemLV;
}
case UO_PreInc:
case UO_PreDec: {

View File

@ -1323,6 +1323,10 @@ static CSFC_Result CollectStatementsForCase(const Stmt *S,
// Handle this as two cases: we might be looking for the SwitchCase (if so
// the skipped statements must be skippable) or we might already have it.
CompoundStmt::const_body_iterator I = CS->body_begin(), E = CS->body_end();
bool StartedInLiveCode = FoundCase;
unsigned StartSize = ResultStmts.size();
// If we've not found the case yet, scan through looking for it.
if (Case) {
// Keep track of whether we see a skipped declaration. The code could be
// using the declaration even if it is skipped, so we can't optimize out
@ -1332,7 +1336,7 @@ static CSFC_Result CollectStatementsForCase(const Stmt *S,
// If we're looking for the case, just see if we can skip each of the
// substatements.
for (; Case && I != E; ++I) {
HadSkippedDecl |= isa<DeclStmt>(*I);
HadSkippedDecl |= CodeGenFunction::mightAddDeclToScope(*I);
switch (CollectStatementsForCase(*I, Case, FoundCase, ResultStmts)) {
case CSFC_Failure: return CSFC_Failure;
@ -1368,11 +1372,19 @@ static CSFC_Result CollectStatementsForCase(const Stmt *S,
break;
}
}
if (!FoundCase)
return CSFC_Success;
assert(!HadSkippedDecl && "fallthrough after skipping decl");
}
// If we have statements in our range, then we know that the statements are
// live and need to be added to the set of statements we're tracking.
bool AnyDecls = false;
for (; I != E; ++I) {
AnyDecls |= CodeGenFunction::mightAddDeclToScope(*I);
switch (CollectStatementsForCase(*I, nullptr, FoundCase, ResultStmts)) {
case CSFC_Failure: return CSFC_Failure;
case CSFC_FallThrough:
@ -1390,7 +1402,24 @@ static CSFC_Result CollectStatementsForCase(const Stmt *S,
}
}
return Case ? CSFC_Success : CSFC_FallThrough;
// If we're about to fall out of a scope without hitting a 'break;', we
// can't perform the optimization if there were any decls in that scope
// (we'd lose their end-of-lifetime).
if (AnyDecls) {
// If the entire compound statement was live, there's one more thing we
// can try before giving up: emit the whole thing as a single statement.
// We can do that unless the statement contains a 'break;'.
// FIXME: Such a break must be at the end of a construct within this one.
// We could emit this by just ignoring the BreakStmts entirely.
if (StartedInLiveCode && !CodeGenFunction::containsBreak(S)) {
ResultStmts.resize(StartSize);
ResultStmts.push_back(S);
} else {
return CSFC_Failure;
}
}
return CSFC_FallThrough;
}
// Okay, this is some other statement that we don't handle explicitly, like a

View File

@ -232,8 +232,15 @@ CodeGenFunction::GenerateOpenMPCapturedStmtFunction(const CapturedStmt &S) {
assert(I->capturesVariableArrayType());
II = &getContext().Idents.get("vla");
}
if (ArgType->isVariablyModifiedType())
ArgType = getContext().getVariableArrayDecayedType(ArgType);
if (ArgType->isVariablyModifiedType()) {
bool IsReference = ArgType->isLValueReferenceType();
ArgType =
getContext().getCanonicalParamType(ArgType.getNonReferenceType());
if (IsReference && !ArgType->isPointerType()) {
ArgType = getContext().getLValueReferenceType(
ArgType, /*SpelledAsLValue=*/false);
}
}
Args.push_back(ImplicitParamDecl::Create(getContext(), nullptr,
FD->getLocation(), II, ArgType));
++I;
@ -287,8 +294,14 @@ CodeGenFunction::GenerateOpenMPCapturedStmtFunction(const CapturedStmt &S) {
QualType VarTy = Var->getType();
Address ArgAddr = ArgLVal.getAddress();
if (!VarTy->isReferenceType()) {
if (ArgLVal.getType()->isLValueReferenceType()) {
ArgAddr = EmitLoadOfReference(
ArgAddr, ArgLVal.getType()->castAs<ReferenceType>());
} else if (!VarTy->isVariablyModifiedType() || !VarTy->isPointerType()) {
assert(ArgLVal.getType()->isPointerType());
ArgAddr = EmitLoadOfPointer(
ArgAddr, ArgLVal.getType()->castAs<PointerType>());
}
}
setAddrOfLocalVar(
Var, Address(ArgAddr.getPointer(), getContext().getDeclAlign(Var)));
@ -1754,9 +1767,11 @@ void CodeGenFunction::EmitOMPOuterLoop(bool DynamicOrOrdered, bool IsMonotonic,
EmitBlock(LoopExit.getBlock());
// Tell the runtime we are done.
auto &&CodeGen = [DynamicOrOrdered, &S](CodeGenFunction &CGF) {
if (!DynamicOrOrdered)
RT.emitForStaticFinish(*this, S.getLocEnd());
CGF.CGM.getOpenMPRuntime().emitForStaticFinish(CGF, S.getLocEnd());
};
OMPCancelStack.emitExit(*this, S.getDirectiveKind(), CodeGen);
}
void CodeGenFunction::EmitOMPForOuterLoop(
@ -1872,6 +1887,8 @@ void CodeGenFunction::EmitOMPDistributeParallelForDirective(
*this, OMPD_distribute_parallel_for,
[&S](CodeGenFunction &CGF, PrePostActionTy &) {
OMPLoopScope PreInitScope(CGF, S);
OMPCancelStackRAII CancelRegion(CGF, OMPD_distribute_parallel_for,
/*HasCancel=*/false);
CGF.EmitStmt(
cast<CapturedStmt>(S.getAssociatedStmt())->getCapturedStmt());
});
@ -2060,7 +2077,10 @@ bool CodeGenFunction::EmitOMPWorksharingLoop(const OMPLoopDirective &S) {
[](CodeGenFunction &) {});
EmitBlock(LoopExit.getBlock());
// Tell the runtime we are done.
RT.emitForStaticFinish(*this, S.getLocStart());
auto &&CodeGen = [&S](CodeGenFunction &CGF) {
CGF.CGM.getOpenMPRuntime().emitForStaticFinish(CGF, S.getLocEnd());
};
OMPCancelStack.emitExit(*this, S.getDirectiveKind(), CodeGen);
} else {
const bool IsMonotonic =
Ordered || ScheduleKind.Schedule == OMPC_SCHEDULE_static ||
@ -2110,6 +2130,7 @@ void CodeGenFunction::EmitOMPForDirective(const OMPForDirective &S) {
bool HasLastprivates = false;
auto &&CodeGen = [&S, &HasLastprivates](CodeGenFunction &CGF,
PrePostActionTy &) {
OMPCancelStackRAII CancelRegion(CGF, OMPD_for, S.hasCancel());
HasLastprivates = CGF.EmitOMPWorksharingLoop(S);
};
{
@ -2250,7 +2271,10 @@ void CodeGenFunction::EmitSections(const OMPExecutableDirective &S) {
CGF.EmitOMPInnerLoop(S, /*RequiresCleanup=*/false, &Cond, &Inc, BodyGen,
[](CodeGenFunction &) {});
// Tell the runtime we are done.
CGF.CGM.getOpenMPRuntime().emitForStaticFinish(CGF, S.getLocStart());
auto &&CodeGen = [&S](CodeGenFunction &CGF) {
CGF.CGM.getOpenMPRuntime().emitForStaticFinish(CGF, S.getLocEnd());
};
CGF.OMPCancelStack.emitExit(CGF, S.getDirectiveKind(), CodeGen);
CGF.EmitOMPReductionClauseFinal(S);
// Emit post-update of the reduction variables if IsLastIter != 0.
emitPostUpdateForReductionClause(
@ -2272,6 +2296,7 @@ void CodeGenFunction::EmitSections(const OMPExecutableDirective &S) {
HasCancel = OSD->hasCancel();
else if (auto *OPSD = dyn_cast<OMPParallelSectionsDirective>(&S))
HasCancel = OPSD->hasCancel();
OMPCancelStackRAII CancelRegion(*this, S.getDirectiveKind(), HasCancel);
CGM.getOpenMPRuntime().emitInlinedDirective(*this, OMPD_sections, CodeGen,
HasCancel);
// Emit barrier for lastprivates only if 'sections' directive has 'nowait'
@ -2375,6 +2400,7 @@ void CodeGenFunction::EmitOMPParallelForDirective(
// Emit directive as a combined directive that consists of two implicit
// directives: 'parallel' with 'for' directive.
auto &&CodeGen = [&S](CodeGenFunction &CGF, PrePostActionTy &) {
OMPCancelStackRAII CancelRegion(CGF, OMPD_parallel_for, S.hasCancel());
CGF.EmitOMPWorksharingLoop(S);
};
emitCommonOMPParallelDirective(*this, S, OMPD_for, CodeGen);
@ -3374,11 +3400,14 @@ void CodeGenFunction::EmitOMPCancelDirective(const OMPCancelDirective &S) {
CodeGenFunction::JumpDest
CodeGenFunction::getOMPCancelDestination(OpenMPDirectiveKind Kind) {
if (Kind == OMPD_parallel || Kind == OMPD_task)
if (Kind == OMPD_parallel || Kind == OMPD_task ||
Kind == OMPD_target_parallel)
return ReturnBlock;
assert(Kind == OMPD_for || Kind == OMPD_section || Kind == OMPD_sections ||
Kind == OMPD_parallel_sections || Kind == OMPD_parallel_for);
return BreakContinueStack.back().BreakBlock;
Kind == OMPD_parallel_sections || Kind == OMPD_parallel_for ||
Kind == OMPD_distribute_parallel_for ||
Kind == OMPD_target_parallel_for);
return OMPCancelStack.getExitBlock();
}
// Generate the instructions for '#pragma omp target data' directive.

View File

@ -25,6 +25,7 @@
#include "clang/AST/Decl.h"
#include "clang/AST/DeclCXX.h"
#include "clang/AST/StmtCXX.h"
#include "clang/AST/StmtObjC.h"
#include "clang/Basic/Builtins.h"
#include "clang/Basic/TargetInfo.h"
#include "clang/CodeGen/CGFunctionInfo.h"
@ -436,6 +437,23 @@ void CodeGenFunction::EmitMCountInstrumentation() {
EmitNounwindRuntimeCall(MCountFn);
}
// Returns the address space id that should be produced to the
// kernel_arg_addr_space metadata. This is always fixed to the ids
// as specified in the SPIR 2.0 specification in order to differentiate
// for example in clGetKernelArgInfo() implementation between the address
// spaces with targets without unique mapping to the OpenCL address spaces
// (basically all single AS CPUs).
static unsigned ArgInfoAddressSpace(unsigned LangAS) {
switch (LangAS) {
case LangAS::opencl_global: return 1;
case LangAS::opencl_constant: return 2;
case LangAS::opencl_local: return 3;
case LangAS::opencl_generic: return 4; // Not in SPIR 2.0 specs.
default:
return 0; // Assume private.
}
}
// OpenCL v1.2 s5.6.4.6 allows the compiler to store kernel argument
// information in the program executable. The argument information stored
// includes the argument name, its type, the address and access qualifiers used.
@ -476,7 +494,7 @@ static void GenOpenCLArgMetadata(const FunctionDecl *FD, llvm::Function *Fn,
// Get address qualifier.
addressQuals.push_back(llvm::ConstantAsMetadata::get(Builder.getInt32(
ASTCtx.getTargetAddressSpace(pointeeTy.getAddressSpace()))));
ArgInfoAddressSpace(pointeeTy.getAddressSpace()))));
// Get argument type name.
std::string typeName =
@ -513,8 +531,7 @@ static void GenOpenCLArgMetadata(const FunctionDecl *FD, llvm::Function *Fn,
uint32_t AddrSpc = 0;
bool isPipe = ty->isPipeType();
if (ty->isImageType() || isPipe)
AddrSpc =
CGM.getContext().getTargetAddressSpace(LangAS::opencl_global);
AddrSpc = ArgInfoAddressSpace(LangAS::opencl_global);
addressQuals.push_back(
llvm::ConstantAsMetadata::get(Builder.getInt32(AddrSpc)));
@ -1143,6 +1160,28 @@ bool CodeGenFunction::containsBreak(const Stmt *S) {
return false;
}
bool CodeGenFunction::mightAddDeclToScope(const Stmt *S) {
if (!S) return false;
// Some statement kinds add a scope and thus never add a decl to the current
// scope. Note, this list is longer than the list of statements that might
// have an unscoped decl nested within them, but this way is conservatively
// correct even if more statement kinds are added.
if (isa<IfStmt>(S) || isa<SwitchStmt>(S) || isa<WhileStmt>(S) ||
isa<DoStmt>(S) || isa<ForStmt>(S) || isa<CompoundStmt>(S) ||
isa<CXXForRangeStmt>(S) || isa<CXXTryStmt>(S) ||
isa<ObjCForCollectionStmt>(S) || isa<ObjCAtTryStmt>(S))
return false;
if (isa<DeclStmt>(S))
return true;
for (const Stmt *SubStmt : S->children())
if (mightAddDeclToScope(SubStmt))
return true;
return false;
}
/// ConstantFoldsToSimpleInteger - If the specified expression does not fold
/// to a constant, or if it does but contains a label, return false. If it

View File

@ -965,6 +965,94 @@ class CodeGenFunction : public CodeGenTypeCache {
};
SmallVector<BreakContinue, 8> BreakContinueStack;
/// Handles cancellation exit points in OpenMP-related constructs.
class OpenMPCancelExitStack {
/// Tracks cancellation exit point and join point for cancel-related exit
/// and normal exit.
struct CancelExit {
CancelExit() = default;
CancelExit(OpenMPDirectiveKind Kind, JumpDest ExitBlock,
JumpDest ContBlock)
: Kind(Kind), ExitBlock(ExitBlock), ContBlock(ContBlock) {}
OpenMPDirectiveKind Kind = OMPD_unknown;
/// true if the exit block has been emitted already by the special
/// emitExit() call, false if the default codegen is used.
bool HasBeenEmitted = false;
JumpDest ExitBlock;
JumpDest ContBlock;
};
SmallVector<CancelExit, 8> Stack;
public:
OpenMPCancelExitStack() : Stack(1) {}
~OpenMPCancelExitStack() = default;
/// Fetches the exit block for the current OpenMP construct.
JumpDest getExitBlock() const { return Stack.back().ExitBlock; }
/// Emits exit block with special codegen procedure specific for the related
/// OpenMP construct + emits code for normal construct cleanup.
void emitExit(CodeGenFunction &CGF, OpenMPDirectiveKind Kind,
const llvm::function_ref<void(CodeGenFunction &)> &CodeGen) {
if (Stack.back().Kind == Kind && getExitBlock().isValid()) {
assert(CGF.getOMPCancelDestination(Kind).isValid());
assert(CGF.HaveInsertPoint());
assert(!Stack.back().HasBeenEmitted);
auto IP = CGF.Builder.saveAndClearIP();
CGF.EmitBlock(Stack.back().ExitBlock.getBlock());
CodeGen(CGF);
CGF.EmitBranchThroughCleanup(Stack.back().ContBlock);
CGF.Builder.restoreIP(IP);
Stack.back().HasBeenEmitted = true;
}
CodeGen(CGF);
}
/// Enter the cancel supporting \a Kind construct.
/// \param Kind OpenMP directive that supports cancel constructs.
/// \param HasCancel true, if the construct has inner cancel directive,
/// false otherwise.
void enter(CodeGenFunction &CGF, OpenMPDirectiveKind Kind, bool HasCancel) {
Stack.push_back({Kind,
HasCancel ? CGF.getJumpDestInCurrentScope("cancel.exit")
: JumpDest(),
HasCancel ? CGF.getJumpDestInCurrentScope("cancel.cont")
: JumpDest()});
}
/// Emits default exit point for the cancel construct (if the special one
/// has not be used) + join point for cancel/normal exits.
void exit(CodeGenFunction &CGF) {
if (getExitBlock().isValid()) {
assert(CGF.getOMPCancelDestination(Stack.back().Kind).isValid());
bool HaveIP = CGF.HaveInsertPoint();
if (!Stack.back().HasBeenEmitted) {
if (HaveIP)
CGF.EmitBranchThroughCleanup(Stack.back().ContBlock);
CGF.EmitBlock(Stack.back().ExitBlock.getBlock());
CGF.EmitBranchThroughCleanup(Stack.back().ContBlock);
}
CGF.EmitBlock(Stack.back().ContBlock.getBlock());
if (!HaveIP) {
CGF.Builder.CreateUnreachable();
CGF.Builder.ClearInsertionPoint();
}
}
Stack.pop_back();
}
};
OpenMPCancelExitStack OMPCancelStack;
/// Controls insertion of cancellation exit blocks in worksharing constructs.
class OMPCancelStackRAII {
CodeGenFunction &CGF;
public:
OMPCancelStackRAII(CodeGenFunction &CGF, OpenMPDirectiveKind Kind,
bool HasCancel)
: CGF(CGF) {
CGF.OMPCancelStack.enter(CGF, Kind, HasCancel);
}
~OMPCancelStackRAII() { CGF.OMPCancelStack.exit(CGF); }
};
CodeGenPGO PGO;
/// Calculate branch weights appropriate for PGO data
@ -3164,6 +3252,10 @@ class CodeGenFunction : public CodeGenTypeCache {
/// inside of it, this is fine.
static bool containsBreak(const Stmt *S);
/// Determine if the given statement might introduce a declaration into the
/// current scope, by being a (possibly-labelled) DeclStmt.
static bool mightAddDeclToScope(const Stmt *S);
/// ConstantFoldsToSimpleInteger - If the specified expression does not fold
/// to a constant, or if it does but contains a label, return false. If it
/// constant folds return true and set the boolean result in Result.

View File

@ -688,13 +688,13 @@ void Darwin::AddDeploymentTarget(DerivedArgList &Args) const {
assert(iOSVersion && "Unknown target platform!");
if (!Driver::GetReleaseVersion(iOSVersion->getValue(), Major, Minor, Micro,
HadExtra) ||
HadExtra || Major >= 10 || Minor >= 100 || Micro >= 100)
HadExtra || Major >= 100 || Minor >= 100 || Micro >= 100)
getDriver().Diag(diag::err_drv_invalid_version_number)
<< iOSVersion->getAsString(Args);
} else if (Platform == TvOS) {
if (!Driver::GetReleaseVersion(TvOSVersion->getValue(), Major, Minor,
Micro, HadExtra) || HadExtra ||
Major >= 10 || Minor >= 100 || Micro >= 100)
Major >= 100 || Minor >= 100 || Micro >= 100)
getDriver().Diag(diag::err_drv_invalid_version_number)
<< TvOSVersion->getAsString(Args);
} else if (Platform == WatchOS) {

View File

@ -7630,23 +7630,23 @@ void darwin::Linker::AddLinkArgs(Compilation &C, const ArgList &Args,
CmdArgs.push_back("-object_path_lto");
CmdArgs.push_back(TmpPath);
}
}
// Use -lto_library option to specify the libLTO.dylib path. Try to find
// it in clang installed libraries. If not found, the option is not used
// and 'ld' will use its default mechanism to search for libLTO.dylib.
// it in clang installed libraries. ld64 will only look at this argument
// when it actually uses LTO, so libLTO.dylib only needs to exist at link
// time if ld64 decides that it needs to use LTO.
// Since this is passed unconditionally, ld64 will never look for libLTO.dylib
// next to it. That's ok since ld64 using a libLTO.dylib not matching the
// clang version won't work anyways.
if (Version[0] >= 133) {
// Search for libLTO in <InstalledDir>/../lib/libLTO.dylib
StringRef P = llvm::sys::path::parent_path(D.getInstalledDir());
StringRef P = llvm::sys::path::parent_path(D.Dir);
SmallString<128> LibLTOPath(P);
llvm::sys::path::append(LibLTOPath, "lib");
llvm::sys::path::append(LibLTOPath, "libLTO.dylib");
if (llvm::sys::fs::exists(LibLTOPath)) {
CmdArgs.push_back("-lto_library");
CmdArgs.push_back(C.getArgs().MakeArgString(LibLTOPath));
} else {
D.Diag(diag::warn_drv_lto_libpath);
}
}
}
// Derived from the "link" spec.

View File

@ -0,0 +1,583 @@
/*===---- msa.h - MIPS MSA intrinsics --------------------------------------===
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
*===-----------------------------------------------------------------------===
*/
#ifndef _MSA_H
#define _MSA_H 1
#if defined(__mips_msa)
typedef signed char v16i8 __attribute__((vector_size(16), aligned(16)));
typedef signed char v16i8_b __attribute__((vector_size(16), aligned(1)));
typedef unsigned char v16u8 __attribute__((vector_size(16), aligned(16)));
typedef unsigned char v16u8_b __attribute__((vector_size(16), aligned(1)));
typedef short v8i16 __attribute__((vector_size(16), aligned(16)));
typedef short v8i16_h __attribute__((vector_size(16), aligned(2)));
typedef unsigned short v8u16 __attribute__((vector_size(16), aligned(16)));
typedef unsigned short v8u16_h __attribute__((vector_size(16), aligned(2)));
typedef int v4i32 __attribute__((vector_size(16), aligned(16)));
typedef int v4i32_w __attribute__((vector_size(16), aligned(4)));
typedef unsigned int v4u32 __attribute__((vector_size(16), aligned(16)));
typedef unsigned int v4u32_w __attribute__((vector_size(16), aligned(4)));
typedef long long v2i64 __attribute__((vector_size(16), aligned(16)));
typedef long long v2i64_d __attribute__((vector_size(16), aligned(8)));
typedef unsigned long long v2u64 __attribute__((vector_size(16), aligned(16)));
typedef unsigned long long v2u64_d __attribute__((vector_size(16), aligned(8)));
typedef float v4f32 __attribute__((vector_size(16), aligned(16)));
typedef float v4f32_w __attribute__((vector_size(16), aligned(4)));
typedef double v2f64 __attribute__ ((vector_size(16), aligned(16)));
typedef double v2f64_d __attribute__ ((vector_size(16), aligned(8)));
#define __msa_sll_b __builtin_msa_sll_b
#define __msa_sll_h __builtin_msa_sll_h
#define __msa_sll_w __builtin_msa_sll_w
#define __msa_sll_d __builtin_msa_sll_d
#define __msa_slli_b __builtin_msa_slli_b
#define __msa_slli_h __builtin_msa_slli_h
#define __msa_slli_w __builtin_msa_slli_w
#define __msa_slli_d __builtin_msa_slli_d
#define __msa_sra_b __builtin_msa_sra_b
#define __msa_sra_h __builtin_msa_sra_h
#define __msa_sra_w __builtin_msa_sra_w
#define __msa_sra_d __builtin_msa_sra_d
#define __msa_srai_b __builtin_msa_srai_b
#define __msa_srai_h __builtin_msa_srai_h
#define __msa_srai_w __builtin_msa_srai_w
#define __msa_srai_d __builtin_msa_srai_d
#define __msa_srar_b __builtin_msa_srar_b
#define __msa_srar_h __builtin_msa_srar_h
#define __msa_srar_w __builtin_msa_srar_w
#define __msa_srar_d __builtin_msa_srar_d
#define __msa_srari_b __builtin_msa_srari_b
#define __msa_srari_h __builtin_msa_srari_h
#define __msa_srari_w __builtin_msa_srari_w
#define __msa_srari_d __builtin_msa_srari_d
#define __msa_srl_b __builtin_msa_srl_b
#define __msa_srl_h __builtin_msa_srl_h
#define __msa_srl_w __builtin_msa_srl_w
#define __msa_srl_d __builtin_msa_srl_d
#define __msa_srli_b __builtin_msa_srli_b
#define __msa_srli_h __builtin_msa_srli_h
#define __msa_srli_w __builtin_msa_srli_w
#define __msa_srli_d __builtin_msa_srli_d
#define __msa_srlr_b __builtin_msa_srlr_b
#define __msa_srlr_h __builtin_msa_srlr_h
#define __msa_srlr_w __builtin_msa_srlr_w
#define __msa_srlr_d __builtin_msa_srlr_d
#define __msa_srlri_b __builtin_msa_srlri_b
#define __msa_srlri_h __builtin_msa_srlri_h
#define __msa_srlri_w __builtin_msa_srlri_w
#define __msa_srlri_d __builtin_msa_srlri_d
#define __msa_bclr_b __builtin_msa_bclr_b
#define __msa_bclr_h __builtin_msa_bclr_h
#define __msa_bclr_w __builtin_msa_bclr_w
#define __msa_bclr_d __builtin_msa_bclr_d
#define __msa_bclri_b __builtin_msa_bclri_b
#define __msa_bclri_h __builtin_msa_bclri_h
#define __msa_bclri_w __builtin_msa_bclri_w
#define __msa_bclri_d __builtin_msa_bclri_d
#define __msa_bset_b __builtin_msa_bset_b
#define __msa_bset_h __builtin_msa_bset_h
#define __msa_bset_w __builtin_msa_bset_w
#define __msa_bset_d __builtin_msa_bset_d
#define __msa_bseti_b __builtin_msa_bseti_b
#define __msa_bseti_h __builtin_msa_bseti_h
#define __msa_bseti_w __builtin_msa_bseti_w
#define __msa_bseti_d __builtin_msa_bseti_d
#define __msa_bneg_b __builtin_msa_bneg_b
#define __msa_bneg_h __builtin_msa_bneg_h
#define __msa_bneg_w __builtin_msa_bneg_w
#define __msa_bneg_d __builtin_msa_bneg_d
#define __msa_bnegi_b __builtin_msa_bnegi_b
#define __msa_bnegi_h __builtin_msa_bnegi_h
#define __msa_bnegi_w __builtin_msa_bnegi_w
#define __msa_bnegi_d __builtin_msa_bnegi_d
#define __msa_binsl_b __builtin_msa_binsl_b
#define __msa_binsl_h __builtin_msa_binsl_h
#define __msa_binsl_w __builtin_msa_binsl_w
#define __msa_binsl_d __builtin_msa_binsl_d
#define __msa_binsli_b __builtin_msa_binsli_b
#define __msa_binsli_h __builtin_msa_binsli_h
#define __msa_binsli_w __builtin_msa_binsli_w
#define __msa_binsli_d __builtin_msa_binsli_d
#define __msa_binsr_b __builtin_msa_binsr_b
#define __msa_binsr_h __builtin_msa_binsr_h
#define __msa_binsr_w __builtin_msa_binsr_w
#define __msa_binsr_d __builtin_msa_binsr_d
#define __msa_binsri_b __builtin_msa_binsri_b
#define __msa_binsri_h __builtin_msa_binsri_h
#define __msa_binsri_w __builtin_msa_binsri_w
#define __msa_binsri_d __builtin_msa_binsri_d
#define __msa_addv_b __builtin_msa_addv_b
#define __msa_addv_h __builtin_msa_addv_h
#define __msa_addv_w __builtin_msa_addv_w
#define __msa_addv_d __builtin_msa_addv_d
#define __msa_addvi_b __builtin_msa_addvi_b
#define __msa_addvi_h __builtin_msa_addvi_h
#define __msa_addvi_w __builtin_msa_addvi_w
#define __msa_addvi_d __builtin_msa_addvi_d
#define __msa_subv_b __builtin_msa_subv_b
#define __msa_subv_h __builtin_msa_subv_h
#define __msa_subv_w __builtin_msa_subv_w
#define __msa_subv_d __builtin_msa_subv_d
#define __msa_subvi_b __builtin_msa_subvi_b
#define __msa_subvi_h __builtin_msa_subvi_h
#define __msa_subvi_w __builtin_msa_subvi_w
#define __msa_subvi_d __builtin_msa_subvi_d
#define __msa_max_s_b __builtin_msa_max_s_b
#define __msa_max_s_h __builtin_msa_max_s_h
#define __msa_max_s_w __builtin_msa_max_s_w
#define __msa_max_s_d __builtin_msa_max_s_d
#define __msa_maxi_s_b __builtin_msa_maxi_s_b
#define __msa_maxi_s_h __builtin_msa_maxi_s_h
#define __msa_maxi_s_w __builtin_msa_maxi_s_w
#define __msa_maxi_s_d __builtin_msa_maxi_s_d
#define __msa_max_u_b __builtin_msa_max_u_b
#define __msa_max_u_h __builtin_msa_max_u_h
#define __msa_max_u_w __builtin_msa_max_u_w
#define __msa_max_u_d __builtin_msa_max_u_d
#define __msa_maxi_u_b __builtin_msa_maxi_u_b
#define __msa_maxi_u_h __builtin_msa_maxi_u_h
#define __msa_maxi_u_w __builtin_msa_maxi_u_w
#define __msa_maxi_u_d __builtin_msa_maxi_u_d
#define __msa_min_s_b __builtin_msa_min_s_b
#define __msa_min_s_h __builtin_msa_min_s_h
#define __msa_min_s_w __builtin_msa_min_s_w
#define __msa_min_s_d __builtin_msa_min_s_d
#define __msa_mini_s_b __builtin_msa_mini_s_b
#define __msa_mini_s_h __builtin_msa_mini_s_h
#define __msa_mini_s_w __builtin_msa_mini_s_w
#define __msa_mini_s_d __builtin_msa_mini_s_d
#define __msa_min_u_b __builtin_msa_min_u_b
#define __msa_min_u_h __builtin_msa_min_u_h
#define __msa_min_u_w __builtin_msa_min_u_w
#define __msa_min_u_d __builtin_msa_min_u_d
#define __msa_mini_u_b __builtin_msa_mini_u_b
#define __msa_mini_u_h __builtin_msa_mini_u_h
#define __msa_mini_u_w __builtin_msa_mini_u_w
#define __msa_mini_u_d __builtin_msa_mini_u_d
#define __msa_max_a_b __builtin_msa_max_a_b
#define __msa_max_a_h __builtin_msa_max_a_h
#define __msa_max_a_w __builtin_msa_max_a_w
#define __msa_max_a_d __builtin_msa_max_a_d
#define __msa_min_a_b __builtin_msa_min_a_b
#define __msa_min_a_h __builtin_msa_min_a_h
#define __msa_min_a_w __builtin_msa_min_a_w
#define __msa_min_a_d __builtin_msa_min_a_d
#define __msa_ceq_b __builtin_msa_ceq_b
#define __msa_ceq_h __builtin_msa_ceq_h
#define __msa_ceq_w __builtin_msa_ceq_w
#define __msa_ceq_d __builtin_msa_ceq_d
#define __msa_ceqi_b __builtin_msa_ceqi_b
#define __msa_ceqi_h __builtin_msa_ceqi_h
#define __msa_ceqi_w __builtin_msa_ceqi_w
#define __msa_ceqi_d __builtin_msa_ceqi_d
#define __msa_clt_s_b __builtin_msa_clt_s_b
#define __msa_clt_s_h __builtin_msa_clt_s_h
#define __msa_clt_s_w __builtin_msa_clt_s_w
#define __msa_clt_s_d __builtin_msa_clt_s_d
#define __msa_clti_s_b __builtin_msa_clti_s_b
#define __msa_clti_s_h __builtin_msa_clti_s_h
#define __msa_clti_s_w __builtin_msa_clti_s_w
#define __msa_clti_s_d __builtin_msa_clti_s_d
#define __msa_clt_u_b __builtin_msa_clt_u_b
#define __msa_clt_u_h __builtin_msa_clt_u_h
#define __msa_clt_u_w __builtin_msa_clt_u_w
#define __msa_clt_u_d __builtin_msa_clt_u_d
#define __msa_clti_u_b __builtin_msa_clti_u_b
#define __msa_clti_u_h __builtin_msa_clti_u_h
#define __msa_clti_u_w __builtin_msa_clti_u_w
#define __msa_clti_u_d __builtin_msa_clti_u_d
#define __msa_cle_s_b __builtin_msa_cle_s_b
#define __msa_cle_s_h __builtin_msa_cle_s_h
#define __msa_cle_s_w __builtin_msa_cle_s_w
#define __msa_cle_s_d __builtin_msa_cle_s_d
#define __msa_clei_s_b __builtin_msa_clei_s_b
#define __msa_clei_s_h __builtin_msa_clei_s_h
#define __msa_clei_s_w __builtin_msa_clei_s_w
#define __msa_clei_s_d __builtin_msa_clei_s_d
#define __msa_cle_u_b __builtin_msa_cle_u_b
#define __msa_cle_u_h __builtin_msa_cle_u_h
#define __msa_cle_u_w __builtin_msa_cle_u_w
#define __msa_cle_u_d __builtin_msa_cle_u_d
#define __msa_clei_u_b __builtin_msa_clei_u_b
#define __msa_clei_u_h __builtin_msa_clei_u_h
#define __msa_clei_u_w __builtin_msa_clei_u_w
#define __msa_clei_u_d __builtin_msa_clei_u_d
#define __msa_ld_b __builtin_msa_ld_b
#define __msa_ld_h __builtin_msa_ld_h
#define __msa_ld_w __builtin_msa_ld_w
#define __msa_ld_d __builtin_msa_ld_d
#define __msa_st_b __builtin_msa_st_b
#define __msa_st_h __builtin_msa_st_h
#define __msa_st_w __builtin_msa_st_w
#define __msa_st_d __builtin_msa_st_d
#define __msa_sat_s_b __builtin_msa_sat_s_b
#define __msa_sat_s_h __builtin_msa_sat_s_h
#define __msa_sat_s_w __builtin_msa_sat_s_w
#define __msa_sat_s_d __builtin_msa_sat_s_d
#define __msa_sat_u_b __builtin_msa_sat_u_b
#define __msa_sat_u_h __builtin_msa_sat_u_h
#define __msa_sat_u_w __builtin_msa_sat_u_w
#define __msa_sat_u_d __builtin_msa_sat_u_d
#define __msa_add_a_b __builtin_msa_add_a_b
#define __msa_add_a_h __builtin_msa_add_a_h
#define __msa_add_a_w __builtin_msa_add_a_w
#define __msa_add_a_d __builtin_msa_add_a_d
#define __msa_adds_a_b __builtin_msa_adds_a_b
#define __msa_adds_a_h __builtin_msa_adds_a_h
#define __msa_adds_a_w __builtin_msa_adds_a_w
#define __msa_adds_a_d __builtin_msa_adds_a_d
#define __msa_adds_s_b __builtin_msa_adds_s_b
#define __msa_adds_s_h __builtin_msa_adds_s_h
#define __msa_adds_s_w __builtin_msa_adds_s_w
#define __msa_adds_s_d __builtin_msa_adds_s_d
#define __msa_adds_u_b __builtin_msa_adds_u_b
#define __msa_adds_u_h __builtin_msa_adds_u_h
#define __msa_adds_u_w __builtin_msa_adds_u_w
#define __msa_adds_u_d __builtin_msa_adds_u_d
#define __msa_ave_s_b __builtin_msa_ave_s_b
#define __msa_ave_s_h __builtin_msa_ave_s_h
#define __msa_ave_s_w __builtin_msa_ave_s_w
#define __msa_ave_s_d __builtin_msa_ave_s_d
#define __msa_ave_u_b __builtin_msa_ave_u_b
#define __msa_ave_u_h __builtin_msa_ave_u_h
#define __msa_ave_u_w __builtin_msa_ave_u_w
#define __msa_ave_u_d __builtin_msa_ave_u_d
#define __msa_aver_s_b __builtin_msa_aver_s_b
#define __msa_aver_s_h __builtin_msa_aver_s_h
#define __msa_aver_s_w __builtin_msa_aver_s_w
#define __msa_aver_s_d __builtin_msa_aver_s_d
#define __msa_aver_u_b __builtin_msa_aver_u_b
#define __msa_aver_u_h __builtin_msa_aver_u_h
#define __msa_aver_u_w __builtin_msa_aver_u_w
#define __msa_aver_u_d __builtin_msa_aver_u_d
#define __msa_subs_s_b __builtin_msa_subs_s_b
#define __msa_subs_s_h __builtin_msa_subs_s_h
#define __msa_subs_s_w __builtin_msa_subs_s_w
#define __msa_subs_s_d __builtin_msa_subs_s_d
#define __msa_subs_u_b __builtin_msa_subs_u_b
#define __msa_subs_u_h __builtin_msa_subs_u_h
#define __msa_subs_u_w __builtin_msa_subs_u_w
#define __msa_subs_u_d __builtin_msa_subs_u_d
#define __msa_subsuu_s_b __builtin_msa_subsuu_s_b
#define __msa_subsuu_s_h __builtin_msa_subsuu_s_h
#define __msa_subsuu_s_w __builtin_msa_subsuu_s_w
#define __msa_subsuu_s_d __builtin_msa_subsuu_s_d
#define __msa_subsus_u_b __builtin_msa_subsus_u_b
#define __msa_subsus_u_h __builtin_msa_subsus_u_h
#define __msa_subsus_u_w __builtin_msa_subsus_u_w
#define __msa_subsus_u_d __builtin_msa_subsus_u_d
#define __msa_asub_s_b __builtin_msa_asub_s_b
#define __msa_asub_s_h __builtin_msa_asub_s_h
#define __msa_asub_s_w __builtin_msa_asub_s_w
#define __msa_asub_s_d __builtin_msa_asub_s_d
#define __msa_asub_u_b __builtin_msa_asub_u_b
#define __msa_asub_u_h __builtin_msa_asub_u_h
#define __msa_asub_u_w __builtin_msa_asub_u_w
#define __msa_asub_u_d __builtin_msa_asub_u_d
#define __msa_mulv_b __builtin_msa_mulv_b
#define __msa_mulv_h __builtin_msa_mulv_h
#define __msa_mulv_w __builtin_msa_mulv_w
#define __msa_mulv_d __builtin_msa_mulv_d
#define __msa_maddv_b __builtin_msa_maddv_b
#define __msa_maddv_h __builtin_msa_maddv_h
#define __msa_maddv_w __builtin_msa_maddv_w
#define __msa_maddv_d __builtin_msa_maddv_d
#define __msa_msubv_b __builtin_msa_msubv_b
#define __msa_msubv_h __builtin_msa_msubv_h
#define __msa_msubv_w __builtin_msa_msubv_w
#define __msa_msubv_d __builtin_msa_msubv_d
#define __msa_div_s_b __builtin_msa_div_s_b
#define __msa_div_s_h __builtin_msa_div_s_h
#define __msa_div_s_w __builtin_msa_div_s_w
#define __msa_div_s_d __builtin_msa_div_s_d
#define __msa_div_u_b __builtin_msa_div_u_b
#define __msa_div_u_h __builtin_msa_div_u_h
#define __msa_div_u_w __builtin_msa_div_u_w
#define __msa_div_u_d __builtin_msa_div_u_d
#define __msa_hadd_s_h __builtin_msa_hadd_s_h
#define __msa_hadd_s_w __builtin_msa_hadd_s_w
#define __msa_hadd_s_d __builtin_msa_hadd_s_d
#define __msa_hadd_u_h __builtin_msa_hadd_u_h
#define __msa_hadd_u_w __builtin_msa_hadd_u_w
#define __msa_hadd_u_d __builtin_msa_hadd_u_d
#define __msa_hsub_s_h __builtin_msa_hsub_s_h
#define __msa_hsub_s_w __builtin_msa_hsub_s_w
#define __msa_hsub_s_d __builtin_msa_hsub_s_d
#define __msa_hsub_u_h __builtin_msa_hsub_u_h
#define __msa_hsub_u_w __builtin_msa_hsub_u_w
#define __msa_hsub_u_d __builtin_msa_hsub_u_d
#define __msa_mod_s_b __builtin_msa_mod_s_b
#define __msa_mod_s_h __builtin_msa_mod_s_h
#define __msa_mod_s_w __builtin_msa_mod_s_w
#define __msa_mod_s_d __builtin_msa_mod_s_d
#define __msa_mod_u_b __builtin_msa_mod_u_b
#define __msa_mod_u_h __builtin_msa_mod_u_h
#define __msa_mod_u_w __builtin_msa_mod_u_w
#define __msa_mod_u_d __builtin_msa_mod_u_d
#define __msa_dotp_s_h __builtin_msa_dotp_s_h
#define __msa_dotp_s_w __builtin_msa_dotp_s_w
#define __msa_dotp_s_d __builtin_msa_dotp_s_d
#define __msa_dotp_u_h __builtin_msa_dotp_u_h
#define __msa_dotp_u_w __builtin_msa_dotp_u_w
#define __msa_dotp_u_d __builtin_msa_dotp_u_d
#define __msa_dpadd_s_h __builtin_msa_dpadd_s_h
#define __msa_dpadd_s_w __builtin_msa_dpadd_s_w
#define __msa_dpadd_s_d __builtin_msa_dpadd_s_d
#define __msa_dpadd_u_h __builtin_msa_dpadd_u_h
#define __msa_dpadd_u_w __builtin_msa_dpadd_u_w
#define __msa_dpadd_u_d __builtin_msa_dpadd_u_d
#define __msa_dpsub_s_h __builtin_msa_dpsub_s_h
#define __msa_dpsub_s_w __builtin_msa_dpsub_s_w
#define __msa_dpsub_s_d __builtin_msa_dpsub_s_d
#define __msa_dpsub_u_h __builtin_msa_dpsub_u_h
#define __msa_dpsub_u_w __builtin_msa_dpsub_u_w
#define __msa_dpsub_u_d __builtin_msa_dpsub_u_d
#define __msa_sld_b __builtin_msa_sld_b
#define __msa_sld_h __builtin_msa_sld_h
#define __msa_sld_w __builtin_msa_sld_w
#define __msa_sld_d __builtin_msa_sld_d
#define __msa_sldi_b __builtin_msa_sldi_b
#define __msa_sldi_h __builtin_msa_sldi_h
#define __msa_sldi_w __builtin_msa_sldi_w
#define __msa_sldi_d __builtin_msa_sldi_d
#define __msa_splat_b __builtin_msa_splat_b
#define __msa_splat_h __builtin_msa_splat_h
#define __msa_splat_w __builtin_msa_splat_w
#define __msa_splat_d __builtin_msa_splat_d
#define __msa_splati_b __builtin_msa_splati_b
#define __msa_splati_h __builtin_msa_splati_h
#define __msa_splati_w __builtin_msa_splati_w
#define __msa_splati_d __builtin_msa_splati_d
#define __msa_pckev_b __builtin_msa_pckev_b
#define __msa_pckev_h __builtin_msa_pckev_h
#define __msa_pckev_w __builtin_msa_pckev_w
#define __msa_pckev_d __builtin_msa_pckev_d
#define __msa_pckod_b __builtin_msa_pckod_b
#define __msa_pckod_h __builtin_msa_pckod_h
#define __msa_pckod_w __builtin_msa_pckod_w
#define __msa_pckod_d __builtin_msa_pckod_d
#define __msa_ilvl_b __builtin_msa_ilvl_b
#define __msa_ilvl_h __builtin_msa_ilvl_h
#define __msa_ilvl_w __builtin_msa_ilvl_w
#define __msa_ilvl_d __builtin_msa_ilvl_d
#define __msa_ilvr_b __builtin_msa_ilvr_b
#define __msa_ilvr_h __builtin_msa_ilvr_h
#define __msa_ilvr_w __builtin_msa_ilvr_w
#define __msa_ilvr_d __builtin_msa_ilvr_d
#define __msa_ilvev_b __builtin_msa_ilvev_b
#define __msa_ilvev_h __builtin_msa_ilvev_h
#define __msa_ilvev_w __builtin_msa_ilvev_w
#define __msa_ilvev_d __builtin_msa_ilvev_d
#define __msa_ilvod_b __builtin_msa_ilvod_b
#define __msa_ilvod_h __builtin_msa_ilvod_h
#define __msa_ilvod_w __builtin_msa_ilvod_w
#define __msa_ilvod_d __builtin_msa_ilvod_d
#define __msa_vshf_b __builtin_msa_vshf_b
#define __msa_vshf_h __builtin_msa_vshf_h
#define __msa_vshf_w __builtin_msa_vshf_w
#define __msa_vshf_d __builtin_msa_vshf_d
#define __msa_and_v __builtin_msa_and_v
#define __msa_andi_b __builtin_msa_andi_b
#define __msa_or_v __builtin_msa_or_v
#define __msa_ori_b __builtin_msa_ori_b
#define __msa_nor_v __builtin_msa_nor_v
#define __msa_nori_b __builtin_msa_nori_b
#define __msa_xor_v __builtin_msa_xor_v
#define __msa_xori_b __builtin_msa_xori_b
#define __msa_bmnz_v __builtin_msa_bmnz_v
#define __msa_bmnzi_b __builtin_msa_bmnzi_b
#define __msa_bmz_v __builtin_msa_bmz_v
#define __msa_bmzi_b __builtin_msa_bmzi_b
#define __msa_bsel_v __builtin_msa_bsel_v
#define __msa_bseli_b __builtin_msa_bseli_b
#define __msa_shf_b __builtin_msa_shf_b
#define __msa_shf_h __builtin_msa_shf_h
#define __msa_shf_w __builtin_msa_shf_w
#define __msa_test_bnz_v __builtin_msa_bnz_v
#define __msa_test_bz_v __builtin_msa_bz_v
#define __msa_fill_b __builtin_msa_fill_b
#define __msa_fill_h __builtin_msa_fill_h
#define __msa_fill_w __builtin_msa_fill_w
#define __msa_fill_d __builtin_msa_fill_d
#define __msa_pcnt_b __builtin_msa_pcnt_b
#define __msa_pcnt_h __builtin_msa_pcnt_h
#define __msa_pcnt_w __builtin_msa_pcnt_w
#define __msa_pcnt_d __builtin_msa_pcnt_d
#define __msa_nloc_b __builtin_msa_nloc_b
#define __msa_nloc_h __builtin_msa_nloc_h
#define __msa_nloc_w __builtin_msa_nloc_w
#define __msa_nloc_d __builtin_msa_nloc_d
#define __msa_nlzc_b __builtin_msa_nlzc_b
#define __msa_nlzc_h __builtin_msa_nlzc_h
#define __msa_nlzc_w __builtin_msa_nlzc_w
#define __msa_nlzc_d __builtin_msa_nlzc_d
#define __msa_copy_s_b __builtin_msa_copy_s_b
#define __msa_copy_s_h __builtin_msa_copy_s_h
#define __msa_copy_s_w __builtin_msa_copy_s_w
#define __msa_copy_s_d __builtin_msa_copy_s_d
#define __msa_copy_u_b __builtin_msa_copy_u_b
#define __msa_copy_u_h __builtin_msa_copy_u_h
#define __msa_copy_u_w __builtin_msa_copy_u_w
#define __msa_copy_u_d __builtin_msa_copy_u_d
#define __msa_insert_b __builtin_msa_insert_b
#define __msa_insert_h __builtin_msa_insert_h
#define __msa_insert_w __builtin_msa_insert_w
#define __msa_insert_d __builtin_msa_insert_d
#define __msa_insve_b __builtin_msa_insve_b
#define __msa_insve_h __builtin_msa_insve_h
#define __msa_insve_w __builtin_msa_insve_w
#define __msa_insve_d __builtin_msa_insve_d
#define __msa_test_bnz_b __builtin_msa_bnz_b
#define __msa_test_bnz_h __builtin_msa_bnz_h
#define __msa_test_bnz_w __builtin_msa_bnz_w
#define __msa_test_bnz_d __builtin_msa_bnz_d
#define __msa_test_bz_b __builtin_msa_bz_b
#define __msa_test_bz_h __builtin_msa_bz_h
#define __msa_test_bz_w __builtin_msa_bz_w
#define __msa_test_bz_d __builtin_msa_bz_d
#define __msa_ldi_b __builtin_msa_ldi_b
#define __msa_ldi_h __builtin_msa_ldi_h
#define __msa_ldi_w __builtin_msa_ldi_w
#define __msa_ldi_d __builtin_msa_ldi_d
#define __msa_fcaf_w __builtin_msa_fcaf_w
#define __msa_fcaf_d __builtin_msa_fcaf_d
#define __msa_fcor_w __builtin_msa_fcor_w
#define __msa_fcor_d __builtin_msa_fcor_d
#define __msa_fcun_w __builtin_msa_fcun_w
#define __msa_fcun_d __builtin_msa_fcun_d
#define __msa_fcune_w __builtin_msa_fcune_w
#define __msa_fcune_d __builtin_msa_fcune_d
#define __msa_fcueq_w __builtin_msa_fcueq_w
#define __msa_fcueq_d __builtin_msa_fcueq_d
#define __msa_fceq_w __builtin_msa_fceq_w
#define __msa_fceq_d __builtin_msa_fceq_d
#define __msa_fcne_w __builtin_msa_fcne_w
#define __msa_fcne_d __builtin_msa_fcne_d
#define __msa_fclt_w __builtin_msa_fclt_w
#define __msa_fclt_d __builtin_msa_fclt_d
#define __msa_fcult_w __builtin_msa_fcult_w
#define __msa_fcult_d __builtin_msa_fcult_d
#define __msa_fcle_w __builtin_msa_fcle_w
#define __msa_fcle_d __builtin_msa_fcle_d
#define __msa_fcule_w __builtin_msa_fcule_w
#define __msa_fcule_d __builtin_msa_fcule_d
#define __msa_fsaf_w __builtin_msa_fsaf_w
#define __msa_fsaf_d __builtin_msa_fsaf_d
#define __msa_fsor_w __builtin_msa_fsor_w
#define __msa_fsor_d __builtin_msa_fsor_d
#define __msa_fsun_w __builtin_msa_fsun_w
#define __msa_fsun_d __builtin_msa_fsun_d
#define __msa_fsune_w __builtin_msa_fsune_w
#define __msa_fsune_d __builtin_msa_fsune_d
#define __msa_fsueq_w __builtin_msa_fsueq_w
#define __msa_fsueq_d __builtin_msa_fsueq_d
#define __msa_fseq_w __builtin_msa_fseq_w
#define __msa_fseq_d __builtin_msa_fseq_d
#define __msa_fsne_w __builtin_msa_fsne_w
#define __msa_fsne_d __builtin_msa_fsne_d
#define __msa_fslt_w __builtin_msa_fslt_w
#define __msa_fslt_d __builtin_msa_fslt_d
#define __msa_fsult_w __builtin_msa_fsult_w
#define __msa_fsult_d __builtin_msa_fsult_d
#define __msa_fsle_w __builtin_msa_fsle_w
#define __msa_fsle_d __builtin_msa_fsle_d
#define __msa_fsule_w __builtin_msa_fsule_w
#define __msa_fsule_d __builtin_msa_fsule_d
#define __msa_fadd_w __builtin_msa_fadd_w
#define __msa_fadd_d __builtin_msa_fadd_d
#define __msa_fsub_w __builtin_msa_fsub_w
#define __msa_fsub_d __builtin_msa_fsub_d
#define __msa_fmul_w __builtin_msa_fmul_w
#define __msa_fmul_d __builtin_msa_fmul_d
#define __msa_fdiv_w __builtin_msa_fdiv_w
#define __msa_fdiv_d __builtin_msa_fdiv_d
#define __msa_fmadd_w __builtin_msa_fmadd_w
#define __msa_fmadd_d __builtin_msa_fmadd_d
#define __msa_fmsub_w __builtin_msa_fmsub_w
#define __msa_fmsub_d __builtin_msa_fmsub_d
#define __msa_fexp2_w __builtin_msa_fexp2_w
#define __msa_fexp2_d __builtin_msa_fexp2_d
#define __msa_fexdo_h __builtin_msa_fexdo_h
#define __msa_fexdo_w __builtin_msa_fexdo_w
#define __msa_ftq_h __builtin_msa_ftq_h
#define __msa_ftq_w __builtin_msa_ftq_w
#define __msa_fmin_w __builtin_msa_fmin_w
#define __msa_fmin_d __builtin_msa_fmin_d
#define __msa_fmin_a_w __builtin_msa_fmin_a_w
#define __msa_fmin_a_d __builtin_msa_fmin_a_d
#define __msa_fmax_w __builtin_msa_fmax_w
#define __msa_fmax_d __builtin_msa_fmax_d
#define __msa_fmax_a_w __builtin_msa_fmax_a_w
#define __msa_fmax_a_d __builtin_msa_fmax_a_d
#define __msa_mul_q_h __builtin_msa_mul_q_h
#define __msa_mul_q_w __builtin_msa_mul_q_w
#define __msa_mulr_q_h __builtin_msa_mulr_q_h
#define __msa_mulr_q_w __builtin_msa_mulr_q_w
#define __msa_madd_q_h __builtin_msa_madd_q_h
#define __msa_madd_q_w __builtin_msa_madd_q_w
#define __msa_maddr_q_h __builtin_msa_maddr_q_h
#define __msa_maddr_q_w __builtin_msa_maddr_q_w
#define __msa_msub_q_h __builtin_msa_msub_q_h
#define __msa_msub_q_w __builtin_msa_msub_q_w
#define __msa_msubr_q_h __builtin_msa_msubr_q_h
#define __msa_msubr_q_w __builtin_msa_msubr_q_w
#define __msa_fclass_w __builtin_msa_fclass_w
#define __msa_fclass_d __builtin_msa_fclass_d
#define __msa_fsqrt_w __builtin_msa_fsqrt_w
#define __msa_fsqrt_d __builtin_msa_fsqrt_d
#define __msa_frcp_w __builtin_msa_frcp_w
#define __msa_frcp_d __builtin_msa_frcp_d
#define __msa_frint_w __builtin_msa_frint_w
#define __msa_frint_d __builtin_msa_frint_d
#define __msa_frsqrt_w __builtin_msa_frsqrt_w
#define __msa_frsqrt_d __builtin_msa_frsqrt_d
#define __msa_flog2_w __builtin_msa_flog2_w
#define __msa_flog2_d __builtin_msa_flog2_d
#define __msa_fexupl_w __builtin_msa_fexupl_w
#define __msa_fexupl_d __builtin_msa_fexupl_d
#define __msa_fexupr_w __builtin_msa_fexupr_w
#define __msa_fexupr_d __builtin_msa_fexupr_d
#define __msa_ffql_w __builtin_msa_ffql_w
#define __msa_ffql_d __builtin_msa_ffql_d
#define __msa_ffqr_w __builtin_msa_ffqr_w
#define __msa_ffqr_d __builtin_msa_ffqr_d
#define __msa_ftint_s_w __builtin_msa_ftint_s_w
#define __msa_ftint_s_d __builtin_msa_ftint_s_d
#define __msa_ftint_u_w __builtin_msa_ftint_u_w
#define __msa_ftint_u_d __builtin_msa_ftint_u_d
#define __msa_ftrunc_s_w __builtin_msa_ftrunc_s_w
#define __msa_ftrunc_s_d __builtin_msa_ftrunc_s_d
#define __msa_ftrunc_u_w __builtin_msa_ftrunc_u_w
#define __msa_ftrunc_u_d __builtin_msa_ftrunc_u_d
#define __msa_ffint_s_w __builtin_msa_ffint_s_w
#define __msa_ffint_s_d __builtin_msa_ffint_s_d
#define __msa_ffint_u_w __builtin_msa_ffint_u_w
#define __msa_ffint_u_d __builtin_msa_ffint_u_d
#define __msa_cfcmsa __builtin_msa_cfcmsa
#define __msa_move_v __builtin_msa_move_v
#define __msa_cast_to_vector_float __builtin_msa_cast_to_vector_float
#define __msa_cast_to_vector_double __builtin_msa_cast_to_vector_double
#define __msa_cast_to_scalar_float __builtin_msa_cast_to_scalar_float
#define __msa_cast_to_scalar_double __builtin_msa_cast_to_scalar_double
#endif /* defined(__mips_msa) */
#endif /* _MSA_H */

View File

@ -1197,11 +1197,19 @@ BlockScopeInfo *Sema::getCurBlock() {
return CurBSI;
}
LambdaScopeInfo *Sema::getCurLambda() {
LambdaScopeInfo *Sema::getCurLambda(bool IgnoreCapturedRegions) {
if (FunctionScopes.empty())
return nullptr;
auto CurLSI = dyn_cast<LambdaScopeInfo>(FunctionScopes.back());
auto I = FunctionScopes.rbegin();
if (IgnoreCapturedRegions) {
auto E = FunctionScopes.rend();
while (I != E && isa<CapturedRegionScopeInfo>(*I))
++I;
if (I == E)
return nullptr;
}
auto *CurLSI = dyn_cast<LambdaScopeInfo>(*I);
if (CurLSI && CurLSI->Lambda &&
!CurLSI->Lambda->Encloses(CurContext)) {
// We have switched contexts due to template instantiation.

View File

@ -806,7 +806,7 @@ bool Sema::BuildCXXNestedNameSpecifier(Scope *S,
if (!Found.empty()) {
if (TypeDecl *TD = Found.getAsSingle<TypeDecl>())
Diag(IdentifierLoc, diag::err_expected_class_or_namespace)
<< QualType(TD->getTypeForDecl(), 0) << getLangOpts().CPlusPlus;
<< Context.getTypeDeclType(TD) << getLangOpts().CPlusPlus;
else {
Diag(IdentifierLoc, diag::err_expected_class_or_namespace)
<< &Identifier << getLangOpts().CPlusPlus;

View File

@ -1454,8 +1454,17 @@ bool Sema::CheckAArch64BuiltinFunctionCall(unsigned BuiltinID,
return SemaBuiltinConstantArgRange(TheCall, i, l, u + l);
}
// CheckMipsBuiltinFunctionCall - Checks the constant value passed to the
// intrinsic is correct. The switch statement is ordered by DSP, MSA. The
// ordering for DSP is unspecified. MSA is ordered by the data format used
// by the underlying instruction i.e., df/m, df/n and then by size.
//
// FIXME: The size tests here should instead be tablegen'd along with the
// definitions from include/clang/Basic/BuiltinsMips.def.
// FIXME: GCC is strict on signedness for some of these intrinsics, we should
// be too.
bool Sema::CheckMipsBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
unsigned i = 0, l = 0, u = 0;
unsigned i = 0, l = 0, u = 0, m = 0;
switch (BuiltinID) {
default: return false;
case Mips::BI__builtin_mips_wrdsp: i = 1; l = 0; u = 63; break;
@ -1465,9 +1474,168 @@ bool Sema::CheckMipsBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
case Mips::BI__builtin_mips_precr_sra_ph_w: i = 2; l = 0; u = 31; break;
case Mips::BI__builtin_mips_precr_sra_r_ph_w: i = 2; l = 0; u = 31; break;
case Mips::BI__builtin_mips_prepend: i = 2; l = 0; u = 31; break;
// MSA instrinsics. Instructions (which the intrinsics maps to) which use the
// df/m field.
// These intrinsics take an unsigned 3 bit immediate.
case Mips::BI__builtin_msa_bclri_b:
case Mips::BI__builtin_msa_bnegi_b:
case Mips::BI__builtin_msa_bseti_b:
case Mips::BI__builtin_msa_sat_s_b:
case Mips::BI__builtin_msa_sat_u_b:
case Mips::BI__builtin_msa_slli_b:
case Mips::BI__builtin_msa_srai_b:
case Mips::BI__builtin_msa_srari_b:
case Mips::BI__builtin_msa_srli_b:
case Mips::BI__builtin_msa_srlri_b: i = 1; l = 0; u = 7; break;
case Mips::BI__builtin_msa_binsli_b:
case Mips::BI__builtin_msa_binsri_b: i = 2; l = 0; u = 7; break;
// These intrinsics take an unsigned 4 bit immediate.
case Mips::BI__builtin_msa_bclri_h:
case Mips::BI__builtin_msa_bnegi_h:
case Mips::BI__builtin_msa_bseti_h:
case Mips::BI__builtin_msa_sat_s_h:
case Mips::BI__builtin_msa_sat_u_h:
case Mips::BI__builtin_msa_slli_h:
case Mips::BI__builtin_msa_srai_h:
case Mips::BI__builtin_msa_srari_h:
case Mips::BI__builtin_msa_srli_h:
case Mips::BI__builtin_msa_srlri_h: i = 1; l = 0; u = 15; break;
case Mips::BI__builtin_msa_binsli_h:
case Mips::BI__builtin_msa_binsri_h: i = 2; l = 0; u = 15; break;
// These intrinsics take an unsigned 5 bit immedate.
// The first block of intrinsics actually have an unsigned 5 bit field,
// not a df/n field.
case Mips::BI__builtin_msa_clei_u_b:
case Mips::BI__builtin_msa_clei_u_h:
case Mips::BI__builtin_msa_clei_u_w:
case Mips::BI__builtin_msa_clei_u_d:
case Mips::BI__builtin_msa_clti_u_b:
case Mips::BI__builtin_msa_clti_u_h:
case Mips::BI__builtin_msa_clti_u_w:
case Mips::BI__builtin_msa_clti_u_d:
case Mips::BI__builtin_msa_maxi_u_b:
case Mips::BI__builtin_msa_maxi_u_h:
case Mips::BI__builtin_msa_maxi_u_w:
case Mips::BI__builtin_msa_maxi_u_d:
case Mips::BI__builtin_msa_mini_u_b:
case Mips::BI__builtin_msa_mini_u_h:
case Mips::BI__builtin_msa_mini_u_w:
case Mips::BI__builtin_msa_mini_u_d:
case Mips::BI__builtin_msa_addvi_b:
case Mips::BI__builtin_msa_addvi_h:
case Mips::BI__builtin_msa_addvi_w:
case Mips::BI__builtin_msa_addvi_d:
case Mips::BI__builtin_msa_bclri_w:
case Mips::BI__builtin_msa_bnegi_w:
case Mips::BI__builtin_msa_bseti_w:
case Mips::BI__builtin_msa_sat_s_w:
case Mips::BI__builtin_msa_sat_u_w:
case Mips::BI__builtin_msa_slli_w:
case Mips::BI__builtin_msa_srai_w:
case Mips::BI__builtin_msa_srari_w:
case Mips::BI__builtin_msa_srli_w:
case Mips::BI__builtin_msa_srlri_w:
case Mips::BI__builtin_msa_subvi_b:
case Mips::BI__builtin_msa_subvi_h:
case Mips::BI__builtin_msa_subvi_w:
case Mips::BI__builtin_msa_subvi_d: i = 1; l = 0; u = 31; break;
case Mips::BI__builtin_msa_binsli_w:
case Mips::BI__builtin_msa_binsri_w: i = 2; l = 0; u = 31; break;
// These intrinsics take an unsigned 6 bit immediate.
case Mips::BI__builtin_msa_bclri_d:
case Mips::BI__builtin_msa_bnegi_d:
case Mips::BI__builtin_msa_bseti_d:
case Mips::BI__builtin_msa_sat_s_d:
case Mips::BI__builtin_msa_sat_u_d:
case Mips::BI__builtin_msa_slli_d:
case Mips::BI__builtin_msa_srai_d:
case Mips::BI__builtin_msa_srari_d:
case Mips::BI__builtin_msa_srli_d:
case Mips::BI__builtin_msa_srlri_d: i = 1; l = 0; u = 63; break;
case Mips::BI__builtin_msa_binsli_d:
case Mips::BI__builtin_msa_binsri_d: i = 2; l = 0; u = 63; break;
// These intrinsics take a signed 5 bit immediate.
case Mips::BI__builtin_msa_ceqi_b:
case Mips::BI__builtin_msa_ceqi_h:
case Mips::BI__builtin_msa_ceqi_w:
case Mips::BI__builtin_msa_ceqi_d:
case Mips::BI__builtin_msa_clti_s_b:
case Mips::BI__builtin_msa_clti_s_h:
case Mips::BI__builtin_msa_clti_s_w:
case Mips::BI__builtin_msa_clti_s_d:
case Mips::BI__builtin_msa_clei_s_b:
case Mips::BI__builtin_msa_clei_s_h:
case Mips::BI__builtin_msa_clei_s_w:
case Mips::BI__builtin_msa_clei_s_d:
case Mips::BI__builtin_msa_maxi_s_b:
case Mips::BI__builtin_msa_maxi_s_h:
case Mips::BI__builtin_msa_maxi_s_w:
case Mips::BI__builtin_msa_maxi_s_d:
case Mips::BI__builtin_msa_mini_s_b:
case Mips::BI__builtin_msa_mini_s_h:
case Mips::BI__builtin_msa_mini_s_w:
case Mips::BI__builtin_msa_mini_s_d: i = 1; l = -16; u = 15; break;
// These intrinsics take an unsigned 8 bit immediate.
case Mips::BI__builtin_msa_andi_b:
case Mips::BI__builtin_msa_nori_b:
case Mips::BI__builtin_msa_ori_b:
case Mips::BI__builtin_msa_shf_b:
case Mips::BI__builtin_msa_shf_h:
case Mips::BI__builtin_msa_shf_w:
case Mips::BI__builtin_msa_xori_b: i = 1; l = 0; u = 255; break;
case Mips::BI__builtin_msa_bseli_b:
case Mips::BI__builtin_msa_bmnzi_b:
case Mips::BI__builtin_msa_bmzi_b: i = 2; l = 0; u = 255; break;
// df/n format
// These intrinsics take an unsigned 4 bit immediate.
case Mips::BI__builtin_msa_copy_s_b:
case Mips::BI__builtin_msa_copy_u_b:
case Mips::BI__builtin_msa_insve_b:
case Mips::BI__builtin_msa_splati_b: i = 1; l = 0; u = 15; break;
case Mips::BI__builtin_msa_sld_b:
case Mips::BI__builtin_msa_sldi_b: i = 2; l = 0; u = 15; break;
// These intrinsics take an unsigned 3 bit immediate.
case Mips::BI__builtin_msa_copy_s_h:
case Mips::BI__builtin_msa_copy_u_h:
case Mips::BI__builtin_msa_insve_h:
case Mips::BI__builtin_msa_splati_h: i = 1; l = 0; u = 7; break;
case Mips::BI__builtin_msa_sld_h:
case Mips::BI__builtin_msa_sldi_h: i = 2; l = 0; u = 7; break;
// These intrinsics take an unsigned 2 bit immediate.
case Mips::BI__builtin_msa_copy_s_w:
case Mips::BI__builtin_msa_copy_u_w:
case Mips::BI__builtin_msa_insve_w:
case Mips::BI__builtin_msa_splati_w: i = 1; l = 0; u = 3; break;
case Mips::BI__builtin_msa_sld_w:
case Mips::BI__builtin_msa_sldi_w: i = 2; l = 0; u = 3; break;
// These intrinsics take an unsigned 1 bit immediate.
case Mips::BI__builtin_msa_copy_s_d:
case Mips::BI__builtin_msa_copy_u_d:
case Mips::BI__builtin_msa_insve_d:
case Mips::BI__builtin_msa_splati_d: i = 1; l = 0; u = 1; break;
case Mips::BI__builtin_msa_sld_d:
case Mips::BI__builtin_msa_sldi_d: i = 2; l = 0; u = 1; break;
// Memory offsets and immediate loads.
// These intrinsics take a signed 10 bit immediate.
case Mips::BI__builtin_msa_ldi_b: i = 0; l = -128; u = 127; break;
case Mips::BI__builtin_msa_ldi_h:
case Mips::BI__builtin_msa_ldi_w:
case Mips::BI__builtin_msa_ldi_d: i = 0; l = -512; u = 511; break;
case Mips::BI__builtin_msa_ld_b: i = 1; l = -512; u = 511; m = 16; break;
case Mips::BI__builtin_msa_ld_h: i = 1; l = -1024; u = 1022; m = 16; break;
case Mips::BI__builtin_msa_ld_w: i = 1; l = -2048; u = 2044; m = 16; break;
case Mips::BI__builtin_msa_ld_d: i = 1; l = -4096; u = 4088; m = 16; break;
case Mips::BI__builtin_msa_st_b: i = 2; l = -512; u = 511; m = 16; break;
case Mips::BI__builtin_msa_st_h: i = 2; l = -1024; u = 1022; m = 16; break;
case Mips::BI__builtin_msa_st_w: i = 2; l = -2048; u = 2044; m = 16; break;
case Mips::BI__builtin_msa_st_d: i = 2; l = -4096; u = 4088; m = 16; break;
}
if (!m)
return SemaBuiltinConstantArgRange(TheCall, i, l, u);
return SemaBuiltinConstantArgRange(TheCall, i, l, u) ||
SemaBuiltinConstantArgMultiple(TheCall, i, m);
}
bool Sema::CheckPPCBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
@ -3614,6 +3782,28 @@ bool Sema::SemaBuiltinConstantArgRange(CallExpr *TheCall, int ArgNum,
return false;
}
/// SemaBuiltinConstantArgMultiple - Handle a check if argument ArgNum of CallExpr
/// TheCall is a constant expression is a multiple of Num..
bool Sema::SemaBuiltinConstantArgMultiple(CallExpr *TheCall, int ArgNum,
unsigned Num) {
llvm::APSInt Result;
// We can't check the value of a dependent argument.
Expr *Arg = TheCall->getArg(ArgNum);
if (Arg->isTypeDependent() || Arg->isValueDependent())
return false;
// Check constant-ness first.
if (SemaBuiltinConstantArg(TheCall, ArgNum, Result))
return true;
if (Result.getSExtValue() % Num != 0)
return Diag(TheCall->getLocStart(), diag::err_argument_not_multiple)
<< Num << Arg->getSourceRange();
return false;
}
/// SemaBuiltinARMSpecialReg - Handle a check if argument ArgNum of CallExpr
/// TheCall is an ARM/AArch64 special register string literal.
bool Sema::SemaBuiltinARMSpecialReg(unsigned BuiltinID, CallExpr *TheCall,

View File

@ -9615,7 +9615,8 @@ void Sema::AddInitializerToDecl(Decl *RealDecl, Expr *Init,
}
VarDecl *Def;
if ((Def = VDecl->getDefinition()) && Def != VDecl) {
if ((Def = VDecl->getDefinition()) && Def != VDecl &&
(!VDecl->isStaticDataMember() || VDecl->isOutOfLine())) {
NamedDecl *Hidden = nullptr;
if (!hasVisibleDefinition(Def, &Hidden) &&
(VDecl->getFormalLinkage() == InternalLinkage ||

View File

@ -4522,6 +4522,11 @@ ExprResult Sema::BuildCXXDefaultArgExpr(SourceLocation CallLoc,
MutiLevelArgList.getInnermost());
if (Inst.isInvalid())
return ExprError();
if (Inst.isAlreadyInstantiating()) {
Diag(Param->getLocStart(), diag::err_recursive_default_argument) << FD;
Param->setInvalidDecl();
return ExprError();
}
ExprResult Result;
{
@ -13880,7 +13885,8 @@ static void DoMarkVarDeclReferenced(Sema &SemaRef, SourceLocation Loc,
(SemaRef.CurContext != Var->getDeclContext() &&
Var->getDeclContext()->isFunctionOrMethod() && Var->hasLocalStorage());
if (RefersToEnclosingScope) {
if (LambdaScopeInfo *const LSI = SemaRef.getCurLambda()) {
if (LambdaScopeInfo *const LSI =
SemaRef.getCurLambda(/*IgnoreCapturedRegions=*/true)) {
// If a variable could potentially be odr-used, defer marking it so
// until we finish analyzing the full expression for any
// lvalue-to-rvalue

View File

@ -4221,9 +4221,12 @@ static bool EvaluateUnaryTypeTrait(Sema &Self, TypeTrait UTT,
// A template constructor is never a copy constructor.
// FIXME: However, it may actually be selected at the actual overload
// resolution point.
if (isa<FunctionTemplateDecl>(ND))
if (isa<FunctionTemplateDecl>(ND->getUnderlyingDecl()))
continue;
const CXXConstructorDecl *Constructor = cast<CXXConstructorDecl>(ND);
// UsingDecl itself is not a constructor
if (isa<UsingDecl>(ND))
continue;
auto *Constructor = cast<CXXConstructorDecl>(ND->getUnderlyingDecl());
if (Constructor->isCopyConstructor(FoundTQs)) {
FoundConstructor = true;
const FunctionProtoType *CPT
@ -4257,9 +4260,12 @@ static bool EvaluateUnaryTypeTrait(Sema &Self, TypeTrait UTT,
bool FoundConstructor = false;
for (const auto *ND : Self.LookupConstructors(RD)) {
// FIXME: In C++0x, a constructor template can be a default constructor.
if (isa<FunctionTemplateDecl>(ND))
if (isa<FunctionTemplateDecl>(ND->getUnderlyingDecl()))
continue;
const CXXConstructorDecl *Constructor = cast<CXXConstructorDecl>(ND);
// UsingDecl itself is not a constructor
if (isa<UsingDecl>(ND))
continue;
auto *Constructor = cast<CXXConstructorDecl>(ND->getUnderlyingDecl());
if (Constructor->isDefaultConstructor()) {
FoundConstructor = true;
const FunctionProtoType *CPT
@ -6584,8 +6590,14 @@ static void CheckIfAnyEnclosingLambdasMustCaptureAnyPotentialCaptures(
assert(!S.isUnevaluatedContext());
assert(S.CurContext->isDependentContext());
assert(CurrentLSI->CallOperator == S.CurContext &&
#ifndef NDEBUG
DeclContext *DC = S.CurContext;
while (DC && isa<CapturedDecl>(DC))
DC = DC->getParent();
assert(
CurrentLSI->CallOperator == DC &&
"The current call operator must be synchronized with Sema's CurContext");
#endif // NDEBUG
const bool IsFullExprInstantiationDependent = FE->isInstantiationDependent();
@ -7051,7 +7063,8 @@ ExprResult Sema::ActOnFinishFullExpr(Expr *FE, SourceLocation CC,
// and then the full-expression +n + ({ 0; }); ends, but it's too late
// for us to see that we need to capture n after all.
LambdaScopeInfo *const CurrentLSI = getCurLambda();
LambdaScopeInfo *const CurrentLSI =
getCurLambda(/*IgnoreCapturedRegions=*/true);
// FIXME: PR 17877 showed that getCurLambda() can return a valid pointer
// even if CurContext is not a lambda call operator. Refer to that Bug Report
// for an example of the code that might cause this asynchrony.
@ -7066,7 +7079,10 @@ ExprResult Sema::ActOnFinishFullExpr(Expr *FE, SourceLocation CC,
// constructor/destructor.
// - Teach the handful of places that iterate over FunctionScopes to
// stop at the outermost enclosing lexical scope."
const bool IsInLambdaDeclContext = isLambdaCallOperator(CurContext);
DeclContext *DC = CurContext;
while (DC && isa<CapturedDecl>(DC))
DC = DC->getParent();
const bool IsInLambdaDeclContext = isLambdaCallOperator(DC);
if (IsInLambdaDeclContext && CurrentLSI &&
CurrentLSI->hasPotentialCaptures() && !FullExpr.isInvalid())
CheckIfAnyEnclosingLambdasMustCaptureAnyPotentialCaptures(FE, CurrentLSI,

View File

@ -66,9 +66,13 @@ getStackIndexOfNearestEnclosingCaptureReadyLambda(
// Label failure to capture.
const Optional<unsigned> NoLambdaIsCaptureReady;
// Ignore all inner captured regions.
unsigned CurScopeIndex = FunctionScopes.size() - 1;
while (CurScopeIndex > 0 && isa<clang::sema::CapturedRegionScopeInfo>(
FunctionScopes[CurScopeIndex]))
--CurScopeIndex;
assert(
isa<clang::sema::LambdaScopeInfo>(
FunctionScopes[FunctionScopes.size() - 1]) &&
isa<clang::sema::LambdaScopeInfo>(FunctionScopes[CurScopeIndex]) &&
"The function on the top of sema's function-info stack must be a lambda");
// If VarToCapture is null, we are attempting to capture 'this'.
@ -76,7 +80,6 @@ getStackIndexOfNearestEnclosingCaptureReadyLambda(
const bool IsCapturingVariable = !IsCapturingThis;
// Start with the current lambda at the top of the stack (highest index).
unsigned CurScopeIndex = FunctionScopes.size() - 1;
DeclContext *EnclosingDC =
cast<sema::LambdaScopeInfo>(FunctionScopes[CurScopeIndex])->CallOperator;
@ -311,18 +314,21 @@ Sema::getCurrentMangleNumberContext(const DeclContext *DC,
bool IsInNonspecializedTemplate =
!ActiveTemplateInstantiations.empty() || CurContext->isDependentContext();
switch (Kind) {
case Normal:
case Normal: {
// -- the bodies of non-exported nonspecialized template functions
// -- the bodies of inline functions
if ((IsInNonspecializedTemplate &&
!(ManglingContextDecl && isa<ParmVarDecl>(ManglingContextDecl))) ||
isInInlineFunction(CurContext)) {
ManglingContextDecl = nullptr;
while (auto *CD = dyn_cast<CapturedDecl>(DC))
DC = CD->getParent();
return &Context.getManglingNumberContext(DC);
}
ManglingContextDecl = nullptr;
return nullptr;
}
case StaticDataMember:
// -- the initializers of nonspecialized static members of template classes

View File

@ -9133,7 +9133,7 @@ OMPClause *Sema::ActOnOpenMPReductionClause(
// for all threads of the team.
if (!ASE && !OASE && VD) {
VarDecl *VDDef = VD->getDefinition();
if (VD->getType()->isReferenceType() && VDDef) {
if (VD->getType()->isReferenceType() && VDDef && VDDef->hasInit()) {
DSARefChecker Check(DSAStack);
if (Check.Visit(VDDef->getInit())) {
Diag(ELoc, diag::err_omp_reduction_ref_type_arg) << ERange;
@ -10680,6 +10680,25 @@ static bool CheckMapConflicts(
if (CI->getAssociatedDeclaration() != SI->getAssociatedDeclaration())
break;
}
// Check if the extra components of the expressions in the enclosing
// data environment are redundant for the current base declaration.
// If they are, the maps completely overlap, which is legal.
for (; SI != SE; ++SI) {
QualType Type;
if (auto *ASE =
dyn_cast<ArraySubscriptExpr>(SI->getAssociatedExpression())) {
Type = ASE->getBase()->IgnoreParenImpCasts()->getType();
} else if (auto *OASE =
dyn_cast<OMPArraySectionExpr>(SI->getAssociatedExpression())) {
auto *E = OASE->getBase()->IgnoreParenImpCasts();
Type =
OMPArraySectionExpr::getBaseOriginalType(E).getCanonicalType();
}
if (Type.isNull() || Type->isAnyPointerType() ||
CheckArrayExpressionDoesNotReferToWholeSize(
SemaRef, SI->getAssociatedExpression(), Type))
break;
}
// OpenMP 4.5 [2.15.5.1, map Clause, Restrictions, p.4]
// List items of map clauses in the same construct must not share

View File

@ -3256,7 +3256,7 @@ SubstDefaultTemplateArgument(Sema &SemaRef,
// on the previously-computed template arguments.
if (ArgType->getType()->isDependentType()) {
Sema::InstantiatingTemplate Inst(SemaRef, TemplateLoc,
Template, Converted,
Param, Template, Converted,
SourceRange(TemplateLoc, RAngleLoc));
if (Inst.isInvalid())
return nullptr;
@ -3308,7 +3308,7 @@ SubstDefaultTemplateArgument(Sema &SemaRef,
NonTypeTemplateParmDecl *Param,
SmallVectorImpl<TemplateArgument> &Converted) {
Sema::InstantiatingTemplate Inst(SemaRef, TemplateLoc,
Template, Converted,
Param, Template, Converted,
SourceRange(TemplateLoc, RAngleLoc));
if (Inst.isInvalid())
return ExprError();
@ -3359,7 +3359,8 @@ SubstDefaultTemplateArgument(Sema &SemaRef,
TemplateTemplateParmDecl *Param,
SmallVectorImpl<TemplateArgument> &Converted,
NestedNameSpecifierLoc &QualifierLoc) {
Sema::InstantiatingTemplate Inst(SemaRef, TemplateLoc, Template, Converted,
Sema::InstantiatingTemplate Inst(
SemaRef, TemplateLoc, TemplateParameter(Param), Template, Converted,
SourceRange(TemplateLoc, RAngleLoc));
if (Inst.isInvalid())
return TemplateName();
@ -3981,7 +3982,9 @@ bool Sema::CheckTemplateArgumentList(TemplateDecl *Template,
}
// Introduce an instantiation record that describes where we are using
// the default template argument.
// the default template argument. We're not actually instantiating a
// template here, we just create this object to put a note into the
// context stack.
InstantiatingTemplate Inst(*this, RAngleLoc, Template, *Param, Converted,
SourceRange(TemplateLoc, RAngleLoc));
if (Inst.isInvalid())

View File

@ -225,6 +225,10 @@ Sema::InstantiatingTemplate::InstantiatingTemplate(
Inst.NumTemplateArgs = TemplateArgs.size();
Inst.DeductionInfo = DeductionInfo;
Inst.InstantiationRange = InstantiationRange;
AlreadyInstantiating =
!SemaRef.InstantiatingSpecializations
.insert(std::make_pair(Inst.Entity->getCanonicalDecl(), Inst.Kind))
.second;
SemaRef.InNonInstantiationSFINAEContext = false;
SemaRef.ActiveTemplateInstantiations.push_back(Inst);
if (!Inst.isInstantiationRecord())
@ -247,13 +251,14 @@ Sema::InstantiatingTemplate::InstantiatingTemplate(
PointOfInstantiation, InstantiationRange, Entity) {}
Sema::InstantiatingTemplate::InstantiatingTemplate(
Sema &SemaRef, SourceLocation PointOfInstantiation, TemplateDecl *Template,
ArrayRef<TemplateArgument> TemplateArgs, SourceRange InstantiationRange)
Sema &SemaRef, SourceLocation PointOfInstantiation, TemplateParameter Param,
TemplateDecl *Template, ArrayRef<TemplateArgument> TemplateArgs,
SourceRange InstantiationRange)
: InstantiatingTemplate(
SemaRef,
ActiveTemplateInstantiation::DefaultTemplateArgumentInstantiation,
PointOfInstantiation, InstantiationRange, Template, nullptr,
TemplateArgs) {}
PointOfInstantiation, InstantiationRange, getAsNamedDecl(Param),
Template, TemplateArgs) {}
Sema::InstantiatingTemplate::InstantiatingTemplate(
Sema &SemaRef, SourceLocation PointOfInstantiation,
@ -263,7 +268,11 @@ Sema::InstantiatingTemplate::InstantiatingTemplate(
sema::TemplateDeductionInfo &DeductionInfo, SourceRange InstantiationRange)
: InstantiatingTemplate(SemaRef, Kind, PointOfInstantiation,
InstantiationRange, FunctionTemplate, nullptr,
TemplateArgs, &DeductionInfo) {}
TemplateArgs, &DeductionInfo) {
assert(
Kind == ActiveTemplateInstantiation::ExplicitTemplateArgumentSubstitution ||
Kind == ActiveTemplateInstantiation::DeducedTemplateArgumentSubstitution);
}
Sema::InstantiatingTemplate::InstantiatingTemplate(
Sema &SemaRef, SourceLocation PointOfInstantiation,
@ -327,7 +336,8 @@ Sema::InstantiatingTemplate::InstantiatingTemplate(
void Sema::InstantiatingTemplate::Clear() {
if (!Invalid) {
if (!SemaRef.ActiveTemplateInstantiations.back().isInstantiationRecord()) {
auto &Active = SemaRef.ActiveTemplateInstantiations.back();
if (!Active.isInstantiationRecord()) {
assert(SemaRef.NonInstantiationEntries > 0);
--SemaRef.NonInstantiationEntries;
}
@ -345,6 +355,10 @@ void Sema::InstantiatingTemplate::Clear() {
SemaRef.ActiveTemplateInstantiationLookupModules.pop_back();
}
if (!AlreadyInstantiating)
SemaRef.InstantiatingSpecializations.erase(
std::make_pair(Active.Entity, Active.Kind));
SemaRef.ActiveTemplateInstantiations.pop_back();
Invalid = true;
}
@ -443,7 +457,7 @@ void Sema::PrintInstantiationStack() {
}
case ActiveTemplateInstantiation::DefaultTemplateArgumentInstantiation: {
TemplateDecl *Template = cast<TemplateDecl>(Active->Entity);
TemplateDecl *Template = cast<TemplateDecl>(Active->Template);
SmallVector<char, 128> TemplateArgsStr;
llvm::raw_svector_ostream OS(TemplateArgsStr);
Template->printName(OS);
@ -1950,6 +1964,7 @@ Sema::InstantiateClass(SourceLocation PointOfInstantiation,
InstantiatingTemplate Inst(*this, PointOfInstantiation, Instantiation);
if (Inst.isInvalid())
return true;
assert(!Inst.isAlreadyInstantiating() && "should have been caught by caller");
PrettyDeclStackTraceEntry CrashInfo(*this, Instantiation, SourceLocation(),
"instantiating class definition");
@ -2175,6 +2190,8 @@ bool Sema::InstantiateEnum(SourceLocation PointOfInstantiation,
InstantiatingTemplate Inst(*this, PointOfInstantiation, Instantiation);
if (Inst.isInvalid())
return true;
if (Inst.isAlreadyInstantiating())
return false;
PrettyDeclStackTraceEntry CrashInfo(*this, Instantiation, SourceLocation(),
"instantiating enum definition");
@ -2249,6 +2266,12 @@ bool Sema::InstantiateInClassInitializer(
InstantiatingTemplate Inst(*this, PointOfInstantiation, Instantiation);
if (Inst.isInvalid())
return true;
if (Inst.isAlreadyInstantiating()) {
// Error out if we hit an instantiation cycle for this initializer.
Diag(PointOfInstantiation, diag::err_in_class_initializer_cycle)
<< Instantiation;
return true;
}
PrettyDeclStackTraceEntry CrashInfo(*this, Instantiation, SourceLocation(),
"instantiating default member init");

View File

@ -3360,6 +3360,13 @@ void Sema::InstantiateExceptionSpec(SourceLocation PointOfInstantiation,
UpdateExceptionSpec(Decl, EST_None);
return;
}
if (Inst.isAlreadyInstantiating()) {
// This exception specification indirectly depends on itself. Reject.
// FIXME: Corresponding rule in the standard?
Diag(PointOfInstantiation, diag::err_exception_spec_cycle) << Decl;
UpdateExceptionSpec(Decl, EST_None);
return;
}
// Enter the scope of this instantiation. We don't use
// PushDeclContext because we don't have a scope.
@ -3619,7 +3626,7 @@ void Sema::InstantiateFunctionDefinition(SourceLocation PointOfInstantiation,
}
InstantiatingTemplate Inst(*this, PointOfInstantiation, Function);
if (Inst.isInvalid())
if (Inst.isInvalid() || Inst.isAlreadyInstantiating())
return;
PrettyDeclStackTraceEntry CrashInfo(*this, Function, SourceLocation(),
"instantiating function definition");
@ -3882,10 +3889,6 @@ void Sema::InstantiateVariableInitializer(
else if (OldVar->isInline())
Var->setImplicitlyInline();
if (Var->getAnyInitializer())
// We already have an initializer in the class.
return;
if (OldVar->getInit()) {
if (Var->isStaticDataMember() && !OldVar->isOutOfLine())
PushExpressionEvaluationContext(Sema::ConstantEvaluated, OldVar);
@ -3921,10 +3924,24 @@ void Sema::InstantiateVariableInitializer(
}
PopExpressionEvaluationContext();
} else if ((!Var->isStaticDataMember() || Var->isOutOfLine()) &&
!Var->isCXXForRangeDecl())
} else {
if (Var->isStaticDataMember()) {
if (!Var->isOutOfLine())
return;
// If the declaration inside the class had an initializer, don't add
// another one to the out-of-line definition.
if (OldVar->getFirstDecl()->hasInit())
return;
}
// We'll add an initializer to a for-range declaration later.
if (Var->isCXXForRangeDecl())
return;
ActOnUninitializedDecl(Var, false);
}
}
/// \brief Instantiate the definition of the given variable from its
/// template.
@ -4013,7 +4030,7 @@ void Sema::InstantiateVariableDefinition(SourceLocation PointOfInstantiation,
// FIXME: Factor out the duplicated instantiation context setup/tear down
// code here.
InstantiatingTemplate Inst(*this, PointOfInstantiation, Var);
if (Inst.isInvalid())
if (Inst.isInvalid() || Inst.isAlreadyInstantiating())
return;
PrettyDeclStackTraceEntry CrashInfo(*this, Var, SourceLocation(),
"instantiating variable initializer");
@ -4142,7 +4159,7 @@ void Sema::InstantiateVariableDefinition(SourceLocation PointOfInstantiation,
}
InstantiatingTemplate Inst(*this, PointOfInstantiation, Var);
if (Inst.isInvalid())
if (Inst.isInvalid() || Inst.isAlreadyInstantiating())
return;
PrettyDeclStackTraceEntry CrashInfo(*this, Var, SourceLocation(),
"instantiating variable definition");

View File

@ -2220,7 +2220,7 @@ void ASTDeclReader::VisitStaticAssertDecl(StaticAssertDecl *D) {
VisitDecl(D);
D->AssertExprAndFailed.setPointer(Reader.ReadExpr(F));
D->AssertExprAndFailed.setInt(Record[Idx++]);
D->Message = cast<StringLiteral>(Reader.ReadExpr(F));
D->Message = cast_or_null<StringLiteral>(Reader.ReadExpr(F));
D->RParenLoc = ReadSourceLocation(Record, Idx);
}

View File

@ -33,4 +33,4 @@ add_lld_library(lldCOFF
LINK_LIBS ${PTHREAD_LIB}
)
add_dependencies(lldCOFF COFFOptionsTableGen)
add_dependencies(lldCOFF COFFOptionsTableGen intrinsics_gen)

View File

@ -18,6 +18,7 @@
#include "llvm/CodeGen/Analysis.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/Module.h"
#include "llvm/Support/Path.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
@ -459,7 +460,7 @@ template <class ELFT> void SharedFile<ELFT>::parseSoName() {
}
this->initStringTable();
SoName = this->getName();
SoName = sys::path::filename(this->getName());
if (!DynamicSec)
return;

View File

@ -382,6 +382,14 @@ class ArchSpec
return m_core >= eCore_arm_generic && m_core < kNumCores;
}
//------------------------------------------------------------------
/// Return a string representing target application ABI.
///
/// @return A string representing target application ABI.
//------------------------------------------------------------------
std::string GetTargetABI() const;
bool
TripleVendorWasSpecified() const
{
@ -677,6 +685,8 @@ class ArchSpec
m_flags = flags;
}
void SetFlags(std::string elf_abi);
protected:
bool
IsEqualTo (const ArchSpec& rhs, bool exact_match) const;

View File

@ -519,9 +519,44 @@ ArchSpec::IsMIPS() const
return false;
}
std::string
ArchSpec::GetClangTargetCPU ()
{
std::string ArchSpec::GetTargetABI() const {
std::string abi;
if (IsMIPS()) {
switch (GetFlags() & ArchSpec::eMIPSABI_mask) {
case ArchSpec::eMIPSABI_N64:
abi = "n64";
return abi;
case ArchSpec::eMIPSABI_N32:
abi = "n32";
return abi;
case ArchSpec::eMIPSABI_O32:
abi = "o32";
return abi;
default:
return abi;
}
}
return abi;
}
void ArchSpec::SetFlags(std::string elf_abi) {
uint32_t flag = GetFlags();
if (IsMIPS()) {
if (elf_abi == "n64")
flag |= ArchSpec::eMIPSABI_N64;
else if (elf_abi == "n32")
flag |= ArchSpec::eMIPSABI_N32;
else if (elf_abi == "o32")
flag |= ArchSpec::eMIPSABI_O32;
}
SetFlags(flag);
}
std::string ArchSpec::GetClangTargetCPU() {
std::string cpu;
const llvm::Triple::ArchType machine = GetMachine();

View File

@ -654,28 +654,31 @@ RegisterValue::GetAsUInt64 (uint64_t fail_value, bool *success_ptr) const
{
if (success_ptr)
*success_ptr = true;
switch (m_type)
{
default: break;
switch (m_type) {
default:
break;
case eTypeUInt8:
case eTypeUInt16:
case eTypeUInt32:
case eTypeUInt64:
case eTypeFloat:
case eTypeDouble:
case eTypeLongDouble: return m_scalar.ULongLong(fail_value);
case eTypeBytes:
{
switch (buffer.length)
{
default: break;
case 1:
case 2:
case 4:
case 8: return *(const uint64_t *)buffer.bytes;
}
}
case eTypeLongDouble:
return m_scalar.ULongLong(fail_value);
case eTypeBytes: {
switch (buffer.length) {
default:
break;
case 1:
return *(const uint8_t *)buffer.bytes;
case 2:
return *(const uint16_t *)buffer.bytes;
case 4:
return *(const uint32_t *)buffer.bytes;
case 8:
return *(const uint64_t *)buffer.bytes;
}
} break;
}
if (success_ptr)
*success_ptr = false;

View File

@ -566,25 +566,31 @@ ABISysV_mips64::GetReturnValueObjectImpl (Thread &thread, CompilerType &return_c
if (byte_size <= 16)
{
DataBufferSP data_sp(new DataBufferHeap(16, 0));
DataExtractor return_ext (data_sp,
target_byte_order,
DataExtractor return_ext(data_sp, target_byte_order,
target->GetArchitecture().GetAddressByteSize());
RegisterValue r2_value, r3_value, f0_value, f1_value, f2_value;
// Tracks how much bytes of r2 and r3 registers we've consumed so far
uint32_t integer_bytes = 0;
uint32_t integer_bytes = 0; // Tracks how much bytes of r2 and r3 registers we've consumed so far
bool use_fp_regs = 0; // True if return values are in FP return registers.
bool found_non_fp_field = 0; // True if we found any non floating point field in structure.
bool use_r2 = 0; // True if return values are in r2 register.
bool use_r3 = 0; // True if return values are in r3 register.
bool sucess = 0; // True if the result is copied into our data buffer
// True if return values are in FP return registers.
bool use_fp_regs = 0;
// True if we found any non floating point field in structure.
bool found_non_fp_field = 0;
// True if return values are in r2 register.
bool use_r2 = 0;
// True if return values are in r3 register.
bool use_r3 = 0;
// True if the result is copied into our data buffer
bool sucess = 0;
std::string name;
bool is_complex;
uint32_t count;
const uint32_t num_children = return_compiler_type.GetNumFields();
// A structure consisting of one or two FP values (and nothing else) will be
// returned in the two FP return-value registers i.e fp0 and fp2.
// A structure consisting of one or two FP values (and nothing else) will
// be returned in the two FP return-value registers i.e fp0 and fp2.
if (num_children <= 2)
{
uint64_t field_bit_offset = 0;
@ -592,7 +598,9 @@ ABISysV_mips64::GetReturnValueObjectImpl (Thread &thread, CompilerType &return_c
// Check if this structure contains only floating point fields
for (uint32_t idx = 0; idx < num_children; idx++)
{
CompilerType field_compiler_type = return_compiler_type.GetFieldAtIndex(idx, name, &field_bit_offset, nullptr, nullptr);
CompilerType field_compiler_type =
return_compiler_type.GetFieldAtIndex(idx, name, &field_bit_offset,
nullptr, nullptr);
if (field_compiler_type.IsFloatingPointType(count, is_complex))
use_fp_regs = 1;
@ -602,7 +610,8 @@ ABISysV_mips64::GetReturnValueObjectImpl (Thread &thread, CompilerType &return_c
if (use_fp_regs && !found_non_fp_field)
{
// We have one or two FP-only values in this structure. Get it from f0/f2 registers.
// We have one or two FP-only values in this structure. Get it from
// f0/f2 registers.
DataExtractor f0_data, f1_data, f2_data;
const RegisterInfo *f0_info = reg_ctx->GetRegisterInfoByName("f0", 0);
const RegisterInfo *f1_info = reg_ctx->GetRegisterInfoByName("f1", 0);
@ -612,62 +621,81 @@ ABISysV_mips64::GetReturnValueObjectImpl (Thread &thread, CompilerType &return_c
reg_ctx->ReadRegister(f2_info, f2_value);
f0_value.GetData(f0_data);
f2_value.GetData(f2_data);
for (uint32_t idx = 0; idx < num_children; idx++)
{
CompilerType field_compiler_type = return_compiler_type.GetFieldAtIndex(idx, name, &field_bit_offset, nullptr, nullptr);
CompilerType field_compiler_type = return_compiler_type.GetFieldAtIndex(idx, name,
&field_bit_offset,
nullptr, nullptr);
const size_t field_byte_width = field_compiler_type.GetByteSize(nullptr);
DataExtractor *copy_from_extractor = nullptr;
uint64_t return_value[2];
offset_t offset = 0;
if (idx == 0)
{
if (field_byte_width == 16) // This case is for long double type.
// This case is for long double type.
if (field_byte_width == 16)
{
// If structure contains long double type, then it is returned in fp0/fp1 registers.
reg_ctx->ReadRegister (f1_info, f1_value);
f1_value.GetData(f1_data);
// If structure contains long double type, then it is returned
// in fp0/fp1 registers.
if (target_byte_order == eByteOrderLittle)
{
f0_data.Append(f1_data);
copy_from_extractor = &f0_data;
return_value[0] = f0_data.GetU64(&offset);
reg_ctx->ReadRegister(f1_info, f1_value);
f1_value.GetData(f1_data);
offset = 0;
return_value[1] = f1_data.GetU64(&offset);
}
else
{
f1_data.Append(f0_data);
copy_from_extractor = &f1_data;
return_value[1] = f0_data.GetU64(&offset);
reg_ctx->ReadRegister(f1_info, f1_value);
f1_value.GetData(f1_data);
offset = 0;
return_value[0] = f1_data.GetU64(&offset);
}
f0_data.SetData(return_value, field_byte_width,
target_byte_order);
}
copy_from_extractor = &f0_data; // This is in f0, copy from
// register to our result
// structure
}
else
copy_from_extractor = &f0_data; // This is in f0, copy from register to our result structure
{
f2_value.GetData(f2_data);
// This is in f2, copy from register to our result structure
copy_from_extractor = &f2_data;
}
else
copy_from_extractor = &f2_data; // This is in f2, copy from register to our result structure
// Sanity check to avoid crash
if (!copy_from_extractor || field_byte_width > copy_from_extractor->GetByteSize())
return return_valobj_sp;
// copy the register contents into our data buffer
copy_from_extractor->CopyByteOrderedData (0,
field_byte_width,
data_sp->GetBytes() + (field_bit_offset/8),
field_byte_width,
target_byte_order);
copy_from_extractor->CopyByteOrderedData(0, field_byte_width,data_sp->GetBytes() + (field_bit_offset / 8),
field_byte_width, target_byte_order);
}
// The result is in our data buffer. Create a variable object out of it
return_valobj_sp = ValueObjectConstResult::Create (&thread,
return_compiler_type,
ConstString(""),
// The result is in our data buffer. Create a variable object out of
// it
return_valobj_sp = ValueObjectConstResult::Create(&thread, return_compiler_type, ConstString(""),
return_ext);
return return_valobj_sp;
}
}
// If we reach here, it means this structure either contains more than two fields or
// it contains at least one non floating point type.
// In that case, all fields are returned in GP return registers.

View File

@ -35,9 +35,14 @@
LLVM_EXTENSION offsetof(MSA_linux_mips, regname))
// Note that the size and offset will be updated by platform-specific classes.
#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((GPR_linux_mips*)NULL)->reg) / 2, GPR_OFFSET(reg), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips }, NULL, NULL, NULL, 0}
#define DEFINE_GPR(reg, alt, kind1, kind2, kind3) \
{ \
#reg, alt, sizeof(((GPR_linux_mips *) NULL)->reg) / 2, \
GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, ptrace_##reg##_mips, \
gpr_##reg##_mips }, \
NULL, NULL, NULL, 0 \
}
const uint8_t dwarf_opcode_mips [] = {
llvm::dwarf::DW_OP_regx, dwarf_sr_mips, llvm::dwarf::DW_OP_lit1,
@ -45,13 +50,24 @@ const uint8_t dwarf_opcode_mips [] = {
llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shr
};
#define DEFINE_FPR(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((FPR_linux_mips*)NULL)->reg), FPR_OFFSET(reg), eEncodingIEEE754, \
eFormatFloat, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL, dwarf_opcode_mips, sizeof(dwarf_opcode_mips)}
#define DEFINE_FPR(reg, alt, kind1, kind2, kind3) \
{ \
#reg, alt, sizeof(((FPR_linux_mips *) NULL)->reg), \
FPR_OFFSET(reg), eEncodingIEEE754, eFormatFloat, \
{kind1, kind2, kind3, ptrace_##reg##_mips, \
fpr_##reg##_mips }, \
NULL, NULL, dwarf_opcode_mips, \
sizeof(dwarf_opcode_mips) \
}
#define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((FPR_linux_mips*)NULL)->reg), FPR_OFFSET(reg), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL, NULL, 0}
#define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3) \
{ \
#reg, alt, sizeof(((FPR_linux_mips *) NULL)->reg), \
FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, ptrace_##reg##_mips, \
fpr_##reg##_mips }, \
NULL, NULL, NULL, 0 \
}
#define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingVector, \
@ -63,120 +79,211 @@ const uint8_t dwarf_opcode_mips [] = {
// RegisterKind: EH_Frame, DWARF, Generic, Procss Plugin, LLDB
static RegisterInfo
g_register_infos_mips[] =
{
DEFINE_GPR (zero, "zero", dwarf_zero_mips, dwarf_zero_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r1, "at", dwarf_r1_mips, dwarf_r1_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r2, nullptr, dwarf_r2_mips, dwarf_r2_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r3, nullptr, dwarf_r3_mips, dwarf_r3_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r4, nullptr, dwarf_r4_mips, dwarf_r4_mips, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM),
DEFINE_GPR (r5, nullptr, dwarf_r5_mips, dwarf_r5_mips, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM),
DEFINE_GPR (r6, nullptr, dwarf_r6_mips, dwarf_r6_mips, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM),
DEFINE_GPR (r7, nullptr, dwarf_r7_mips, dwarf_r7_mips, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM),
DEFINE_GPR (r8, nullptr, dwarf_r8_mips, dwarf_r8_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r9, nullptr, dwarf_r9_mips, dwarf_r9_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r10, nullptr, dwarf_r10_mips, dwarf_r10_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r11, nullptr, dwarf_r11_mips, dwarf_r11_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r12, nullptr, dwarf_r12_mips, dwarf_r12_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r13, nullptr, dwarf_r13_mips, dwarf_r13_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r14, nullptr, dwarf_r14_mips, dwarf_r14_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r15, nullptr, dwarf_r15_mips, dwarf_r15_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r16, nullptr, dwarf_r16_mips, dwarf_r16_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r17, nullptr, dwarf_r17_mips, dwarf_r17_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r18, nullptr, dwarf_r18_mips, dwarf_r18_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r19, nullptr, dwarf_r19_mips, dwarf_r19_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r20, nullptr, dwarf_r20_mips, dwarf_r20_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r21, nullptr, dwarf_r21_mips, dwarf_r21_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r22, nullptr, dwarf_r22_mips, dwarf_r22_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r23, nullptr, dwarf_r23_mips, dwarf_r23_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r24, nullptr, dwarf_r24_mips, dwarf_r24_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r25, nullptr, dwarf_r25_mips, dwarf_r25_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r26, nullptr, dwarf_r26_mips, dwarf_r26_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (r27, nullptr, dwarf_r27_mips, dwarf_r27_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (gp, "gp", dwarf_gp_mips, dwarf_gp_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (sp, "sp", dwarf_sp_mips, dwarf_sp_mips, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM),
DEFINE_GPR (r30, "fp", dwarf_r30_mips, dwarf_r30_mips, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM),
DEFINE_GPR (ra, "ra", dwarf_ra_mips, dwarf_ra_mips, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM),
DEFINE_GPR (sr, "status", dwarf_sr_mips, dwarf_sr_mips, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
DEFINE_GPR (mullo, nullptr, dwarf_lo_mips, dwarf_lo_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (mulhi, nullptr, dwarf_hi_mips, dwarf_hi_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (badvaddr, nullptr, dwarf_bad_mips, dwarf_bad_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (cause, nullptr, dwarf_cause_mips, dwarf_cause_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (pc, nullptr, dwarf_pc_mips, dwarf_pc_mips, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
DEFINE_GPR (config5, nullptr, dwarf_config5_mips, dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f0, nullptr, dwarf_f0_mips, dwarf_f0_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f1, nullptr, dwarf_f1_mips, dwarf_f1_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f2, nullptr, dwarf_f2_mips, dwarf_f2_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f3, nullptr, dwarf_f3_mips, dwarf_f3_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f4, nullptr, dwarf_f4_mips, dwarf_f4_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f5, nullptr, dwarf_f5_mips, dwarf_f5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f6, nullptr, dwarf_f6_mips, dwarf_f6_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f7, nullptr, dwarf_f7_mips, dwarf_f7_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f8, nullptr, dwarf_f8_mips, dwarf_f8_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f9, nullptr, dwarf_f9_mips, dwarf_f9_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f10, nullptr, dwarf_f10_mips, dwarf_f10_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f11, nullptr, dwarf_f11_mips, dwarf_f11_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f12, nullptr, dwarf_f12_mips, dwarf_f12_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f13, nullptr, dwarf_f13_mips, dwarf_f13_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f14, nullptr, dwarf_f14_mips, dwarf_f14_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f15, nullptr, dwarf_f15_mips, dwarf_f15_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f16, nullptr, dwarf_f16_mips, dwarf_f16_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f17, nullptr, dwarf_f17_mips, dwarf_f17_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f18, nullptr, dwarf_f18_mips, dwarf_f18_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f19, nullptr, dwarf_f19_mips, dwarf_f19_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f20, nullptr, dwarf_f20_mips, dwarf_f20_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f21, nullptr, dwarf_f21_mips, dwarf_f21_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f22, nullptr, dwarf_f22_mips, dwarf_f22_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f23, nullptr, dwarf_f23_mips, dwarf_f23_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f24, nullptr, dwarf_f24_mips, dwarf_f24_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f25, nullptr, dwarf_f25_mips, dwarf_f25_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f26, nullptr, dwarf_f26_mips, dwarf_f26_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f27, nullptr, dwarf_f27_mips, dwarf_f27_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f28, nullptr, dwarf_f28_mips, dwarf_f28_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f29, nullptr, dwarf_f29_mips, dwarf_f29_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f30, nullptr, dwarf_f30_mips, dwarf_f30_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f31, nullptr, dwarf_f31_mips, dwarf_f31_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR_INFO (fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR_INFO (fir, nullptr, dwarf_fir_mips, dwarf_fir_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR_INFO (config5, nullptr, dwarf_config5_mips, dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w0, nullptr, dwarf_w0_mips, dwarf_w0_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w1, nullptr, dwarf_w1_mips, dwarf_w1_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w2, nullptr, dwarf_w2_mips, dwarf_w2_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w3, nullptr, dwarf_w3_mips, dwarf_w3_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w4, nullptr, dwarf_w4_mips, dwarf_w4_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w5, nullptr, dwarf_w5_mips, dwarf_w5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w6, nullptr, dwarf_w6_mips, dwarf_w6_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w7, nullptr, dwarf_w7_mips, dwarf_w7_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w8, nullptr, dwarf_w8_mips, dwarf_w8_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w9, nullptr, dwarf_w9_mips, dwarf_w9_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w10, nullptr, dwarf_w10_mips, dwarf_w10_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w11, nullptr, dwarf_w11_mips, dwarf_w11_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w12, nullptr, dwarf_w12_mips, dwarf_w12_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w13, nullptr, dwarf_w13_mips, dwarf_w13_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w14, nullptr, dwarf_w14_mips, dwarf_w14_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w15, nullptr, dwarf_w15_mips, dwarf_w15_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w16, nullptr, dwarf_w16_mips, dwarf_w16_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w17, nullptr, dwarf_w17_mips, dwarf_w17_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w18, nullptr, dwarf_w18_mips, dwarf_w18_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w19, nullptr, dwarf_w19_mips, dwarf_w19_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w20, nullptr, dwarf_w10_mips, dwarf_w20_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w21, nullptr, dwarf_w21_mips, dwarf_w21_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w22, nullptr, dwarf_w22_mips, dwarf_w22_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w23, nullptr, dwarf_w23_mips, dwarf_w23_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w24, nullptr, dwarf_w24_mips, dwarf_w24_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w25, nullptr, dwarf_w25_mips, dwarf_w25_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w26, nullptr, dwarf_w26_mips, dwarf_w26_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w27, nullptr, dwarf_w27_mips, dwarf_w27_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w28, nullptr, dwarf_w28_mips, dwarf_w28_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w29, nullptr, dwarf_w29_mips, dwarf_w29_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w30, nullptr, dwarf_w30_mips, dwarf_w30_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w31, nullptr, dwarf_w31_mips, dwarf_w31_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO (mcsr, nullptr, dwarf_mcsr_mips, dwarf_mcsr_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO (mir, nullptr, dwarf_mir_mips, dwarf_mir_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO (fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO (fir, nullptr, dwarf_fir_mips, dwarf_fir_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO (config5, nullptr, dwarf_config5_mips, dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM)
static RegisterInfo g_register_infos_mips[] = {
DEFINE_GPR(zero, "zero", dwarf_zero_mips, dwarf_zero_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r1, "at", dwarf_r1_mips, dwarf_r1_mips, LLDB_INVALID_REGNUM),
DEFINE_GPR(r2, nullptr, dwarf_r2_mips, dwarf_r2_mips, LLDB_INVALID_REGNUM),
DEFINE_GPR(r3, nullptr, dwarf_r3_mips, dwarf_r3_mips, LLDB_INVALID_REGNUM),
DEFINE_GPR(r4, nullptr, dwarf_r4_mips, dwarf_r4_mips,
LLDB_REGNUM_GENERIC_ARG1),
DEFINE_GPR(r5, nullptr, dwarf_r5_mips, dwarf_r5_mips,
LLDB_REGNUM_GENERIC_ARG2),
DEFINE_GPR(r6, nullptr, dwarf_r6_mips, dwarf_r6_mips,
LLDB_REGNUM_GENERIC_ARG3),
DEFINE_GPR(r7, nullptr, dwarf_r7_mips, dwarf_r7_mips,
LLDB_REGNUM_GENERIC_ARG4),
DEFINE_GPR(r8, nullptr, dwarf_r8_mips, dwarf_r8_mips, LLDB_INVALID_REGNUM),
DEFINE_GPR(r9, nullptr, dwarf_r9_mips, dwarf_r9_mips, LLDB_INVALID_REGNUM),
DEFINE_GPR(r10, nullptr, dwarf_r10_mips, dwarf_r10_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r11, nullptr, dwarf_r11_mips, dwarf_r11_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r12, nullptr, dwarf_r12_mips, dwarf_r12_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r13, nullptr, dwarf_r13_mips, dwarf_r13_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r14, nullptr, dwarf_r14_mips, dwarf_r14_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r15, nullptr, dwarf_r15_mips, dwarf_r15_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r16, nullptr, dwarf_r16_mips, dwarf_r16_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r17, nullptr, dwarf_r17_mips, dwarf_r17_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r18, nullptr, dwarf_r18_mips, dwarf_r18_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r19, nullptr, dwarf_r19_mips, dwarf_r19_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r20, nullptr, dwarf_r20_mips, dwarf_r20_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r21, nullptr, dwarf_r21_mips, dwarf_r21_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r22, nullptr, dwarf_r22_mips, dwarf_r22_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r23, nullptr, dwarf_r23_mips, dwarf_r23_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r24, nullptr, dwarf_r24_mips, dwarf_r24_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r25, nullptr, dwarf_r25_mips, dwarf_r25_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r26, nullptr, dwarf_r26_mips, dwarf_r26_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r27, nullptr, dwarf_r27_mips, dwarf_r27_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(gp, "gp", dwarf_gp_mips, dwarf_gp_mips, LLDB_INVALID_REGNUM),
DEFINE_GPR(sp, "sp", dwarf_sp_mips, dwarf_sp_mips, LLDB_REGNUM_GENERIC_SP),
DEFINE_GPR(r30, "fp", dwarf_r30_mips, dwarf_r30_mips,
LLDB_REGNUM_GENERIC_FP),
DEFINE_GPR(ra, "ra", dwarf_ra_mips, dwarf_ra_mips, LLDB_REGNUM_GENERIC_RA),
DEFINE_GPR(sr, "status", dwarf_sr_mips, dwarf_sr_mips,
LLDB_REGNUM_GENERIC_FLAGS),
DEFINE_GPR(mullo, nullptr, dwarf_lo_mips, dwarf_lo_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(mulhi, nullptr, dwarf_hi_mips, dwarf_hi_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(badvaddr, nullptr, dwarf_bad_mips, dwarf_bad_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(cause, nullptr, dwarf_cause_mips, dwarf_cause_mips,
LLDB_INVALID_REGNUM),
DEFINE_GPR(pc, nullptr, dwarf_pc_mips, dwarf_pc_mips,
LLDB_REGNUM_GENERIC_PC),
DEFINE_GPR(config5, nullptr, dwarf_config5_mips, dwarf_config5_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f0, nullptr, dwarf_f0_mips, dwarf_f0_mips, LLDB_INVALID_REGNUM),
DEFINE_FPR(f1, nullptr, dwarf_f1_mips, dwarf_f1_mips, LLDB_INVALID_REGNUM),
DEFINE_FPR(f2, nullptr, dwarf_f2_mips, dwarf_f2_mips, LLDB_INVALID_REGNUM),
DEFINE_FPR(f3, nullptr, dwarf_f3_mips, dwarf_f3_mips, LLDB_INVALID_REGNUM),
DEFINE_FPR(f4, nullptr, dwarf_f4_mips, dwarf_f4_mips, LLDB_INVALID_REGNUM),
DEFINE_FPR(f5, nullptr, dwarf_f5_mips, dwarf_f5_mips, LLDB_INVALID_REGNUM),
DEFINE_FPR(f6, nullptr, dwarf_f6_mips, dwarf_f6_mips, LLDB_INVALID_REGNUM),
DEFINE_FPR(f7, nullptr, dwarf_f7_mips, dwarf_f7_mips, LLDB_INVALID_REGNUM),
DEFINE_FPR(f8, nullptr, dwarf_f8_mips, dwarf_f8_mips, LLDB_INVALID_REGNUM),
DEFINE_FPR(f9, nullptr, dwarf_f9_mips, dwarf_f9_mips, LLDB_INVALID_REGNUM),
DEFINE_FPR(f10, nullptr, dwarf_f10_mips, dwarf_f10_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f11, nullptr, dwarf_f11_mips, dwarf_f11_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f12, nullptr, dwarf_f12_mips, dwarf_f12_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f13, nullptr, dwarf_f13_mips, dwarf_f13_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f14, nullptr, dwarf_f14_mips, dwarf_f14_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f15, nullptr, dwarf_f15_mips, dwarf_f15_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f16, nullptr, dwarf_f16_mips, dwarf_f16_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f17, nullptr, dwarf_f17_mips, dwarf_f17_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f18, nullptr, dwarf_f18_mips, dwarf_f18_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f19, nullptr, dwarf_f19_mips, dwarf_f19_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f20, nullptr, dwarf_f20_mips, dwarf_f20_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f21, nullptr, dwarf_f21_mips, dwarf_f21_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f22, nullptr, dwarf_f22_mips, dwarf_f22_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f23, nullptr, dwarf_f23_mips, dwarf_f23_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f24, nullptr, dwarf_f24_mips, dwarf_f24_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f25, nullptr, dwarf_f25_mips, dwarf_f25_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f26, nullptr, dwarf_f26_mips, dwarf_f26_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f27, nullptr, dwarf_f27_mips, dwarf_f27_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f28, nullptr, dwarf_f28_mips, dwarf_f28_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f29, nullptr, dwarf_f29_mips, dwarf_f29_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f30, nullptr, dwarf_f30_mips, dwarf_f30_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f31, nullptr, dwarf_f31_mips, dwarf_f31_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR_INFO(fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR_INFO(fir, nullptr, dwarf_fir_mips, dwarf_fir_mips,
LLDB_INVALID_REGNUM),
DEFINE_FPR_INFO(config5, nullptr, dwarf_config5_mips, dwarf_config5_mips,
LLDB_INVALID_REGNUM),
DEFINE_MSA(w0, nullptr, dwarf_w0_mips, dwarf_w0_mips, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM),
DEFINE_MSA(w1, nullptr, dwarf_w1_mips, dwarf_w1_mips, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM),
DEFINE_MSA(w2, nullptr, dwarf_w2_mips, dwarf_w2_mips, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM),
DEFINE_MSA(w3, nullptr, dwarf_w3_mips, dwarf_w3_mips, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM),
DEFINE_MSA(w4, nullptr, dwarf_w4_mips, dwarf_w4_mips, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM),
DEFINE_MSA(w5, nullptr, dwarf_w5_mips, dwarf_w5_mips, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM),
DEFINE_MSA(w6, nullptr, dwarf_w6_mips, dwarf_w6_mips, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM),
DEFINE_MSA(w7, nullptr, dwarf_w7_mips, dwarf_w7_mips, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM),
DEFINE_MSA(w8, nullptr, dwarf_w8_mips, dwarf_w8_mips, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM),
DEFINE_MSA(w9, nullptr, dwarf_w9_mips, dwarf_w9_mips, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM),
DEFINE_MSA(w10, nullptr, dwarf_w10_mips, dwarf_w10_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w11, nullptr, dwarf_w11_mips, dwarf_w11_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w12, nullptr, dwarf_w12_mips, dwarf_w12_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w13, nullptr, dwarf_w13_mips, dwarf_w13_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w14, nullptr, dwarf_w14_mips, dwarf_w14_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w15, nullptr, dwarf_w15_mips, dwarf_w15_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w16, nullptr, dwarf_w16_mips, dwarf_w16_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w17, nullptr, dwarf_w17_mips, dwarf_w17_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w18, nullptr, dwarf_w18_mips, dwarf_w18_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w19, nullptr, dwarf_w19_mips, dwarf_w19_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w20, nullptr, dwarf_w10_mips, dwarf_w20_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w21, nullptr, dwarf_w21_mips, dwarf_w21_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w22, nullptr, dwarf_w22_mips, dwarf_w22_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w23, nullptr, dwarf_w23_mips, dwarf_w23_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w24, nullptr, dwarf_w24_mips, dwarf_w24_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w25, nullptr, dwarf_w25_mips, dwarf_w25_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w26, nullptr, dwarf_w26_mips, dwarf_w26_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w27, nullptr, dwarf_w27_mips, dwarf_w27_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w28, nullptr, dwarf_w28_mips, dwarf_w28_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w29, nullptr, dwarf_w29_mips, dwarf_w29_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w30, nullptr, dwarf_w30_mips, dwarf_w30_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w31, nullptr, dwarf_w31_mips, dwarf_w31_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO(mcsr, nullptr, dwarf_mcsr_mips, dwarf_mcsr_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO(mir, nullptr, dwarf_mir_mips, dwarf_mir_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO(fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO(fir, nullptr, dwarf_fir_mips, dwarf_fir_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO(config5, nullptr, dwarf_config5_mips, dwarf_config5_mips,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM)
};
static_assert((sizeof(g_register_infos_mips) / sizeof(g_register_infos_mips[0])) == k_num_registers_mips,

View File

@ -43,18 +43,28 @@
// Note that the size and offset will be updated by platform-specific classes.
#ifdef LINUX_MIPS64
#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((GPR_linux_mips*)0)->reg), GPR_OFFSET(reg), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL, NULL, 0}
#define DEFINE_GPR(reg, alt, kind1, kind2, kind3) \
{ \
#reg, alt, sizeof(((GPR_linux_mips *) 0)->reg), \
GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, ptrace_##reg##_mips, \
gpr_##reg##_mips64 }, \
NULL, NULL, NULL, 0 \
}
#else
#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((GPR_freebsd_mips*)0)->reg), GPR_OFFSET(reg), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL, NULL, 0}
#endif
#define DEFINE_GPR_INFO(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((GPR_linux_mips*)0)->reg) / 2, GPR_OFFSET(reg), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL, NULL, 0}
#define DEFINE_GPR_INFO(reg, alt, kind1, kind2, kind3) \
{ \
#reg, alt, sizeof(((GPR_linux_mips *) 0)->reg) / 2, \
GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, ptrace_##reg##_mips, \
gpr_##reg##_mips64 }, \
NULL, NULL, NULL, 0 \
}
const uint8_t dwarf_opcode_mips64 [] = {
llvm::dwarf::DW_OP_regx, dwarf_sr_mips64, llvm::dwarf::DW_OP_lit1,
@ -62,14 +72,25 @@ const uint8_t dwarf_opcode_mips64 [] = {
llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shr
};
#define DEFINE_FPR(reg, alt, kind1, kind2, kind3) \
{ \
#reg, alt, sizeof(((FPR_linux_mips *) 0)->reg), \
FPR_OFFSET(reg), eEncodingIEEE754, eFormatFloat, \
{kind1, kind2, kind3, ptrace_##reg##_mips, \
fpr_##reg##_mips64 }, \
NULL, NULL, dwarf_opcode_mips64, \
sizeof(dwarf_opcode_mips64) \
}
#define DEFINE_FPR(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((FPR_linux_mips*)0)->reg), FPR_OFFSET(reg), eEncodingIEEE754, \
eFormatFloat, { kind1, kind2, kind3, kind4, fpr_##reg##_mips64 }, NULL, NULL, dwarf_opcode_mips64, sizeof(dwarf_opcode_mips64)}
#define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3) \
{ \
#reg, alt, sizeof(((FPR_linux_mips *) 0)->reg), \
FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, ptrace_##reg##_mips, \
fpr_##reg##_mips64 }, \
NULL, NULL, NULL, 0 \
}
#define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((FPR_linux_mips*)0)->reg), FPR_OFFSET(reg), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips64 }, NULL, NULL, NULL, 0}
#define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingVector, \
@ -125,117 +146,229 @@ g_register_infos_mips64[] =
DEFINE_GPR(ic, nullptr, dwarf_ic_mips64, dwarf_ic_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(dummy, nullptr, dwarf_dummy_mips64, dwarf_dummy_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
#else
DEFINE_GPR(zero, "r0", dwarf_zero_mips64, dwarf_zero_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r1, nullptr, dwarf_r1_mips64, dwarf_r1_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r2, nullptr, dwarf_r2_mips64, dwarf_r2_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r3, nullptr, dwarf_r3_mips64, dwarf_r3_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r4, nullptr, dwarf_r4_mips64, dwarf_r4_mips64, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM),
DEFINE_GPR(r5, nullptr, dwarf_r5_mips64, dwarf_r5_mips64, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM),
DEFINE_GPR(r6, nullptr, dwarf_r6_mips64, dwarf_r6_mips64, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM),
DEFINE_GPR(r7, nullptr, dwarf_r7_mips64, dwarf_r7_mips64, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM),
DEFINE_GPR(r8, nullptr, dwarf_r8_mips64, dwarf_r8_mips64, LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM),
DEFINE_GPR(r9, nullptr, dwarf_r9_mips64, dwarf_r9_mips64, LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM),
DEFINE_GPR(r10, nullptr, dwarf_r10_mips64, dwarf_r10_mips64, LLDB_REGNUM_GENERIC_ARG7, LLDB_INVALID_REGNUM),
DEFINE_GPR(r11, nullptr, dwarf_r11_mips64, dwarf_r11_mips64, LLDB_REGNUM_GENERIC_ARG8, LLDB_INVALID_REGNUM),
DEFINE_GPR(r12, nullptr, dwarf_r12_mips64, dwarf_r12_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r13, nullptr, dwarf_r13_mips64, dwarf_r13_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r14, nullptr, dwarf_r14_mips64, dwarf_r14_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r15, nullptr, dwarf_r15_mips64, dwarf_r15_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r16, nullptr, dwarf_r16_mips64, dwarf_r16_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r17, nullptr, dwarf_r17_mips64, dwarf_r17_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r18, nullptr, dwarf_r18_mips64, dwarf_r18_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r19, nullptr, dwarf_r19_mips64, dwarf_r19_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r20, nullptr, dwarf_r20_mips64, dwarf_r20_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r21, nullptr, dwarf_r21_mips64, dwarf_r21_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r22, nullptr, dwarf_r22_mips64, dwarf_r22_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r23, nullptr, dwarf_r23_mips64, dwarf_r23_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r24, nullptr, dwarf_r24_mips64, dwarf_r24_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r25, nullptr, dwarf_r25_mips64, dwarf_r25_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r26, nullptr, dwarf_r26_mips64, dwarf_r26_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(r27, nullptr, dwarf_r27_mips64, dwarf_r27_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(gp, "r28", dwarf_gp_mips64, dwarf_gp_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(sp, "r29", dwarf_sp_mips64, dwarf_sp_mips64, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM),
DEFINE_GPR(r30, nullptr, dwarf_r30_mips64, dwarf_r30_mips64, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM),
DEFINE_GPR(ra, "r31", dwarf_ra_mips64, dwarf_ra_mips64, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM),
DEFINE_GPR_INFO(sr, nullptr, dwarf_sr_mips64, dwarf_sr_mips64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
DEFINE_GPR(mullo, nullptr, dwarf_lo_mips64, dwarf_lo_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(mulhi, nullptr, dwarf_hi_mips64, dwarf_hi_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(badvaddr, nullptr, dwarf_bad_mips64, dwarf_bad_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR_INFO(cause, nullptr, dwarf_cause_mips64, dwarf_cause_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(pc, "pc", dwarf_pc_mips64, dwarf_pc_mips64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
DEFINE_GPR_INFO(config5, nullptr, dwarf_config5_mips64, dwarf_config5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f0, nullptr, dwarf_f0_mips64, dwarf_f0_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f1, nullptr, dwarf_f1_mips64, dwarf_f1_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f2, nullptr, dwarf_f2_mips64, dwarf_f2_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f3, nullptr, dwarf_f3_mips64, dwarf_f3_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f4, nullptr, dwarf_f4_mips64, dwarf_f4_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f5, nullptr, dwarf_f5_mips64, dwarf_f5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f6, nullptr, dwarf_f6_mips64, dwarf_f6_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f7, nullptr, dwarf_f7_mips64, dwarf_f7_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f8, nullptr, dwarf_f8_mips64, dwarf_f8_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f9, nullptr, dwarf_f9_mips64, dwarf_f9_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f10, nullptr, dwarf_f10_mips64, dwarf_f10_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f11, nullptr, dwarf_f11_mips64, dwarf_f11_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f12, nullptr, dwarf_f12_mips64, dwarf_f12_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f13, nullptr, dwarf_f13_mips64, dwarf_f13_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f14, nullptr, dwarf_f14_mips64, dwarf_f14_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f15, nullptr, dwarf_f15_mips64, dwarf_f15_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f16, nullptr, dwarf_f16_mips64, dwarf_f16_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f17, nullptr, dwarf_f17_mips64, dwarf_f17_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f18, nullptr, dwarf_f18_mips64, dwarf_f18_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f19, nullptr, dwarf_f19_mips64, dwarf_f19_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f20, nullptr, dwarf_f20_mips64, dwarf_f20_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f21, nullptr, dwarf_f21_mips64, dwarf_f21_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f22, nullptr, dwarf_f22_mips64, dwarf_f22_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f23, nullptr, dwarf_f23_mips64, dwarf_f23_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f24, nullptr, dwarf_f24_mips64, dwarf_f24_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f25, nullptr, dwarf_f25_mips64, dwarf_f25_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f26, nullptr, dwarf_f26_mips64, dwarf_f26_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f27, nullptr, dwarf_f27_mips64, dwarf_f27_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f28, nullptr, dwarf_f28_mips64, dwarf_f28_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f29, nullptr, dwarf_f29_mips64, dwarf_f29_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f30, nullptr, dwarf_f30_mips64, dwarf_f30_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f31, nullptr, dwarf_f31_mips64, dwarf_f31_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR_INFO (fcsr, nullptr, dwarf_fcsr_mips64, dwarf_fcsr_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR_INFO (fir, nullptr, dwarf_fir_mips64, dwarf_fir_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR_INFO (config5, nullptr, dwarf_config5_mips64, dwarf_config5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w0, nullptr, dwarf_w0_mips64, dwarf_w0_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w1, nullptr, dwarf_w1_mips64, dwarf_w1_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w2, nullptr, dwarf_w2_mips64, dwarf_w2_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w3, nullptr, dwarf_w3_mips64, dwarf_w3_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w4, nullptr, dwarf_w4_mips64, dwarf_w4_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w5, nullptr, dwarf_w5_mips64, dwarf_w5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w6, nullptr, dwarf_w6_mips64, dwarf_w6_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w7, nullptr, dwarf_w7_mips64, dwarf_w7_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w8, nullptr, dwarf_w8_mips64, dwarf_w8_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w9, nullptr, dwarf_w9_mips64, dwarf_w9_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w10, nullptr, dwarf_w10_mips64, dwarf_w10_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w11, nullptr, dwarf_w11_mips64, dwarf_w11_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w12, nullptr, dwarf_w12_mips64, dwarf_w12_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w13, nullptr, dwarf_w13_mips64, dwarf_w13_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w14, nullptr, dwarf_w14_mips64, dwarf_w14_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w15, nullptr, dwarf_w15_mips64, dwarf_w15_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w16, nullptr, dwarf_w16_mips64, dwarf_w16_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w17, nullptr, dwarf_w17_mips64, dwarf_w17_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w18, nullptr, dwarf_w18_mips64, dwarf_w18_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w19, nullptr, dwarf_w19_mips64, dwarf_w19_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w20, nullptr, dwarf_w10_mips64, dwarf_w20_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w21, nullptr, dwarf_w21_mips64, dwarf_w21_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w22, nullptr, dwarf_w22_mips64, dwarf_w22_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w23, nullptr, dwarf_w23_mips64, dwarf_w23_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w24, nullptr, dwarf_w24_mips64, dwarf_w24_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w25, nullptr, dwarf_w25_mips64, dwarf_w25_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w26, nullptr, dwarf_w26_mips64, dwarf_w26_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w27, nullptr, dwarf_w27_mips64, dwarf_w27_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w28, nullptr, dwarf_w28_mips64, dwarf_w28_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w29, nullptr, dwarf_w29_mips64, dwarf_w29_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w30, nullptr, dwarf_w30_mips64, dwarf_w30_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA (w31, nullptr, dwarf_w31_mips64, dwarf_w31_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO (mcsr, nullptr, dwarf_mcsr_mips64, dwarf_mcsr_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO (mir, nullptr, dwarf_mir_mips64, dwarf_mir_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO (fcsr, nullptr, dwarf_fcsr_mips64, dwarf_fcsr_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO (fir, nullptr, dwarf_fir_mips64, dwarf_fir_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO (config5, nullptr, dwarf_config5_mips64, dwarf_config5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM)
DEFINE_GPR(zero, "r0", dwarf_zero_mips64, dwarf_zero_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r1, nullptr, dwarf_r1_mips64, dwarf_r1_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r2, nullptr, dwarf_r2_mips64, dwarf_r2_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r3, nullptr, dwarf_r3_mips64, dwarf_r3_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r4, nullptr, dwarf_r4_mips64, dwarf_r4_mips64,
LLDB_REGNUM_GENERIC_ARG1),
DEFINE_GPR(r5, nullptr, dwarf_r5_mips64, dwarf_r5_mips64,
LLDB_REGNUM_GENERIC_ARG2),
DEFINE_GPR(r6, nullptr, dwarf_r6_mips64, dwarf_r6_mips64,
LLDB_REGNUM_GENERIC_ARG3),
DEFINE_GPR(r7, nullptr, dwarf_r7_mips64, dwarf_r7_mips64,
LLDB_REGNUM_GENERIC_ARG4),
DEFINE_GPR(r8, nullptr, dwarf_r8_mips64, dwarf_r8_mips64,
LLDB_REGNUM_GENERIC_ARG5),
DEFINE_GPR(r9, nullptr, dwarf_r9_mips64, dwarf_r9_mips64,
LLDB_REGNUM_GENERIC_ARG6),
DEFINE_GPR(r10, nullptr, dwarf_r10_mips64, dwarf_r10_mips64,
LLDB_REGNUM_GENERIC_ARG7),
DEFINE_GPR(r11, nullptr, dwarf_r11_mips64, dwarf_r11_mips64,
LLDB_REGNUM_GENERIC_ARG8),
DEFINE_GPR(r12, nullptr, dwarf_r12_mips64, dwarf_r12_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r13, nullptr, dwarf_r13_mips64, dwarf_r13_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r14, nullptr, dwarf_r14_mips64, dwarf_r14_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r15, nullptr, dwarf_r15_mips64, dwarf_r15_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r16, nullptr, dwarf_r16_mips64, dwarf_r16_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r17, nullptr, dwarf_r17_mips64, dwarf_r17_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r18, nullptr, dwarf_r18_mips64, dwarf_r18_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r19, nullptr, dwarf_r19_mips64, dwarf_r19_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r20, nullptr, dwarf_r20_mips64, dwarf_r20_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r21, nullptr, dwarf_r21_mips64, dwarf_r21_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r22, nullptr, dwarf_r22_mips64, dwarf_r22_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r23, nullptr, dwarf_r23_mips64, dwarf_r23_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r24, nullptr, dwarf_r24_mips64, dwarf_r24_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r25, nullptr, dwarf_r25_mips64, dwarf_r25_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r26, nullptr, dwarf_r26_mips64, dwarf_r26_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(r27, nullptr, dwarf_r27_mips64, dwarf_r27_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(gp, "r28", dwarf_gp_mips64, dwarf_gp_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(sp, "r29", dwarf_sp_mips64, dwarf_sp_mips64,
LLDB_REGNUM_GENERIC_SP),
DEFINE_GPR(r30, nullptr, dwarf_r30_mips64, dwarf_r30_mips64,
LLDB_REGNUM_GENERIC_FP),
DEFINE_GPR(ra, "r31", dwarf_ra_mips64, dwarf_ra_mips64,
LLDB_REGNUM_GENERIC_RA),
DEFINE_GPR_INFO(sr, nullptr, dwarf_sr_mips64, dwarf_sr_mips64,
LLDB_REGNUM_GENERIC_FLAGS),
DEFINE_GPR(mullo, nullptr, dwarf_lo_mips64, dwarf_lo_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(mulhi, nullptr, dwarf_hi_mips64, dwarf_hi_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(badvaddr, nullptr, dwarf_bad_mips64, dwarf_bad_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR_INFO(cause, nullptr, dwarf_cause_mips64, dwarf_cause_mips64,
LLDB_INVALID_REGNUM),
DEFINE_GPR(pc, "pc", dwarf_pc_mips64, dwarf_pc_mips64,
LLDB_REGNUM_GENERIC_PC),
DEFINE_GPR_INFO(config5, nullptr, dwarf_config5_mips64,
dwarf_config5_mips64, LLDB_INVALID_REGNUM),
DEFINE_FPR(f0, nullptr, dwarf_f0_mips64, dwarf_f0_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f1, nullptr, dwarf_f1_mips64, dwarf_f1_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f2, nullptr, dwarf_f2_mips64, dwarf_f2_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f3, nullptr, dwarf_f3_mips64, dwarf_f3_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f4, nullptr, dwarf_f4_mips64, dwarf_f4_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f5, nullptr, dwarf_f5_mips64, dwarf_f5_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f6, nullptr, dwarf_f6_mips64, dwarf_f6_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f7, nullptr, dwarf_f7_mips64, dwarf_f7_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f8, nullptr, dwarf_f8_mips64, dwarf_f8_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f9, nullptr, dwarf_f9_mips64, dwarf_f9_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f10, nullptr, dwarf_f10_mips64, dwarf_f10_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f11, nullptr, dwarf_f11_mips64, dwarf_f11_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f12, nullptr, dwarf_f12_mips64, dwarf_f12_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f13, nullptr, dwarf_f13_mips64, dwarf_f13_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f14, nullptr, dwarf_f14_mips64, dwarf_f14_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f15, nullptr, dwarf_f15_mips64, dwarf_f15_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f16, nullptr, dwarf_f16_mips64, dwarf_f16_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f17, nullptr, dwarf_f17_mips64, dwarf_f17_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f18, nullptr, dwarf_f18_mips64, dwarf_f18_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f19, nullptr, dwarf_f19_mips64, dwarf_f19_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f20, nullptr, dwarf_f20_mips64, dwarf_f20_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f21, nullptr, dwarf_f21_mips64, dwarf_f21_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f22, nullptr, dwarf_f22_mips64, dwarf_f22_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f23, nullptr, dwarf_f23_mips64, dwarf_f23_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f24, nullptr, dwarf_f24_mips64, dwarf_f24_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f25, nullptr, dwarf_f25_mips64, dwarf_f25_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f26, nullptr, dwarf_f26_mips64, dwarf_f26_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f27, nullptr, dwarf_f27_mips64, dwarf_f27_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f28, nullptr, dwarf_f28_mips64, dwarf_f28_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f29, nullptr, dwarf_f29_mips64, dwarf_f29_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f30, nullptr, dwarf_f30_mips64, dwarf_f30_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR(f31, nullptr, dwarf_f31_mips64, dwarf_f31_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR_INFO(fcsr, nullptr, dwarf_fcsr_mips64, dwarf_fcsr_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR_INFO(fir, nullptr, dwarf_fir_mips64, dwarf_fir_mips64,
LLDB_INVALID_REGNUM),
DEFINE_FPR_INFO(config5, nullptr, dwarf_config5_mips64,
dwarf_config5_mips64, LLDB_INVALID_REGNUM),
DEFINE_MSA(w0, nullptr, dwarf_w0_mips64, dwarf_w0_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w1, nullptr, dwarf_w1_mips64, dwarf_w1_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w2, nullptr, dwarf_w2_mips64, dwarf_w2_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w3, nullptr, dwarf_w3_mips64, dwarf_w3_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w4, nullptr, dwarf_w4_mips64, dwarf_w4_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w5, nullptr, dwarf_w5_mips64, dwarf_w5_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w6, nullptr, dwarf_w6_mips64, dwarf_w6_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w7, nullptr, dwarf_w7_mips64, dwarf_w7_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w8, nullptr, dwarf_w8_mips64, dwarf_w8_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w9, nullptr, dwarf_w9_mips64, dwarf_w9_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w10, nullptr, dwarf_w10_mips64, dwarf_w10_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w11, nullptr, dwarf_w11_mips64, dwarf_w11_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w12, nullptr, dwarf_w12_mips64, dwarf_w12_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w13, nullptr, dwarf_w13_mips64, dwarf_w13_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w14, nullptr, dwarf_w14_mips64, dwarf_w14_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w15, nullptr, dwarf_w15_mips64, dwarf_w15_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w16, nullptr, dwarf_w16_mips64, dwarf_w16_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w17, nullptr, dwarf_w17_mips64, dwarf_w17_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w18, nullptr, dwarf_w18_mips64, dwarf_w18_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w19, nullptr, dwarf_w19_mips64, dwarf_w19_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w20, nullptr, dwarf_w10_mips64, dwarf_w20_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w21, nullptr, dwarf_w21_mips64, dwarf_w21_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w22, nullptr, dwarf_w22_mips64, dwarf_w22_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w23, nullptr, dwarf_w23_mips64, dwarf_w23_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w24, nullptr, dwarf_w24_mips64, dwarf_w24_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w25, nullptr, dwarf_w25_mips64, dwarf_w25_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w26, nullptr, dwarf_w26_mips64, dwarf_w26_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w27, nullptr, dwarf_w27_mips64, dwarf_w27_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w28, nullptr, dwarf_w28_mips64, dwarf_w28_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w29, nullptr, dwarf_w29_mips64, dwarf_w29_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w30, nullptr, dwarf_w30_mips64, dwarf_w30_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA(w31, nullptr, dwarf_w31_mips64, dwarf_w31_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO(mcsr, nullptr, dwarf_mcsr_mips64, dwarf_mcsr_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO(mir, nullptr, dwarf_mir_mips64, dwarf_mir_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO(fcsr, nullptr, dwarf_fcsr_mips64, dwarf_fcsr_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO(fir, nullptr, dwarf_fir_mips64, dwarf_fir_mips64,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_MSA_INFO(config5, nullptr, dwarf_config5_mips64,
dwarf_config5_mips64, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM)
#endif
};

View File

@ -280,6 +280,84 @@ namespace lldb_private
k_num_msa_registers_mips64 = k_last_msa_mips64 - k_first_msa_mips64 + 1,
k_num_user_registers_mips64 = k_num_gpr_registers_mips64 + k_num_fpr_registers_mips64 + k_num_msa_registers_mips64
};
// Register no. for RegisterKind = eRegisterKindProcessPlugin
// The ptrace request PTRACE_PEEKUSER/PTRACE_POKEUSER used this number
enum {
ptrace_zero_mips,
ptrace_r1_mips,
ptrace_r2_mips,
ptrace_r3_mips,
ptrace_r4_mips,
ptrace_r5_mips,
ptrace_r6_mips,
ptrace_r7_mips,
ptrace_r8_mips,
ptrace_r9_mips,
ptrace_r10_mips,
ptrace_r11_mips,
ptrace_r12_mips,
ptrace_r13_mips,
ptrace_r14_mips,
ptrace_r15_mips,
ptrace_r16_mips,
ptrace_r17_mips,
ptrace_r18_mips,
ptrace_r19_mips,
ptrace_r20_mips,
ptrace_r21_mips,
ptrace_r22_mips,
ptrace_r23_mips,
ptrace_r24_mips,
ptrace_r25_mips,
ptrace_r26_mips,
ptrace_r27_mips,
ptrace_gp_mips,
ptrace_sp_mips,
ptrace_r30_mips,
ptrace_ra_mips,
ptrace_f0_mips,
ptrace_f1_mips,
ptrace_f2_mips,
ptrace_f3_mips,
ptrace_f4_mips,
ptrace_f5_mips,
ptrace_f6_mips,
ptrace_f7_mips,
ptrace_f8_mips,
ptrace_f9_mips,
ptrace_f10_mips,
ptrace_f11_mips,
ptrace_f12_mips,
ptrace_f13_mips,
ptrace_f14_mips,
ptrace_f15_mips,
ptrace_f16_mips,
ptrace_f17_mips,
ptrace_f18_mips,
ptrace_f19_mips,
ptrace_f20_mips,
ptrace_f21_mips,
ptrace_f22_mips,
ptrace_f23_mips,
ptrace_f24_mips,
ptrace_f25_mips,
ptrace_f26_mips,
ptrace_f27_mips,
ptrace_f28_mips,
ptrace_f29_mips,
ptrace_f30_mips,
ptrace_f31_mips,
ptrace_pc_mips,
ptrace_cause_mips,
ptrace_badvaddr_mips,
ptrace_mulhi_mips,
ptrace_mullo_mips,
ptrace_fcsr_mips,
ptrace_fir_mips,
ptrace_sr_mips,
ptrace_config5_mips
};
}
#endif // #ifndef lldb_mips_linux_register_enums_h

View File

@ -2856,6 +2856,7 @@ GDBRemoteCommunicationClient::GetCurrentProcessInfo (bool allow_lazy)
std::string os_name;
std::string vendor_name;
std::string triple;
std::string elf_abi;
uint32_t pointer_byte_size = 0;
StringExtractor extractor;
ByteOrder byte_order = eByteOrderInvalid;
@ -2917,6 +2918,11 @@ GDBRemoteCommunicationClient::GetCurrentProcessInfo (bool allow_lazy)
if (pid != LLDB_INVALID_PROCESS_ID)
++num_keys_decoded;
}
else if (name.compare("elf_abi") == 0)
{
elf_abi = value;
++num_keys_decoded;
}
}
if (num_keys_decoded > 0)
m_qProcessInfo_is_valid = eLazyBoolYes;
@ -2930,6 +2936,7 @@ GDBRemoteCommunicationClient::GetCurrentProcessInfo (bool allow_lazy)
if (!triple.empty ())
{
m_process_arch.SetTriple (triple.c_str ());
m_process_arch.SetFlags(elf_abi);
if (pointer_byte_size)
{
assert (pointer_byte_size == m_process_arch.GetAddressByteSize());

View File

@ -1235,12 +1235,12 @@ GDBRemoteCommunicationServerCommon::CreateProcessInfoResponse_DebugServerStyle (
break;
}
if (proc_triple.isArch64Bit ())
response.PutCString ("ptrsize:8;");
else if (proc_triple.isArch32Bit ())
response.PutCString ("ptrsize:4;");
else if (proc_triple.isArch16Bit ())
response.PutCString ("ptrsize:2;");
// In case of MIPS64, pointer size is depend on ELF ABI
// For N32 the pointer size is 4 and for N64 it is 8
std::string abi = proc_arch.GetTargetABI();
if (!abi.empty())
response.Printf("elf_abi:%s;", abi.c_str());
response.Printf("ptrsize:%d;", proc_arch.GetAddressByteSize());
}
}

View File

@ -29,7 +29,7 @@
..
lib
clang
3.9.0
3.9.1
lib
freebsd
..

View File

@ -19,7 +19,7 @@
aout
..
clang
3.9.0
3.9.1
include
sanitizer
..

View File

@ -1,3 +1,3 @@
/* $FreeBSD$ */
#define FREEBSD_CC_VERSION 1200004
#define FREEBSD_CC_VERSION 1200005

View File

@ -4,7 +4,7 @@
.PATH: ${CLANG_SRCS}/lib/Headers
INCSDIR= ${LIBDIR}/clang/3.9.0/include
INCSDIR= ${LIBDIR}/clang/3.9.1/include
GENINCS+= arm_neon.h
@ -54,6 +54,7 @@ INCS+= mm3dnow.h
INCS+= mm_malloc.h
INCS+= mmintrin.h
INCS+= module.modulemap
INCS+= msa.h
INCS+= mwaitxintrin.h
INCS+= nmmintrin.h
INCS+= opencl-c.h

View File

@ -1,10 +1,10 @@
/* $FreeBSD$ */
#define CLANG_VERSION 3.9.0
#define CLANG_VERSION 3.9.1
#define CLANG_VERSION_MAJOR 3
#define CLANG_VERSION_MINOR 9
#define CLANG_VERSION_PATCHLEVEL 0
#define CLANG_VERSION_PATCHLEVEL 1
#define CLANG_VENDOR "FreeBSD "
#define SVN_REVISION "280324"
#define SVN_REVISION "289601"

View File

@ -34,7 +34,7 @@
/* #undef CLANG_HAVE_LIBXML */
/* The LLVM product name and version */
#define BACKEND_PACKAGE_STRING "LLVM 3.9.0"
#define BACKEND_PACKAGE_STRING "LLVM 3.9.1"
/* Linker version detected at compile time. */
/* #undef HOST_LINK_VERSION */

View File

@ -508,10 +508,10 @@
#define LLVM_VERSION_MINOR 9
/* Patch version of the LLVM API */
#define LLVM_VERSION_PATCH 0
#define LLVM_VERSION_PATCH 1
/* LLVM version string */
#define LLVM_VERSION_STRING "3.9.0"
#define LLVM_VERSION_STRING "3.9.1"
/* LLVM version information */
/* #undef LLVM_VERSION_INFO */
@ -546,13 +546,13 @@
#define PACKAGE_NAME "LLVM"
/* Define to the full name and version of this package. */
#define PACKAGE_STRING "LLVM 3.9.0"
#define PACKAGE_STRING "LLVM 3.9.1"
/* Define to the one symbol short name of this package. */
#undef PACKAGE_TARNAME
/* Define to the version of this package. */
#define PACKAGE_VERSION "3.9.0"
#define PACKAGE_VERSION "3.9.1"
/* Define to the vendor of this package. */
/* #undef PACKAGE_VENDOR */

View File

@ -98,10 +98,10 @@
#define LLVM_VERSION_MINOR 9
/* Patch version of the LLVM API */
#define LLVM_VERSION_PATCH 0
#define LLVM_VERSION_PATCH 1
/* LLVM version string */
#define LLVM_VERSION_STRING "3.9.0"
#define LLVM_VERSION_STRING "3.9.1"
/* Define if we link Polly to the tools */
/* #undef LINK_POLLY_INTO_TOOLS */

View File

@ -7,7 +7,7 @@ CRTSRC= ${SRCTOP}/contrib/compiler-rt
.PATH: ${CRTSRC}/lib
CLANGDIR= /usr/lib/clang/3.9.0
CLANGDIR= /usr/lib/clang/3.9.1
LIBDIR= ${CLANGDIR}/lib/freebsd
NO_PIC=

View File

@ -12,6 +12,10 @@ CFLAGS+= -fvisibility=hidden
CFLAGS+= -DVISIBILITY_HIDDEN
CFLAGS+= -I${SRCTOP}/contrib/libcxxrt
.if ${COMPILER_TYPE} == "clang"
CWARNFLAGS.gcc_personality_v0.c+= -Wno-typedef-redefinition
.endif
.include "Makefile.inc"
.if ${MK_INSTALLLIB} != "no"

View File

@ -1160,114 +1160,115 @@ OLD_FILES+=usr/bin/clang++
OLD_FILES+=usr/bin/clang-cpp
OLD_FILES+=usr/bin/clang-tblgen
OLD_FILES+=usr/bin/llvm-tblgen
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/allocator_interface.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/asan_interface.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/common_interface_defs.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/coverage_interface.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/dfsan_interface.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/esan_interface.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/linux_syscall_hooks.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/lsan_interface.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/msan_interface.h
OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/tsan_interface_atomic.h
OLD_DIRS+=usr/lib/clang/3.9.0/include/sanitizer
OLD_FILES+=usr/lib/clang/3.9.0/include/__clang_cuda_cmath.h
OLD_FILES+=usr/lib/clang/3.9.0/include/__clang_cuda_intrinsics.h
OLD_FILES+=usr/lib/clang/3.9.0/include/__clang_cuda_math_forward_declares.h
OLD_FILES+=usr/lib/clang/3.9.0/include/__clang_cuda_runtime_wrapper.h
OLD_FILES+=usr/lib/clang/3.9.0/include/__stddef_max_align_t.h
OLD_FILES+=usr/lib/clang/3.9.0/include/__wmmintrin_aes.h
OLD_FILES+=usr/lib/clang/3.9.0/include/__wmmintrin_pclmul.h
OLD_FILES+=usr/lib/clang/3.9.0/include/adxintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/altivec.h
OLD_FILES+=usr/lib/clang/3.9.0/include/ammintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/arm_acle.h
OLD_FILES+=usr/lib/clang/3.9.0/include/arm_neon.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx2intrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512bwintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512cdintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512dqintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512erintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512fintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512ifmaintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512ifmavlintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512pfintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vbmiintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vbmivlintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vlbwintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vlcdintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vldqintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vlintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/avxintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/bmi2intrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/bmiintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/clflushoptintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/cpuid.h
OLD_FILES+=usr/lib/clang/3.9.0/include/cuda_builtin_vars.h
OLD_FILES+=usr/lib/clang/3.9.0/include/emmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/f16cintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/fma4intrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/fmaintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/fxsrintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/htmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/htmxlintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/ia32intrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/immintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/lzcntintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/mm3dnow.h
OLD_FILES+=usr/lib/clang/3.9.0/include/mm_malloc.h
OLD_FILES+=usr/lib/clang/3.9.0/include/mmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/module.modulemap
OLD_FILES+=usr/lib/clang/3.9.0/include/mwaitxintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/nmmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/opencl-c.h
OLD_FILES+=usr/lib/clang/3.9.0/include/pkuintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/pmmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/popcntintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/prfchwintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/rdseedintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/rtmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/s390intrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/shaintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/smmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/tbmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/tmmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/vadefs.h
OLD_FILES+=usr/lib/clang/3.9.0/include/vecintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/wmmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/x86intrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/xmmintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/xopintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/xsavecintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/xsaveintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/xsaveoptintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/xsavesintrin.h
OLD_FILES+=usr/lib/clang/3.9.0/include/xtestintrin.h
OLD_DIRS+=usr/lib/clang/3.9.0/include
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-i386.so
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-preinit-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-preinit-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-x86_64.so
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan_cxx-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan_cxx-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.profile-arm.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.profile-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.profile-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.safestack-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.safestack-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.stats-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.stats-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.stats_client-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.stats_client-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.ubsan_standalone-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.ubsan_standalone-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.ubsan_standalone_cxx-i386.a
OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.ubsan_standalone_cxx-x86_64.a
OLD_DIRS+=usr/lib/clang/3.9.0/lib/freebsd
OLD_DIRS+=usr/lib/clang/3.9.0/lib
OLD_DIRS+=usr/lib/clang/3.9.0
OLD_FILES+=usr/lib/clang/3.9.1/include/sanitizer/allocator_interface.h
OLD_FILES+=usr/lib/clang/3.9.1/include/sanitizer/asan_interface.h
OLD_FILES+=usr/lib/clang/3.9.1/include/sanitizer/common_interface_defs.h
OLD_FILES+=usr/lib/clang/3.9.1/include/sanitizer/coverage_interface.h
OLD_FILES+=usr/lib/clang/3.9.1/include/sanitizer/dfsan_interface.h
OLD_FILES+=usr/lib/clang/3.9.1/include/sanitizer/esan_interface.h
OLD_FILES+=usr/lib/clang/3.9.1/include/sanitizer/linux_syscall_hooks.h
OLD_FILES+=usr/lib/clang/3.9.1/include/sanitizer/lsan_interface.h
OLD_FILES+=usr/lib/clang/3.9.1/include/sanitizer/msan_interface.h
OLD_FILES+=usr/lib/clang/3.9.1/include/sanitizer/tsan_interface_atomic.h
OLD_DIRS+=usr/lib/clang/3.9.1/include/sanitizer
OLD_FILES+=usr/lib/clang/3.9.1/include/__clang_cuda_cmath.h
OLD_FILES+=usr/lib/clang/3.9.1/include/__clang_cuda_intrinsics.h
OLD_FILES+=usr/lib/clang/3.9.1/include/__clang_cuda_math_forward_declares.h
OLD_FILES+=usr/lib/clang/3.9.1/include/__clang_cuda_runtime_wrapper.h
OLD_FILES+=usr/lib/clang/3.9.1/include/__stddef_max_align_t.h
OLD_FILES+=usr/lib/clang/3.9.1/include/__wmmintrin_aes.h
OLD_FILES+=usr/lib/clang/3.9.1/include/__wmmintrin_pclmul.h
OLD_FILES+=usr/lib/clang/3.9.1/include/adxintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/altivec.h
OLD_FILES+=usr/lib/clang/3.9.1/include/ammintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/arm_acle.h
OLD_FILES+=usr/lib/clang/3.9.1/include/arm_neon.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avx2intrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avx512bwintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avx512cdintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avx512dqintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avx512erintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avx512fintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avx512ifmaintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avx512ifmavlintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avx512pfintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avx512vbmiintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avx512vbmivlintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avx512vlbwintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avx512vlcdintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avx512vldqintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avx512vlintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/avxintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/bmi2intrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/bmiintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/clflushoptintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/cpuid.h
OLD_FILES+=usr/lib/clang/3.9.1/include/cuda_builtin_vars.h
OLD_FILES+=usr/lib/clang/3.9.1/include/emmintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/f16cintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/fma4intrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/fmaintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/fxsrintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/htmintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/htmxlintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/ia32intrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/immintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/lzcntintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/mm3dnow.h
OLD_FILES+=usr/lib/clang/3.9.1/include/mm_malloc.h
OLD_FILES+=usr/lib/clang/3.9.1/include/mmintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/module.modulemap
OLD_FILES+=usr/lib/clang/3.9.1/include/msa.h
OLD_FILES+=usr/lib/clang/3.9.1/include/mwaitxintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/nmmintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/opencl-c.h
OLD_FILES+=usr/lib/clang/3.9.1/include/pkuintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/pmmintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/popcntintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/prfchwintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/rdseedintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/rtmintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/s390intrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/shaintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/smmintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/tbmintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/tmmintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/vadefs.h
OLD_FILES+=usr/lib/clang/3.9.1/include/vecintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/wmmintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/x86intrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/xmmintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/xopintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/xsavecintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/xsaveintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/xsaveoptintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/xsavesintrin.h
OLD_FILES+=usr/lib/clang/3.9.1/include/xtestintrin.h
OLD_DIRS+=usr/lib/clang/3.9.1/include
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.asan-i386.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.asan-i386.so
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.asan-preinit-i386.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.asan-preinit-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.asan-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.asan-x86_64.so
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.asan_cxx-i386.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.asan_cxx-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.profile-arm.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.profile-i386.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.profile-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.safestack-i386.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.safestack-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.stats-i386.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.stats-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.stats_client-i386.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.stats_client-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.ubsan_standalone-i386.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.ubsan_standalone-x86_64.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.ubsan_standalone_cxx-i386.a
OLD_FILES+=usr/lib/clang/3.9.1/lib/freebsd/libclang_rt.ubsan_standalone_cxx-x86_64.a
OLD_DIRS+=usr/lib/clang/3.9.1/lib/freebsd
OLD_DIRS+=usr/lib/clang/3.9.1/lib
OLD_DIRS+=usr/lib/clang/3.9.1
OLD_DIRS+=usr/lib/clang
OLD_FILES+=usr/share/doc/llvm/clang/LICENSE.TXT
OLD_DIRS+=usr/share/doc/llvm/clang