Provide npx_get_fsave(9) and npx_set_fsave(9) functions to obtain and
restore the FPU state from the format of machine FSAVE area. The intended use is for ABI emulators to provide FSAVE-formatted FPU state to usermode requiring it, while kernel could use FXSAVE due to XMM/XSAVE. The core functionality to convert from/to FXSAVE format is shared with the fill_fpregs_xmm() and set_fpregs_xmm(). Move the later functions to npx.c and rename them to npx_fill_fpregs_xmm() and npx_set_fpregs_xmm(). They differ from nptx_get/set_fsave(9) since our mcontext contains padding to be zeroed or ignored. fill_fpregs() and set_fpregs() could be converted to use the new interface, but there are small differences to handle. Sponsored by: The FreeBSD Foundation MFC after: 1 week
This commit is contained in:
Konstantin Belousov
parent
f9343dacbd
commit
b24de3ac40
@ -176,10 +176,6 @@ static void get_fpcontext(struct thread *td, mcontext_t *mcp,
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char *xfpusave, size_t xfpusave_len);
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static int set_fpcontext(struct thread *td, mcontext_t *mcp,
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char *xfpustate, size_t xfpustate_len);
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#ifdef CPU_ENABLE_SSE
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static void set_fpregs_xmm(struct save87 *, struct savexmm *);
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static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
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#endif /* CPU_ENABLE_SSE */
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SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
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/* Intel ICH registers */
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@ -2952,58 +2948,6 @@ set_regs(struct thread *td, struct reg *regs)
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return (0);
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}
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#ifdef CPU_ENABLE_SSE
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static void
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fill_fpregs_xmm(sv_xmm, sv_87)
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struct savexmm *sv_xmm;
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struct save87 *sv_87;
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{
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register struct env87 *penv_87 = &sv_87->sv_env;
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register struct envxmm *penv_xmm = &sv_xmm->sv_env;
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int i;
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bzero(sv_87, sizeof(*sv_87));
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/* FPU control/status */
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penv_87->en_cw = penv_xmm->en_cw;
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penv_87->en_sw = penv_xmm->en_sw;
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penv_87->en_tw = penv_xmm->en_tw;
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penv_87->en_fip = penv_xmm->en_fip;
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penv_87->en_fcs = penv_xmm->en_fcs;
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penv_87->en_opcode = penv_xmm->en_opcode;
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penv_87->en_foo = penv_xmm->en_foo;
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penv_87->en_fos = penv_xmm->en_fos;
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/* FPU registers */
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for (i = 0; i < 8; ++i)
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sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
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}
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static void
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set_fpregs_xmm(sv_87, sv_xmm)
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struct save87 *sv_87;
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struct savexmm *sv_xmm;
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{
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register struct env87 *penv_87 = &sv_87->sv_env;
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register struct envxmm *penv_xmm = &sv_xmm->sv_env;
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int i;
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/* FPU control/status */
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penv_xmm->en_cw = penv_87->en_cw;
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penv_xmm->en_sw = penv_87->en_sw;
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penv_xmm->en_tw = penv_87->en_tw;
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penv_xmm->en_fip = penv_87->en_fip;
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penv_xmm->en_fcs = penv_87->en_fcs;
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penv_xmm->en_opcode = penv_87->en_opcode;
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penv_xmm->en_foo = penv_87->en_foo;
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penv_xmm->en_fos = penv_87->en_fos;
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/* FPU registers */
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for (i = 0; i < 8; ++i)
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sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
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}
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#endif /* CPU_ENABLE_SSE */
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int
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fill_fpregs(struct thread *td, struct fpreg *fpregs)
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{
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@ -3018,7 +2962,7 @@ fill_fpregs(struct thread *td, struct fpreg *fpregs)
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#endif
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#ifdef CPU_ENABLE_SSE
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if (cpu_fxsr)
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fill_fpregs_xmm(&get_pcb_user_save_td(td)->sv_xmm,
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npx_fill_fpregs_xmm(&get_pcb_user_save_td(td)->sv_xmm,
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(struct save87 *)fpregs);
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else
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#endif /* CPU_ENABLE_SSE */
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@ -3033,7 +2977,7 @@ set_fpregs(struct thread *td, struct fpreg *fpregs)
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#ifdef CPU_ENABLE_SSE
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if (cpu_fxsr)
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set_fpregs_xmm((struct save87 *)fpregs,
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npx_set_fpregs_xmm((struct save87 *)fpregs,
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&get_pcb_user_save_td(td)->sv_xmm);
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else
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#endif /* CPU_ENABLE_SSE */
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@ -67,6 +67,11 @@ void npxsuspend(union savefpu *addr);
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int npxtrap_x87(void);
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int npxtrap_sse(void);
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void npxuserinited(struct thread *);
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void npx_get_fsave(void *);
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int npx_set_fsave(void *);
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void npx_fill_fpregs_xmm(struct savexmm *, struct save87 *);
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void npx_set_fpregs_xmm(struct save87 *, struct savexmm *);
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struct fpu_kern_ctx *fpu_kern_alloc_ctx(u_int flags);
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void fpu_kern_free_ctx(struct fpu_kern_ctx *ctx);
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int fpu_kern_enter(struct thread *td, struct fpu_kern_ctx *ctx,
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@ -1159,6 +1159,102 @@ fpusave(addr)
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fnsave(addr);
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}
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#ifdef CPU_ENABLE_SSE
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static void
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npx_fill_fpregs_xmm1(struct savexmm *sv_xmm, struct save87 *sv_87)
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{
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struct env87 *penv_87;
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struct envxmm *penv_xmm;
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int i;
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penv_87 = &sv_87->sv_env;
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penv_xmm = &sv_xmm->sv_env;
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/* FPU control/status */
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penv_87->en_cw = penv_xmm->en_cw;
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penv_87->en_sw = penv_xmm->en_sw;
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penv_87->en_tw = penv_xmm->en_tw;
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penv_87->en_fip = penv_xmm->en_fip;
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penv_87->en_fcs = penv_xmm->en_fcs;
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penv_87->en_opcode = penv_xmm->en_opcode;
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penv_87->en_foo = penv_xmm->en_foo;
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penv_87->en_fos = penv_xmm->en_fos;
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/* FPU registers */
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for (i = 0; i < 8; ++i)
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sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
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}
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void
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npx_fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
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{
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bzero(sv_87, sizeof(*sv_87));
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npx_fill_fpregs_xmm1(sv_xmm, sv_87);
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}
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void
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npx_set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
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{
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struct env87 *penv_87;
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struct envxmm *penv_xmm;
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int i;
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penv_87 = &sv_87->sv_env;
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penv_xmm = &sv_xmm->sv_env;
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/* FPU control/status */
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penv_xmm->en_cw = penv_87->en_cw;
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penv_xmm->en_sw = penv_87->en_sw;
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penv_xmm->en_tw = penv_87->en_tw;
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penv_xmm->en_fip = penv_87->en_fip;
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penv_xmm->en_fcs = penv_87->en_fcs;
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penv_xmm->en_opcode = penv_87->en_opcode;
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penv_xmm->en_foo = penv_87->en_foo;
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penv_xmm->en_fos = penv_87->en_fos;
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/* FPU registers */
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for (i = 0; i < 8; ++i)
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sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
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}
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#endif /* CPU_ENABLE_SSE */
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void
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npx_get_fsave(void *addr)
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{
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struct thread *td;
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union savefpu *sv;
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td = curthread;
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npxgetregs(td);
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sv = get_pcb_user_save_td(td);
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#ifdef CPU_ENABLE_SSE
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if (cpu_fxsr)
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npx_fill_fpregs_xmm1(&sv->sv_xmm, addr);
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else
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#endif
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bcopy(sv, addr, sizeof(struct env87) +
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sizeof(struct fpacc87[8]));
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}
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int
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npx_set_fsave(void *addr)
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{
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union savefpu sv;
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int error;
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bzero(&sv, sizeof(sv));
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#ifdef CPU_ENABLE_SSE
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if (cpu_fxsr)
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npx_set_fpregs_xmm(addr, &sv.sv_xmm);
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else
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#endif
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bcopy(addr, &sv, sizeof(struct env87) +
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sizeof(struct fpacc87[8]));
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error = npxsetregs(curthread, &sv, NULL, 0);
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return (error);
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}
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#ifdef CPU_ENABLE_SSE
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/*
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* On AuthenticAMD processors, the fxrstor instruction does not restore
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