ofed: Define barriers for mips and arm.
I used the strongest barriers available on the architectures, so if the future analysis show that it is excessive, the barriers could be relaxed. Still, it is unlikely that it is meaningful to run IB on 32bit ARM or current MIPS machines, so the change is to make WITH_OFED to pass tinderbox. Sponsored by: Mellanox Technologies Reviewed by: hselasky Differential revision: https://reviews.freebsd.org/D13329
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@ -96,6 +96,14 @@
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#define udma_to_device_barrier() asm volatile("dsb st" ::: "memory");
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#elif defined(__sparc__) || defined(__s390x__)
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#define udma_to_device_barrier() asm volatile("" ::: "memory")
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#elif defined(__mips__)
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#include <sys/types.h>
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#include <machine/atomic.h>
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#define udma_to_device_barrier() mips_sync()
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#elif defined(__arm__)
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#include <sys/types.h>
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#include <machine/atomic.h>
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#define udma_to_device_barrier() dmb()
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#else
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#error No architecture specific memory barrier defines found!
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#endif
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@ -128,6 +136,10 @@
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#define udma_from_device_barrier() asm volatile("dsb ld" ::: "memory");
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#elif defined(__sparc__) || defined(__s390x__)
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#define udma_from_device_barrier() asm volatile("" ::: "memory")
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#elif defined(__mips__)
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#define udma_from_device_barrier() mips_sync()
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#elif defined(__arm__)
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#define udma_from_device_barrier() dmb()
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#else
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#error No architecture specific memory barrier defines found!
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#endif
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@ -192,6 +204,10 @@
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#define mmio_flush_writes() asm volatile("dsb st" ::: "memory");
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#elif defined(__sparc__) || defined(__s390x__)
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#define mmio_flush_writes() asm volatile("" ::: "memory")
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#elif defined(__mips__)
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#define mmio_flush_writes() mips_sync()
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#elif defined(__arm__)
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#define mmio_flush_writes() dmb()
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#else
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#error No architecture specific memory barrier defines found!
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#endif
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