cxgbe(4): Update T6, T5, and T4 firmwares to 1.16.63.0.
Changes since 1.16.26.0 for all three firmwares are listed below. This list was obtained from the Release Notes of the Chelsio Unified Wire v3.5.05 release for Linux. T6 Firmware ++++++++++++ ================================================================================ Version : 1.16.63.0 Date : 09/29/2017 ================================================================================ Fixes ----- BASE: - Fixed a fw crash when configured traffic rate limit is less than 10kbps. - Fixed traffic rate limiting for smaller traffic rate value. ETH: - Fixed 40G link failure when interface is toggled. - Fixed adapter crash when interface is toggled during traffic. - Fixed 25G link failure when PEER only supports consortium mode autoneg for 25G. - Fixed 100G optics link failure when cable is plugged in after bringing up the interface. - Enable RS FEC as default if speed is 100G. - Fixed DCBX configuration refresh failure. OFLD - Fixed 0B iWARP ingress read failure. - Fixed iWARP SRQ reuse failure. FOiSCSI: - Fixed vlan interface ping failure. - Fixed target discovery failures. - Fixed mutual chap login failure. ================================================================================ Version : 1.16.59.0 Date : 09/05/2017 ================================================================================ FIXES ----- BASE: - Fixed fw crash caused by MC parity error in SO adapters. - Generate Timer0Int interrupt if fw crashes due to unaligned access error. Host driver must look into PCIE_FW register to see if any fw fatal error has encountered. If PCIE_FW doesn't indicate any error then driver must ignore this interrupt. - Fixed receive buffer threshold settings which was resulting in error frames on receive side. ETH: - Fixed an issue in connection traffic shaping when FLOWC_WR->FW_FLOWC_MNEM_SCHEDCLASS is not received in first WR on the connection. - Fixed link failure when speed is changed from 10G-1G-10G due to incorrect flag check. - Fixed improper LED behaviour for blink test and when traffic is running. - Removed storage of previous fec settings from fw. Driver needs to pass the user settings whenever a new module is plugged in as fw resets these when a module is unplugged. OFLD - OVS offload: TP cache is flushed periodically to get the accuate filters stats (hit count). ENHANCEMENTS ------------ BASE: - Ring backbone feature added. New FW_PARAMS_PARAM_DEV_RING_BACKBONE param type added to query and enable ring backbone support. - VNI support added for filtering. New entry_type FW_VI_MAC_TYPE_EXACTMAC_VNI added to FW_VI_MAC_CMD. - Added new API FW_PARAM_PARAM_DEV_MPSBGMAP to read the priority to buffer group mapping for the ports. - FW_PARAMS_PARAM_DEV_TPCHMAP API added to read the port to channel mapping. - HMA (Host memory access) support added. New FW_HMA_CMD and FW_PARAMS_PARAM_DEV_HMA_SIZE added to query and configure the HMA. It enables the memfree support (256 connections) for iwarp. - PTP support enabled. ETH: - Added consortium mode 50G support. - Added the ability to allow only selected speeds to be advertised during auto negotiation. - Increased port capability from 16 to 32 bits to support more speeds. FW_PARAMS_PARAM_PFVF_PORT_CAPS32 added to query whether fw supports 16 or 32 bit port capability. OFLD: - RDMA Write with immediate support added (iwarp 2.0 feature) - FW_TLS_KEYCTX_TX_WR removed and security key management moved to driver. - 256 offloaded connections support for iwarp on SO adapters. iSCSI: - New param FW_PARAMS_PARAM_DEV_PPOD_EDRAM added for iscsi ppod configuration in EDRAM (performance improvement). FOiSCSI: - iSCSI Command offload target support added. FOFCoE: - FCoE support enabled. ================================================================================ Version : 1.16.43.0 Date : 05/05/2017 ================================================================================ FIXES ----- BASE: - Fixed default DCB mode to AUTO. - Fixed DCBX bugs when AUTO mode is configured in config file. - Fixed an issue where even after removing PFC from switch, PFC wasn't getting reset. - Fixed DDR3/DDR4 ECC errors. - Fixed an FLR issue where FLR completion was going to host before FLR processing is finished in fw. ETH: - Fixed bug in writing multi-bytes using i2c interface. - Fixed the link failure when optical cable is inserted into the QSA module after loading the driver. - Fixed false link up when peer interface was brought down. - Enabling RS FEC by default for 100Gbase-SR4 according to 802.3BJ standard. - Fixed bugs related to negotiated fec based local/peer fec ability and request. - Fixed auto-neg failure with few switches. - T6 Performance improvement fixes. OFLD - Fixed an extra credit issue if FW_RI_TYPE_FINI is delayed in fw due to backpressure. - Added a new queue type FW_IQ_TYPE_VF_CQ to handle the FW_PARAMS_PARAM_DMAQ* commands. queue type will be part of the FW_PARAMS_PARAM_DMAQ_IQ_INTIDX value. Used in guest RDMA (RDMA from VM/VF) usecase. - T6 Crypto Coprocessor mode bug fixes. - T6 Crypto TLS-inline mode bug fixes. ENHANCEMENTS ------------ BASE: - Added new API FW_PARAM_PARAM_DEV_MPSBGMAP to read the priority to buffer group mapping for the ports. ETH: - Added broadcom consortium next page support for 25G CR. This can be enabled using flags=an_brcm option in the t6-config.txt file. - Added spider mode support. - Added support for 10G-BaseT converter sfp+ module. - Added support for additional 25G/100G cables. - Added support to enable/disable auto-neg using ethtool. ================================================================================ Version : 1.16.33.0 Date : 02/24/2017 ================================================================================ Fixes ----- BASE: - Fixed DDR4 uncorrectable errors. ETH: - Enabled link auto negotiation (AN) by default in config file. - Added AN and FEC control api. Host driver and application can enable/disable AN and FEC. ENHANCEMENTS ------------ BASE: - Enabled High priorty filter. - Added T6425 adapter support. ETH: - Added new workrequest ETH_TX_PKTS2_WR (see fw api document for more details). ================================================================================ Version : 1.16.29.0 Date : 01/27/2017 ================================================================================ FIXES ----- BASE: - Set multiple fec values only if AN is enabled in config file and when module is connected. - Fixed intermittent DDR3/4 ECC errors. - max number of ethctrl queue in VF set to 2 (reverted the last change because it causes problem in VF drivers). ETH: - Made devlog more verbose by printing cable information in redable form. - Updated AN settings to work with more 25G/100G switches. - Added support for more SFP28/QSFP28 cables. - Fixed an issue of link going down after few hours of idle time. OFLD: - Fixed an issue in TLS which was causing fw crash on running TLS traffic. FOiSCSI: - Fixed the failure of PXE boot OS install on an iscsi lun. ENHANCEMENTS ------------ OFLD: - Added filtering support for NAT. New WR FW_FILTER2_WR and FW_PARAMS_PARAM_DEV_FILTER2_WR added for the same. - Added RDMA guest mode (mode 3 or RDMA from VF) support. ================================================================================ T5 Firmware ++++++++++++ ================================================================================ Version : 1.16.63.0 Date : 09/29/2017 ================================================================================ Fixes ----- BASE: - Fixed offload memory overcommit in case of SO adapter. ETH: - Fixed DCBX configuration refresh failure. OFLD - Fixed 0B iWARP ingress read failure. FOiSCSI: - Fixed vlan interface ping failure. ================================================================================ Version : 1.16.59.0 Date : 09/05/2017 ================================================================================ FIXES ----- BASE: - Fixed an FLR issue which was causing error when VF attached VM was powered on. ETH: - Fixed an issue in connection traffic shaping when FLOWC_WR->FW_FLOWC_MNEM_SCHEDCLASS is not received in first WR on the connection. - Fixed link failure when speed is changed from 10G-1G-10G due to incorrect flag check. - Fixed T580 link failure with few switches which take more time for establishing link. ENHANCEMENTS ------------ BASE: - Ring backbone feature added. New FW_PARAMS_PARAM_DEV_RING_BACKBONE param type added to query and enable ring backbone support. - Added new API FW_PARAM_PARAM_DEV_MPSBGMAP to read the priority to buffer group mapping for the ports. - FW_PARAMS_PARAM_DEV_TPCHMAP API added to read the port to channel mapping. FOiSCSI: - iSCSI Command offload target support added. ================================================================================ Version : 1.16.43.0 Date : 05/05/2017 ================================================================================ FIXES ----- BASE: - Fixed default DCB mode to AUTO. - Fixed DCBX bugs when AUTO mode is configured in config file. - Fixed an issue where even after removing PFC from switch, PFC wasn't getting reset. ETH: - Fixed bug in writing multi-bytes using i2c interface. - Fixed the link failure when optical cable is inserted into the QSA module after loading the driver. OFLD - Fixed an extra credit issue if FW_RI_TYPE_FINI is delayed in fw due to backpressure. - Added a new queue type FW_IQ_TYPE_VF_CQ to handle the FW_PARAMS_PARAM_DMAQ* commands. queue type will be part of the FW_PARAMS_PARAM_DMAQ_IQ_INTIDX value. Used in guest RDMA (RDMA from VM/VF) usecase. ENHANCEMENTS ------------ BASE: - Added new API FW_PARAM_PARAM_DEV_MPSBGMAP to read the priority to buffer group mapping for the ports. ================================================================================ Version : 1.16.33.0 Date : 02/24/2017 ================================================================================ ENHANCEMENTS ------------ ETH: - Added new workrequest ETH_TX_PKTS2_WR (see fw api document for more details). ================================================================================ Version : 1.16.29.0 Date : 01/27/2017 ================================================================================ FIXES ----- BASE: - max number of ethctrl queue in VF set to 2 (reverted the last change because it causes problem in VF drivers). FOiSCSI: - Fixed the failure of PXE boot OS install on an iscsi lun. ENHANCEMENTS ------------ OFLD: - Added filtering support for NAT. New WR FW_FILTER2_WR and FW_PARAMS_PARAM_DEV_FILTER2_WR added for the same. - Added RDMA guest mode (mode 3 or RDMA from VF) support. ================================================================================ T4 Firmware +++++++++++ ================================================================================ Version : 1.16.63.0 Date : 09/29/2017 ================================================================================ Fixes ----- ETH: - Fixed DCBX configuration refresh failure. FOiSCSI: - Fixed vlan interface ping failure. ================================================================================ Version : 1.16.59.0 Date : 09/05/2017 ================================================================================ FIXES ----- ETH: - Fixed an issue in connection traffic shaping when FLOWC_WR->FW_FLOWC_MNEM_SCHEDCLASS is not received in first WR on the connection. ENHANCEMENTS ------------ BASE: - FW_PARAMS_PARAM_DEV_TPCHMAP API added to read the port to channel mapping. ================================================================================ Version : 1.16.43.0 Date : 05/05/2017 ================================================================================ FIXES ----- BASE: - Fixed default DCB mode to AUTO. - Fixed DCBX bugs when AUTO mode is configured in config file. - Fixed an issue where even after removing PFC from switch, PFC wasn't getting reset. ETH: - Fixed bug in writing multi-bytes using i2c interface. OFLD - Fixed an extra credit issue if FW_RI_TYPE_FINI is delayed in fw due to backpressure. - Added a new queue type FW_IQ_TYPE_VF_CQ to handle the FW_PARAMS_PARAM_DMAQ* commands. queue type will be part of the FW_PARAMS_PARAM_DMAQ_IQ_INTIDX value. Used in guest RDMA (RDMA from VM/VF) usecase. ENHANCEMENTS ------------ BASE: - Added new API FW_PARAM_PARAM_DEV_MPSBGMAP to read the priority to buffer group mapping for the ports. Obtained from: Chelsio Communications MFC after: 2 weeks Sponsored by: Chelsio Communications
This commit is contained in:
np
parent
50042e305e
commit
b2ba64bb12
@ -1427,7 +1427,7 @@ t4fw.fwo optional cxgbe \
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no-implicit-rule \
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clean "t4fw.fwo"
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t4fw.fw optional cxgbe \
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dependency "$S/dev/cxgbe/firmware/t4fw-1.16.59.0.bin.uu" \
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dependency "$S/dev/cxgbe/firmware/t4fw-1.16.63.0.bin.uu" \
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compile-with "${NORMAL_FW}" \
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no-obj no-implicit-rule \
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clean "t4fw.fw"
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@ -1461,7 +1461,7 @@ t5fw.fwo optional cxgbe \
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no-implicit-rule \
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clean "t5fw.fwo"
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t5fw.fw optional cxgbe \
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dependency "$S/dev/cxgbe/firmware/t5fw-1.16.59.0.bin.uu" \
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dependency "$S/dev/cxgbe/firmware/t5fw-1.16.63.0.bin.uu" \
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compile-with "${NORMAL_FW}" \
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no-obj no-implicit-rule \
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clean "t5fw.fw"
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@ -1495,7 +1495,7 @@ t6fw.fwo optional cxgbe \
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no-implicit-rule \
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clean "t6fw.fwo"
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t6fw.fw optional cxgbe \
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dependency "$S/dev/cxgbe/firmware/t6fw-1.16.59.0.bin.uu" \
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dependency "$S/dev/cxgbe/firmware/t6fw-1.16.63.0.bin.uu" \
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compile-with "${NORMAL_FW}" \
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no-obj no-implicit-rule \
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clean "t6fw.fw"
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File diff suppressed because it is too large
Load Diff
9567
sys/dev/cxgbe/firmware/t4fw-1.16.63.0.bin.uu
Normal file
9567
sys/dev/cxgbe/firmware/t4fw-1.16.63.0.bin.uu
Normal file
File diff suppressed because it is too large
Load Diff
@ -73,6 +73,7 @@ enum fw_retval {
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FW_SCSI_OVER_FLOW_ERR = 140, /* */
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FW_SCSI_DDP_ERR = 141, /* DDP error*/
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FW_SCSI_TASK_ERR = 142, /* No SCSI tasks available */
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FW_SCSI_IO_BLOCK = 143, /* IO is going to be blocked due to resource failure */
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};
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/******************************************************************************
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@ -140,9 +141,10 @@ enum fw_wr_opcodes {
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FW_PTP_TX_PKT_WR = 0x46,
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FW_TLSTX_DATA_WR = 0x68,
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FW_CRYPTO_LOOKASIDE_WR = 0x6d,
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FW_COiSCSI_TGT_WR = 0x70,
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FW_COiSCSI_TGT_CONN_WR = 0x71,
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FW_COiSCSI_TGT_XMIT_WR = 0x72,
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FW_COISCSI_TGT_WR = 0x70,
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FW_COISCSI_TGT_CONN_WR = 0x71,
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FW_COISCSI_TGT_XMIT_WR = 0x72,
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FW_COISCSI_STATS_WR = 0x73,
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FW_ISNS_WR = 0x75,
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FW_ISNS_XMIT_WR = 0x76,
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FW_FILTER2_WR = 0x77,
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@ -2093,6 +2095,8 @@ struct fw_ri_wr {
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#define FW_FOISCSI_NAME_MAX_LEN 224
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#define FW_FOISCSI_ALIAS_MAX_LEN 224
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#define FW_FOISCSI_KEY_MAX_LEN 64
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#define FW_FOISCSI_VAL_MAX_LEN 256
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#define FW_FOISCSI_CHAP_SEC_MAX_LEN 128
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#define FW_FOISCSI_INIT_NODE_MAX 8
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@ -2124,19 +2128,36 @@ enum fw_chnet_ifconf_wr_subop {
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FW_CHNET_IFCONF_WR_SUBOP_RA_BASED_ADDR_SET,
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FW_CHNET_IFCONF_WR_SUBOP_ADDR_EXPIRED,
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FW_CHNET_IFCONF_WR_SUBOP_ICMP_PING4,
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FW_CHNET_IFCONF_WR_SUBOP_ICMP_PING6,
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FW_CHNET_IFCONF_WR_SUBOP_MAX,
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};
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struct fw_chnet_ifconf_wr {
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__be32 op_compl;
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__be32 flowid_len16;
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__be64 cookie;
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__u64 cookie;
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__be32 if_flowid;
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__u8 idx;
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__u8 subop;
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__u8 retval;
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__u8 r2;
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__be64 r3;
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union {
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__be64 r3;
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struct fw_chnet_ifconf_ping {
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__be16 ping_time;
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__u8 ping_rsptype;
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__u8 ping_param_rspcode_to_fin_bit;
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__u8 ping_pktsize;
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__u8 ping_ttl;
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__be16 ping_seq;
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} ping;
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struct fw_chnet_ifconf_mac {
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__u8 peer_mac[6];
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__u8 smac_idx;
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} mac;
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} u;
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struct fw_chnet_ifconf_params {
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__be32 r0;
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__be16 vlanid;
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@ -2163,6 +2184,23 @@ struct fw_chnet_ifconf_wr {
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} param;
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};
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#define S_FW_CHNET_IFCONF_WR_PING_MACBIT 1
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#define M_FW_CHNET_IFCONF_WR_PING_MACBIT 0x1
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#define V_FW_CHNET_IFCONF_WR_PING_MACBIT(x) \
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((x) << S_FW_CHNET_IFCONF_WR_PING_MACBIT)
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#define G_FW_CHNET_IFCONF_WR_PING_MACBIT(x) \
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(((x) >> S_FW_CHNET_IFCONF_WR_PING_MACBIT) & \
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M_FW_CHNET_IFCONF_WR_PING_MACBIT)
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#define F_FW_CHNET_IFCONF_WR_PING_MACBIT \
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V_FW_CHNET_IFCONF_WR_PING_MACBIT(1U)
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#define S_FW_CHNET_IFCONF_WR_FIN_BIT 0
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#define M_FW_CHNET_IFCONF_WR_FIN_BIT 0x1
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#define V_FW_CHNET_IFCONF_WR_FIN_BIT(x) ((x) << S_FW_CHNET_IFCONF_WR_FIN_BIT)
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#define G_FW_CHNET_IFCONF_WR_FIN_BIT(x) \
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(((x) >> S_FW_CHNET_IFCONF_WR_FIN_BIT) & M_FW_CHNET_IFCONF_WR_FIN_BIT)
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#define F_FW_CHNET_IFCONF_WR_FIN_BIT V_FW_CHNET_IFCONF_WR_FIN_BIT(1U)
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enum fw_foiscsi_node_type {
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FW_FOISCSI_NODE_TYPE_INITIATOR = 0,
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FW_FOISCSI_NODE_TYPE_TARGET,
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@ -2198,6 +2236,13 @@ enum fw_foiscsi_wr_subop {
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FW_FOISCSI_WR_SUBOP_MOD = 4,
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};
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enum fw_coiscsi_stats_wr_subop {
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FW_COISCSI_WR_SUBOP_TOT = 1,
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FW_COISCSI_WR_SUBOP_MAX = 2,
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FW_COISCSI_WR_SUBOP_CUR = 3,
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FW_COISCSI_WR_SUBOP_CLR = 4,
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};
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enum fw_foiscsi_ctrl_state {
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FW_FOISCSI_CTRL_STATE_FREE = 0,
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FW_FOISCSI_CTRL_STATE_ONLINE = 1,
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@ -2487,7 +2532,7 @@ struct fw_rdev_wr {
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struct fw_foiscsi_node_wr {
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__be32 op_to_immdlen;
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__be32 flowid_len16;
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__be32 no_sess_recv_to_len16;
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__u64 cookie;
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__u8 subop;
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__u8 status;
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@ -2500,6 +2545,7 @@ struct fw_foiscsi_node_wr {
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__be16 r3;
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__u8 iqn[224];
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__u8 alias[224];
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__be32 isid_tval_to_isid_cval;
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};
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#define S_FW_FOISCSI_NODE_WR_IMMDLEN 0
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@ -2508,8 +2554,46 @@ struct fw_foiscsi_node_wr {
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#define G_FW_FOISCSI_NODE_WR_IMMDLEN(x) \
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(((x) >> S_FW_FOISCSI_NODE_WR_IMMDLEN) & M_FW_FOISCSI_NODE_WR_IMMDLEN)
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#define S_FW_FOISCSI_NODE_WR_NO_SESS_RECV 28
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#define M_FW_FOISCSI_NODE_WR_NO_SESS_RECV 0x1
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#define V_FW_FOISCSI_NODE_WR_NO_SESS_RECV(x) \
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((x) << S_FW_FOISCSI_NODE_WR_NO_SESS_RECV)
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#define G_FW_FOISCSI_NODE_WR_NO_SESS_RECV(x) \
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(((x) >> S_FW_FOISCSI_NODE_WR_NO_SESS_RECV) & \
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M_FW_FOISCSI_NODE_WR_NO_SESS_RECV)
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#define F_FW_FOISCSI_NODE_WR_NO_SESS_RECV \
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V_FW_FOISCSI_NODE_WR_NO_SESS_RECV(1U)
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#define S_FW_FOISCSI_NODE_WR_ISID_TVAL 30
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#define M_FW_FOISCSI_NODE_WR_ISID_TVAL 0x3
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#define V_FW_FOISCSI_NODE_WR_ISID_TVAL(x) \
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((x) << S_FW_FOISCSI_NODE_WR_ISID_TVAL)
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#define G_FW_FOISCSI_NODE_WR_ISID_TVAL(x) \
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(((x) >> S_FW_FOISCSI_NODE_WR_ISID_TVAL) & M_FW_FOISCSI_NODE_WR_ISID_TVAL)
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#define S_FW_FOISCSI_NODE_WR_ISID_AVAL 24
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#define M_FW_FOISCSI_NODE_WR_ISID_AVAL 0x3f
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#define V_FW_FOISCSI_NODE_WR_ISID_AVAL(x) \
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((x) << S_FW_FOISCSI_NODE_WR_ISID_AVAL)
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#define G_FW_FOISCSI_NODE_WR_ISID_AVAL(x) \
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(((x) >> S_FW_FOISCSI_NODE_WR_ISID_AVAL) & M_FW_FOISCSI_NODE_WR_ISID_AVAL)
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#define S_FW_FOISCSI_NODE_WR_ISID_BVAL 8
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#define M_FW_FOISCSI_NODE_WR_ISID_BVAL 0xffff
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#define V_FW_FOISCSI_NODE_WR_ISID_BVAL(x) \
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((x) << S_FW_FOISCSI_NODE_WR_ISID_BVAL)
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#define G_FW_FOISCSI_NODE_WR_ISID_BVAL(x) \
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(((x) >> S_FW_FOISCSI_NODE_WR_ISID_BVAL) & M_FW_FOISCSI_NODE_WR_ISID_BVAL)
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#define S_FW_FOISCSI_NODE_WR_ISID_CVAL 0
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#define M_FW_FOISCSI_NODE_WR_ISID_CVAL 0xff
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#define V_FW_FOISCSI_NODE_WR_ISID_CVAL(x) \
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((x) << S_FW_FOISCSI_NODE_WR_ISID_CVAL)
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#define G_FW_FOISCSI_NODE_WR_ISID_CVAL(x) \
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(((x) >> S_FW_FOISCSI_NODE_WR_ISID_CVAL) & M_FW_FOISCSI_NODE_WR_ISID_CVAL)
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struct fw_foiscsi_ctrl_wr {
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__be32 op_compl;
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__be32 op_to_no_fin;
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__be32 flowid_len16;
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__u64 cookie;
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__u8 subop;
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@ -2530,7 +2614,7 @@ struct fw_foiscsi_ctrl_wr {
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__be32 r1;
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} sess_attr;
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struct fw_foiscsi_conn_attr {
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__be32 hdigest_to_ddp_pgsz;
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__be32 hdigest_to_tcp_ws_en;
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__be32 max_rcv_dsl;
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__be32 ping_tmo;
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__be16 dst_port;
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@ -2551,6 +2635,13 @@ struct fw_foiscsi_ctrl_wr {
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__u8 tgt_name[FW_FOISCSI_NAME_MAX_LEN];
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};
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#define S_FW_FOISCSI_CTRL_WR_NO_FIN 0
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#define M_FW_FOISCSI_CTRL_WR_NO_FIN 0x1
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#define V_FW_FOISCSI_CTRL_WR_NO_FIN(x) ((x) << S_FW_FOISCSI_CTRL_WR_NO_FIN)
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#define G_FW_FOISCSI_CTRL_WR_NO_FIN(x) \
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(((x) >> S_FW_FOISCSI_CTRL_WR_NO_FIN) & M_FW_FOISCSI_CTRL_WR_NO_FIN)
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#define F_FW_FOISCSI_CTRL_WR_NO_FIN V_FW_FOISCSI_CTRL_WR_NO_FIN(1U)
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|
||||
#define S_FW_FOISCSI_CTRL_WR_SESS_TYPE 30
|
||||
#define M_FW_FOISCSI_CTRL_WR_SESS_TYPE 0x3
|
||||
#define V_FW_FOISCSI_CTRL_WR_SESS_TYPE(x) \
|
||||
@ -2646,20 +2737,64 @@ struct fw_foiscsi_ctrl_wr {
|
||||
(((x) >> S_FW_FOISCSI_CTRL_WR_IPV6) & M_FW_FOISCSI_CTRL_WR_IPV6)
|
||||
#define F_FW_FOISCSI_CTRL_WR_IPV6 V_FW_FOISCSI_CTRL_WR_IPV6(1U)
|
||||
|
||||
#define S_FW_FOISCSI_CTRL_WR_DDP_PGIDX 16
|
||||
#define M_FW_FOISCSI_CTRL_WR_DDP_PGIDX 0xf
|
||||
#define V_FW_FOISCSI_CTRL_WR_DDP_PGIDX(x) \
|
||||
((x) << S_FW_FOISCSI_CTRL_WR_DDP_PGIDX)
|
||||
#define G_FW_FOISCSI_CTRL_WR_DDP_PGIDX(x) \
|
||||
(((x) >> S_FW_FOISCSI_CTRL_WR_DDP_PGIDX) & M_FW_FOISCSI_CTRL_WR_DDP_PGIDX)
|
||||
|
||||
#define S_FW_FOISCSI_CTRL_WR_TCP_WS 12
|
||||
#define M_FW_FOISCSI_CTRL_WR_TCP_WS 0xf
|
||||
#define V_FW_FOISCSI_CTRL_WR_TCP_WS(x) ((x) << S_FW_FOISCSI_CTRL_WR_TCP_WS)
|
||||
#define G_FW_FOISCSI_CTRL_WR_TCP_WS(x) \
|
||||
(((x) >> S_FW_FOISCSI_CTRL_WR_TCP_WS) & M_FW_FOISCSI_CTRL_WR_TCP_WS)
|
||||
|
||||
#define S_FW_FOISCSI_CTRL_WR_TCP_WS_EN 11
|
||||
#define M_FW_FOISCSI_CTRL_WR_TCP_WS_EN 0x1
|
||||
#define V_FW_FOISCSI_CTRL_WR_TCP_WS_EN(x) \
|
||||
((x) << S_FW_FOISCSI_CTRL_WR_TCP_WS_EN)
|
||||
#define G_FW_FOISCSI_CTRL_WR_TCP_WS_EN(x) \
|
||||
(((x) >> S_FW_FOISCSI_CTRL_WR_TCP_WS_EN) & M_FW_FOISCSI_CTRL_WR_TCP_WS_EN)
|
||||
#define F_FW_FOISCSI_CTRL_WR_TCP_WS_EN V_FW_FOISCSI_CTRL_WR_TCP_WS_EN(1U)
|
||||
|
||||
struct fw_foiscsi_chap_wr {
|
||||
__be32 op_compl;
|
||||
__be32 op_to_kv_flag;
|
||||
__be32 flowid_len16;
|
||||
__u64 cookie;
|
||||
__u8 status;
|
||||
__u8 id_len;
|
||||
__u8 sec_len;
|
||||
union fw_foiscsi_len {
|
||||
struct fw_foiscsi_chap_lens {
|
||||
__u8 id_len;
|
||||
__u8 sec_len;
|
||||
} chapl;
|
||||
struct fw_foiscsi_vend_kv_lens {
|
||||
__u8 key_len;
|
||||
__u8 val_len;
|
||||
} vend_kvl;
|
||||
} lenu;
|
||||
__u8 node_type;
|
||||
__be16 node_id;
|
||||
__u8 r3[2];
|
||||
__u8 chap_id[FW_FOISCSI_NAME_MAX_LEN];
|
||||
__u8 chap_sec[FW_FOISCSI_CHAP_SEC_MAX_LEN];
|
||||
union fw_foiscsi_chap_vend {
|
||||
struct fw_foiscsi_chap {
|
||||
__u8 chap_id[224];
|
||||
__u8 chap_sec[128];
|
||||
} chap;
|
||||
struct fw_foiscsi_vend_kv {
|
||||
__u8 vend_key[64];
|
||||
__u8 vend_val[256];
|
||||
} vend_kv;
|
||||
} u;
|
||||
};
|
||||
|
||||
#define S_FW_FOISCSI_CHAP_WR_KV_FLAG 20
|
||||
#define M_FW_FOISCSI_CHAP_WR_KV_FLAG 0x1
|
||||
#define V_FW_FOISCSI_CHAP_WR_KV_FLAG(x) ((x) << S_FW_FOISCSI_CHAP_WR_KV_FLAG)
|
||||
#define G_FW_FOISCSI_CHAP_WR_KV_FLAG(x) \
|
||||
(((x) >> S_FW_FOISCSI_CHAP_WR_KV_FLAG) & M_FW_FOISCSI_CHAP_WR_KV_FLAG)
|
||||
#define F_FW_FOISCSI_CHAP_WR_KV_FLAG V_FW_FOISCSI_CHAP_WR_KV_FLAG(1U)
|
||||
|
||||
/******************************************************************************
|
||||
* C O i S C S I W O R K R E Q U E S T S
|
||||
********************************************/
|
||||
@ -2711,22 +2846,31 @@ struct fw_coiscsi_tgt_conn_wr {
|
||||
__be16 iq_id;
|
||||
__be32 in_stid;
|
||||
__be32 io_id;
|
||||
__be32 flags;
|
||||
struct fw_coiscsi_tgt_conn_tcp {
|
||||
__be16 in_sport;
|
||||
__be16 in_dport;
|
||||
__be32 r4;
|
||||
union fw_coiscsi_tgt_conn_tcp_addr {
|
||||
struct fw_coiscsi_tgt_conn_tcp_in_addr {
|
||||
__be32 saddr;
|
||||
__be32 daddr;
|
||||
} in_addr;
|
||||
struct fw_coiscsi_tgt_conn_tcp_in_addr6 {
|
||||
__be64 saddr[2];
|
||||
__be64 daddr[2];
|
||||
} in_addr6;
|
||||
} u;
|
||||
} conn_tcp;
|
||||
__be32 flags_fin;
|
||||
union {
|
||||
struct fw_coiscsi_tgt_conn_tcp {
|
||||
__be16 in_sport;
|
||||
__be16 in_dport;
|
||||
__u8 wscale_wsen;
|
||||
__u8 r4[3];
|
||||
union fw_coiscsi_tgt_conn_tcp_addr {
|
||||
struct fw_coiscsi_tgt_conn_tcp_in_addr {
|
||||
__be32 saddr;
|
||||
__be32 daddr;
|
||||
} in_addr;
|
||||
struct fw_coiscsi_tgt_conn_tcp_in_addr6 {
|
||||
__be64 saddr[2];
|
||||
__be64 daddr[2];
|
||||
} in_addr6;
|
||||
} u;
|
||||
} conn_tcp;
|
||||
struct fw_coiscsi_tgt_conn_stats {
|
||||
__be32 ddp_reqs;
|
||||
__be32 ddp_cmpls;
|
||||
__be16 ddp_aborts;
|
||||
__be16 ddp_bps;
|
||||
} stats;
|
||||
} u;
|
||||
struct fw_coiscsi_tgt_conn_iscsi {
|
||||
__be32 hdigest_to_ddp_pgsz;
|
||||
__be32 tgt_id;
|
||||
@ -2735,79 +2879,148 @@ struct fw_coiscsi_tgt_conn_wr {
|
||||
__be32 max_burst;
|
||||
__be32 max_rdsl;
|
||||
__be32 max_tdsl;
|
||||
__be32 nxt_sn;
|
||||
__be32 cur_sn;
|
||||
__be32 r6;
|
||||
} conn_iscsi;
|
||||
};
|
||||
|
||||
#define S_FW_COISCSI_TGT_CONN_WR_FIN 0
|
||||
#define M_FW_COISCSI_TGT_CONN_WR_FIN 0x1
|
||||
#define V_FW_COISCSI_TGT_CONN_WR_FIN(x) ((x) << S_FW_COISCSI_TGT_CONN_WR_FIN)
|
||||
#define G_FW_COISCSI_TGT_CONN_WR_FIN(x) \
|
||||
(((x) >> S_FW_COISCSI_TGT_CONN_WR_FIN) & M_FW_COISCSI_TGT_CONN_WR_FIN)
|
||||
#define F_FW_COISCSI_TGT_CONN_WR_FIN V_FW_COISCSI_TGT_CONN_WR_FIN(1U)
|
||||
|
||||
#define S_FW_COISCSI_TGT_CONN_WR_WSCALE 1
|
||||
#define M_FW_COISCSI_TGT_CONN_WR_WSCALE 0xf
|
||||
#define V_FW_COISCSI_TGT_CONN_WR_WSCALE(x) \
|
||||
((x) << S_FW_COISCSI_TGT_CONN_WR_WSCALE)
|
||||
#define G_FW_COISCSI_TGT_CONN_WR_WSCALE(x) \
|
||||
(((x) >> S_FW_COISCSI_TGT_CONN_WR_WSCALE) & \
|
||||
M_FW_COISCSI_TGT_CONN_WR_WSCALE)
|
||||
|
||||
#define S_FW_COISCSI_TGT_CONN_WR_WSEN 0
|
||||
#define M_FW_COISCSI_TGT_CONN_WR_WSEN 0x1
|
||||
#define V_FW_COISCSI_TGT_CONN_WR_WSEN(x) \
|
||||
((x) << S_FW_COISCSI_TGT_CONN_WR_WSEN)
|
||||
#define G_FW_COISCSI_TGT_CONN_WR_WSEN(x) \
|
||||
(((x) >> S_FW_COISCSI_TGT_CONN_WR_WSEN) & M_FW_COISCSI_TGT_CONN_WR_WSEN)
|
||||
#define F_FW_COISCSI_TGT_CONN_WR_WSEN V_FW_COISCSI_TGT_CONN_WR_WSEN(1U)
|
||||
|
||||
struct fw_coiscsi_tgt_xmit_wr {
|
||||
__be32 op_to_immdlen;
|
||||
__be32 flowid_len16;
|
||||
__be64 cookie;
|
||||
union {
|
||||
struct cmpl_stat {
|
||||
__be32 cmpl_status_pkd;
|
||||
} cs;
|
||||
struct flowid_len {
|
||||
__be32 flowid_len16;
|
||||
} fllen;
|
||||
} u;
|
||||
__u64 cookie;
|
||||
__be16 iq_id;
|
||||
__be16 r4;
|
||||
__be32 datasn;
|
||||
__be16 r3;
|
||||
__be32 pz_off;
|
||||
__be32 t_xfer_len;
|
||||
__be32 flags;
|
||||
__be32 tag;
|
||||
__be32 tidx;
|
||||
__be32 r5[2];
|
||||
union {
|
||||
__be32 tag;
|
||||
__be32 datasn;
|
||||
__be32 ddp_status;
|
||||
} cu;
|
||||
};
|
||||
|
||||
#define S_FW_COiSCSI_TGT_XMIT_WR_DDGST 23
|
||||
#define M_FW_COiSCSI_TGT_XMIT_WR_DDGST 0x1
|
||||
#define V_FW_COiSCSI_TGT_XMIT_WR_DDGST(x) \
|
||||
((x) << S_FW_COiSCSI_TGT_XMIT_WR_DDGST)
|
||||
#define G_FW_COiSCSI_TGT_XMIT_WR_DDGST(x) \
|
||||
(((x) >> S_FW_COiSCSI_TGT_XMIT_WR_DDGST) & M_FW_COiSCSI_TGT_XMIT_WR_DDGST)
|
||||
#define F_FW_COiSCSI_TGT_XMIT_WR_DDGST V_FW_COiSCSI_TGT_XMIT_WR_DDGST(1U)
|
||||
#define S_FW_COISCSI_TGT_XMIT_WR_DDGST 23
|
||||
#define M_FW_COISCSI_TGT_XMIT_WR_DDGST 0x1
|
||||
#define V_FW_COISCSI_TGT_XMIT_WR_DDGST(x) \
|
||||
((x) << S_FW_COISCSI_TGT_XMIT_WR_DDGST)
|
||||
#define G_FW_COISCSI_TGT_XMIT_WR_DDGST(x) \
|
||||
(((x) >> S_FW_COISCSI_TGT_XMIT_WR_DDGST) & M_FW_COISCSI_TGT_XMIT_WR_DDGST)
|
||||
#define F_FW_COISCSI_TGT_XMIT_WR_DDGST V_FW_COISCSI_TGT_XMIT_WR_DDGST(1U)
|
||||
|
||||
#define S_FW_COiSCSI_TGT_XMIT_WR_HDGST 22
|
||||
#define M_FW_COiSCSI_TGT_XMIT_WR_HDGST 0x1
|
||||
#define V_FW_COiSCSI_TGT_XMIT_WR_HDGST(x) \
|
||||
((x) << S_FW_COiSCSI_TGT_XMIT_WR_HDGST)
|
||||
#define G_FW_COiSCSI_TGT_XMIT_WR_HDGST(x) \
|
||||
(((x) >> S_FW_COiSCSI_TGT_XMIT_WR_HDGST) & M_FW_COiSCSI_TGT_XMIT_WR_HDGST)
|
||||
#define F_FW_COiSCSI_TGT_XMIT_WR_HDGST V_FW_COiSCSI_TGT_XMIT_WR_HDGST(1U)
|
||||
#define S_FW_COISCSI_TGT_XMIT_WR_HDGST 22
|
||||
#define M_FW_COISCSI_TGT_XMIT_WR_HDGST 0x1
|
||||
#define V_FW_COISCSI_TGT_XMIT_WR_HDGST(x) \
|
||||
((x) << S_FW_COISCSI_TGT_XMIT_WR_HDGST)
|
||||
#define G_FW_COISCSI_TGT_XMIT_WR_HDGST(x) \
|
||||
(((x) >> S_FW_COISCSI_TGT_XMIT_WR_HDGST) & M_FW_COISCSI_TGT_XMIT_WR_HDGST)
|
||||
#define F_FW_COISCSI_TGT_XMIT_WR_HDGST V_FW_COISCSI_TGT_XMIT_WR_HDGST(1U)
|
||||
|
||||
#define S_FW_COiSCSI_TGT_XMIT_WR_DDP 20
|
||||
#define M_FW_COiSCSI_TGT_XMIT_WR_DDP 0x1
|
||||
#define V_FW_COiSCSI_TGT_XMIT_WR_DDP(x) ((x) << S_FW_COiSCSI_TGT_XMIT_WR_DDP)
|
||||
#define G_FW_COiSCSI_TGT_XMIT_WR_DDP(x) \
|
||||
(((x) >> S_FW_COiSCSI_TGT_XMIT_WR_DDP) & M_FW_COiSCSI_TGT_XMIT_WR_DDP)
|
||||
#define F_FW_COiSCSI_TGT_XMIT_WR_DDP V_FW_COiSCSI_TGT_XMIT_WR_DDP(1U)
|
||||
#define S_FW_COISCSI_TGT_XMIT_WR_DDP 20
|
||||
#define M_FW_COISCSI_TGT_XMIT_WR_DDP 0x1
|
||||
#define V_FW_COISCSI_TGT_XMIT_WR_DDP(x) ((x) << S_FW_COISCSI_TGT_XMIT_WR_DDP)
|
||||
#define G_FW_COISCSI_TGT_XMIT_WR_DDP(x) \
|
||||
(((x) >> S_FW_COISCSI_TGT_XMIT_WR_DDP) & M_FW_COISCSI_TGT_XMIT_WR_DDP)
|
||||
#define F_FW_COISCSI_TGT_XMIT_WR_DDP V_FW_COISCSI_TGT_XMIT_WR_DDP(1U)
|
||||
|
||||
#define S_FW_COiSCSI_TGT_XMIT_WR_ABORT 19
|
||||
#define M_FW_COiSCSI_TGT_XMIT_WR_ABORT 0x1
|
||||
#define V_FW_COiSCSI_TGT_XMIT_WR_ABORT(x) \
|
||||
((x) << S_FW_COiSCSI_TGT_XMIT_WR_ABORT)
|
||||
#define G_FW_COiSCSI_TGT_XMIT_WR_ABORT(x) \
|
||||
(((x) >> S_FW_COiSCSI_TGT_XMIT_WR_ABORT) & M_FW_COiSCSI_TGT_XMIT_WR_ABORT)
|
||||
#define F_FW_COiSCSI_TGT_XMIT_WR_ABORT V_FW_COiSCSI_TGT_XMIT_WR_ABORT(1U)
|
||||
#define S_FW_COISCSI_TGT_XMIT_WR_ABORT 19
|
||||
#define M_FW_COISCSI_TGT_XMIT_WR_ABORT 0x1
|
||||
#define V_FW_COISCSI_TGT_XMIT_WR_ABORT(x) \
|
||||
((x) << S_FW_COISCSI_TGT_XMIT_WR_ABORT)
|
||||
#define G_FW_COISCSI_TGT_XMIT_WR_ABORT(x) \
|
||||
(((x) >> S_FW_COISCSI_TGT_XMIT_WR_ABORT) & M_FW_COISCSI_TGT_XMIT_WR_ABORT)
|
||||
#define F_FW_COISCSI_TGT_XMIT_WR_ABORT V_FW_COISCSI_TGT_XMIT_WR_ABORT(1U)
|
||||
|
||||
#define S_FW_COiSCSI_TGT_XMIT_WR_FINAL 18
|
||||
#define M_FW_COiSCSI_TGT_XMIT_WR_FINAL 0x1
|
||||
#define V_FW_COiSCSI_TGT_XMIT_WR_FINAL(x) \
|
||||
((x) << S_FW_COiSCSI_TGT_XMIT_WR_FINAL)
|
||||
#define G_FW_COiSCSI_TGT_XMIT_WR_FINAL(x) \
|
||||
(((x) >> S_FW_COiSCSI_TGT_XMIT_WR_FINAL) & M_FW_COiSCSI_TGT_XMIT_WR_FINAL)
|
||||
#define F_FW_COiSCSI_TGT_XMIT_WR_FINAL V_FW_COiSCSI_TGT_XMIT_WR_FINAL(1U)
|
||||
#define S_FW_COISCSI_TGT_XMIT_WR_FINAL 18
|
||||
#define M_FW_COISCSI_TGT_XMIT_WR_FINAL 0x1
|
||||
#define V_FW_COISCSI_TGT_XMIT_WR_FINAL(x) \
|
||||
((x) << S_FW_COISCSI_TGT_XMIT_WR_FINAL)
|
||||
#define G_FW_COISCSI_TGT_XMIT_WR_FINAL(x) \
|
||||
(((x) >> S_FW_COISCSI_TGT_XMIT_WR_FINAL) & M_FW_COISCSI_TGT_XMIT_WR_FINAL)
|
||||
#define F_FW_COISCSI_TGT_XMIT_WR_FINAL V_FW_COISCSI_TGT_XMIT_WR_FINAL(1U)
|
||||
|
||||
#define S_FW_COiSCSI_TGT_XMIT_WR_PADLEN 16
|
||||
#define M_FW_COiSCSI_TGT_XMIT_WR_PADLEN 0x3
|
||||
#define V_FW_COiSCSI_TGT_XMIT_WR_PADLEN(x) \
|
||||
((x) << S_FW_COiSCSI_TGT_XMIT_WR_PADLEN)
|
||||
#define G_FW_COiSCSI_TGT_XMIT_WR_PADLEN(x) \
|
||||
(((x) >> S_FW_COiSCSI_TGT_XMIT_WR_PADLEN) & \
|
||||
M_FW_COiSCSI_TGT_XMIT_WR_PADLEN)
|
||||
#define S_FW_COISCSI_TGT_XMIT_WR_PADLEN 16
|
||||
#define M_FW_COISCSI_TGT_XMIT_WR_PADLEN 0x3
|
||||
#define V_FW_COISCSI_TGT_XMIT_WR_PADLEN(x) \
|
||||
((x) << S_FW_COISCSI_TGT_XMIT_WR_PADLEN)
|
||||
#define G_FW_COISCSI_TGT_XMIT_WR_PADLEN(x) \
|
||||
(((x) >> S_FW_COISCSI_TGT_XMIT_WR_PADLEN) & \
|
||||
M_FW_COISCSI_TGT_XMIT_WR_PADLEN)
|
||||
|
||||
#define S_FW_COiSCSI_TGT_XMIT_WR_IMMDLEN 0
|
||||
#define M_FW_COiSCSI_TGT_XMIT_WR_IMMDLEN 0xff
|
||||
#define V_FW_COiSCSI_TGT_XMIT_WR_IMMDLEN(x) \
|
||||
((x) << S_FW_COiSCSI_TGT_XMIT_WR_IMMDLEN)
|
||||
#define G_FW_COiSCSI_TGT_XMIT_WR_IMMDLEN(x) \
|
||||
(((x) >> S_FW_COiSCSI_TGT_XMIT_WR_IMMDLEN) & \
|
||||
M_FW_COiSCSI_TGT_XMIT_WR_IMMDLEN)
|
||||
#define S_FW_COISCSI_TGT_XMIT_WR_INCSTATSN 15
|
||||
#define M_FW_COISCSI_TGT_XMIT_WR_INCSTATSN 0x1
|
||||
#define V_FW_COISCSI_TGT_XMIT_WR_INCSTATSN(x) \
|
||||
((x) << S_FW_COISCSI_TGT_XMIT_WR_INCSTATSN)
|
||||
#define G_FW_COISCSI_TGT_XMIT_WR_INCSTATSN(x) \
|
||||
(((x) >> S_FW_COISCSI_TGT_XMIT_WR_INCSTATSN) & \
|
||||
M_FW_COISCSI_TGT_XMIT_WR_INCSTATSN)
|
||||
#define F_FW_COISCSI_TGT_XMIT_WR_INCSTATSN \
|
||||
V_FW_COISCSI_TGT_XMIT_WR_INCSTATSN(1U)
|
||||
|
||||
#define S_FW_COISCSI_TGT_XMIT_WR_IMMDLEN 0
|
||||
#define M_FW_COISCSI_TGT_XMIT_WR_IMMDLEN 0xff
|
||||
#define V_FW_COISCSI_TGT_XMIT_WR_IMMDLEN(x) \
|
||||
((x) << S_FW_COISCSI_TGT_XMIT_WR_IMMDLEN)
|
||||
#define G_FW_COISCSI_TGT_XMIT_WR_IMMDLEN(x) \
|
||||
(((x) >> S_FW_COISCSI_TGT_XMIT_WR_IMMDLEN) & \
|
||||
M_FW_COISCSI_TGT_XMIT_WR_IMMDLEN)
|
||||
|
||||
#define S_FW_COISCSI_TGT_XMIT_WR_CMPL_STATUS 8
|
||||
#define M_FW_COISCSI_TGT_XMIT_WR_CMPL_STATUS 0xff
|
||||
#define V_FW_COISCSI_TGT_XMIT_WR_CMPL_STATUS(x) \
|
||||
((x) << S_FW_COISCSI_TGT_XMIT_WR_CMPL_STATUS)
|
||||
#define G_FW_COISCSI_TGT_XMIT_WR_CMPL_STATUS(x) \
|
||||
(((x) >> S_FW_COISCSI_TGT_XMIT_WR_CMPL_STATUS) & \
|
||||
M_FW_COISCSI_TGT_XMIT_WR_CMPL_STATUS)
|
||||
|
||||
struct fw_coiscsi_stats_wr {
|
||||
__be32 op_compl;
|
||||
__be32 flowid_len16;
|
||||
__u64 cookie;
|
||||
__u8 subop;
|
||||
__u8 status;
|
||||
union fw_coiscsi_stats {
|
||||
struct fw_coiscsi_resource {
|
||||
__u8 num_ipv4_tgt;
|
||||
__u8 num_ipv6_tgt;
|
||||
__be16 num_l2t_entries;
|
||||
__be16 num_csocks;
|
||||
__be16 num_tasks;
|
||||
__be16 num_ppods_zone[11];
|
||||
__be32 num_bufll64;
|
||||
__u8 r2[12];
|
||||
} rsrc;
|
||||
} u;
|
||||
};
|
||||
|
||||
struct fw_isns_wr {
|
||||
__be32 op_compl;
|
||||
@ -2816,7 +3029,8 @@ struct fw_isns_wr {
|
||||
__u8 subop;
|
||||
__u8 status;
|
||||
__be16 iq_id;
|
||||
__be32 r4;
|
||||
__be16 vlanid;
|
||||
__be16 r4;
|
||||
struct fw_tcp_conn_attr {
|
||||
__be32 in_tid;
|
||||
__be16 in_port;
|
||||
@ -2838,7 +3052,7 @@ struct fw_isns_wr {
|
||||
struct fw_isns_xmit_wr {
|
||||
__be32 op_to_immdlen;
|
||||
__be32 flowid_len16;
|
||||
__be64 cookie;
|
||||
__u64 cookie;
|
||||
__be16 iq_id;
|
||||
__be16 r4;
|
||||
__be32 xfer_len;
|
||||
@ -8289,7 +8503,7 @@ enum fw_devlog_facility {
|
||||
FW_DEVLOG_FACILITY_FOISCSI = 0x30,
|
||||
FW_DEVLOG_FACILITY_FOFCOE = 0x32,
|
||||
FW_DEVLOG_FACILITY_CHNET = 0x34,
|
||||
FW_DEVLOG_FACILITY_COiSCSI = 0x36,
|
||||
FW_DEVLOG_FACILITY_COISCSI = 0x36,
|
||||
FW_DEVLOG_FACILITY_MAX = 0x38,
|
||||
};
|
||||
|
||||
@ -8830,7 +9044,8 @@ struct fw_dcb_ieee_cmd {
|
||||
} dcbx_app_stats;
|
||||
struct fw_dcbx_control {
|
||||
__be32 multi_peer_invalidated;
|
||||
__be32 r5_lo;
|
||||
__u8 version;
|
||||
__u8 r6[3];
|
||||
} dcbx_control;
|
||||
} u;
|
||||
};
|
||||
@ -9383,17 +9598,17 @@ enum fw_hdr_chip {
|
||||
enum {
|
||||
T4FW_VERSION_MAJOR = 0x01,
|
||||
T4FW_VERSION_MINOR = 0x10,
|
||||
T4FW_VERSION_MICRO = 0x3b,
|
||||
T4FW_VERSION_MICRO = 0x3f,
|
||||
T4FW_VERSION_BUILD = 0x00,
|
||||
|
||||
T5FW_VERSION_MAJOR = 0x01,
|
||||
T5FW_VERSION_MINOR = 0x10,
|
||||
T5FW_VERSION_MICRO = 0x3b,
|
||||
T5FW_VERSION_MICRO = 0x3f,
|
||||
T5FW_VERSION_BUILD = 0x00,
|
||||
|
||||
T6FW_VERSION_MAJOR = 0x01,
|
||||
T6FW_VERSION_MINOR = 0x10,
|
||||
T6FW_VERSION_MICRO = 0x3b,
|
||||
T6FW_VERSION_MICRO = 0x3f,
|
||||
T6FW_VERSION_BUILD = 0x00,
|
||||
};
|
||||
|
||||
@ -9460,5 +9675,16 @@ struct fw_ephy_hdr {
|
||||
enum {
|
||||
FW_EPHY_HDR_MAGIC = 0x65706879,
|
||||
};
|
||||
|
||||
struct fw_ifconf_dhcp_info {
|
||||
__be32 addr;
|
||||
__be32 mask;
|
||||
__be16 vlanid;
|
||||
__be16 mtu;
|
||||
__be32 gw;
|
||||
__u8 op;
|
||||
__u8 len;
|
||||
__u8 data[270];
|
||||
};
|
||||
|
||||
#endif /* _T4FW_INTERFACE_H_ */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
11265
sys/dev/cxgbe/firmware/t5fw-1.16.63.0.bin.uu
Normal file
11265
sys/dev/cxgbe/firmware/t5fw-1.16.63.0.bin.uu
Normal file
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
12037
sys/dev/cxgbe/firmware/t6fw-1.16.63.0.bin.uu
Normal file
12037
sys/dev/cxgbe/firmware/t6fw-1.16.63.0.bin.uu
Normal file
File diff suppressed because it is too large
Load Diff
@ -109,6 +109,7 @@
|
||||
# filter tuples : fragmentation, mpshittype, macmatch, ethertype,
|
||||
# protocol, tos, vlan, vnic_id, port, fcoe
|
||||
# valid filterModes are described the Terminator 5 Data Book
|
||||
# vnicMode = pf_vf #default. Other values are outer_vlan, encapsulation
|
||||
filterMode = fcoemask, srvrsram, fragmentation, mpshittype, protocol, vlan, port, fcoe
|
||||
|
||||
# filter tuples enforced in LE active region (equal to or subset of filterMode)
|
||||
@ -178,6 +179,10 @@
|
||||
# MC configuration
|
||||
#mc_mode_brc[0] = 1 # mc0 - 1: enable BRC, 0: enable RBC
|
||||
|
||||
# HMA configuration
|
||||
hma_size = 64 # Size (in MBs) of host memory expected
|
||||
hma_regions = stag,pbl,rq # What all regions to place in host memory
|
||||
|
||||
# Some "definitions" to make the rest of this a bit more readable. We support
|
||||
# 4 ports, 3 functions (NIC, FCoE and iSCSI), scaling up to 8 "CPU Queue Sets"
|
||||
# per function per port ...
|
||||
@ -565,8 +570,8 @@
|
||||
dcb_app_tlv[2] = 3260, socketnum, 5
|
||||
|
||||
[fini]
|
||||
version = 0x01000028
|
||||
checksum = 0x4f820cc6
|
||||
version = 0x1425001c
|
||||
checksum = 0x8136d0f8
|
||||
|
||||
# Total resources used by above allocations:
|
||||
# Virtual Interfaces: 104
|
||||
|
||||
@ -17,7 +17,7 @@ FIRMWS+= ${F}:${F:C/.txt//}:1.0.0.0
|
||||
.endif
|
||||
.endfor
|
||||
|
||||
T4FW_VER= 1.16.59.0
|
||||
T4FW_VER= 1.16.63.0
|
||||
FIRMWS+= t4fw.fw:t4fw:${T4FW_VER}
|
||||
CLEANFILES+= t4fw.fw
|
||||
|
||||
|
||||
@ -17,7 +17,7 @@ FIRMWS+= ${F}:${F:C/.txt//}:1.0.0.0
|
||||
.endif
|
||||
.endfor
|
||||
|
||||
T5FW_VER= 1.16.59.0
|
||||
T5FW_VER= 1.16.63.0
|
||||
FIRMWS+= t5fw.fw:t5fw:${T5FW_VER}
|
||||
CLEANFILES+= t5fw.fw
|
||||
|
||||
|
||||
@ -17,7 +17,7 @@ FIRMWS+= ${F}:${F:C/.txt//}:1.0.0.0
|
||||
.endif
|
||||
.endfor
|
||||
|
||||
T6FW_VER= 1.16.59.0
|
||||
T6FW_VER= 1.16.63.0
|
||||
FIRMWS+= t6fw.fw:t6fw:${T6FW_VER}
|
||||
CLEANFILES+= t6fw.fw
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user