diff --git a/lib/msun/amd64/fenv.c b/lib/msun/amd64/fenv.c
index bcb0ea7bda3e..e964be8660ce 100644
--- a/lib/msun/amd64/fenv.c
+++ b/lib/msun/amd64/fenv.c
@@ -60,12 +60,12 @@ fesetexceptflag(const fexcept_t *flagp, int excepts)
 	__fnstenv(&env.__x87);
 	env.__x87.__status &= ~excepts;
 	env.__x87.__status |= *flagp & excepts;
-	__fldenv(env.__x87);
+	__fldenv(&env.__x87);
 
 	__stmxcsr(&env.__mxcsr);
 	env.__mxcsr &= ~excepts;
 	env.__mxcsr |= *flagp & excepts;
-	__ldmxcsr(env.__mxcsr);
+	__ldmxcsr(&env.__mxcsr);
 
 	return (0);
 }
@@ -94,7 +94,7 @@ fegetenv(fenv_t *envp)
 	 * fnstenv masks all exceptions, so we need to restore the
 	 * control word to avoid this side effect.
 	 */
-	__fldcw(envp->__x87.__control);
+	__fldcw(&envp->__x87.__control);
 	return (0);
 }
 
@@ -109,7 +109,7 @@ feholdexcept(fenv_t *envp)
 	envp->__mxcsr = mxcsr;
 	mxcsr &= ~FE_ALL_EXCEPT;
 	mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT;
-	__ldmxcsr(mxcsr);
+	__ldmxcsr(&mxcsr);
 	return (0);
 }
 
@@ -139,9 +139,9 @@ __feenableexcept(int mask)
 	__stmxcsr(&mxcsr);
 	omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
 	control &= ~mask;
-	__fldcw(control);
+	__fldcw(&control);
 	mxcsr &= ~(mask << _SSE_EMASK_SHIFT);
-	__ldmxcsr(mxcsr);
+	__ldmxcsr(&mxcsr);
 	return (omask);
 }
 
@@ -156,9 +156,9 @@ __fedisableexcept(int mask)
 	__stmxcsr(&mxcsr);
 	omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
 	control |= mask;
-	__fldcw(control);
+	__fldcw(&control);
 	mxcsr |= mask << _SSE_EMASK_SHIFT;
-	__ldmxcsr(mxcsr);
+	__ldmxcsr(&mxcsr);
 	return (omask);
 }
 
diff --git a/lib/msun/i387/fenv.c b/lib/msun/i387/fenv.c
index 80cfa1e8f2c4..3ff9f8cc3f42 100644
--- a/lib/msun/i387/fenv.c
+++ b/lib/msun/i387/fenv.c
@@ -103,13 +103,13 @@ fesetexceptflag(const fexcept_t *flagp, int excepts)
 	__fnstenv(&env);
 	env.__status &= ~excepts;
 	env.__status |= *flagp & excepts;
-	__fldenv(env);
+	__fldenv(&env);
 
 	if (__HAS_SSE()) {
 		__stmxcsr(&mxcsr);
 		mxcsr &= ~excepts;
 		mxcsr |= *flagp & excepts;
-		__ldmxcsr(mxcsr);
+		__ldmxcsr(&mxcsr);
 	}
 
 	return (0);
@@ -139,7 +139,7 @@ fegetenv(fenv_t *envp)
 	 * fnstenv masks all exceptions, so we need to restore
 	 * the old control word to avoid this side effect.
 	 */
-	__fldcw(envp->__control);
+	__fldcw(&envp->__control);
 	if (__HAS_SSE()) {
 		__stmxcsr(&mxcsr);
 		__set_mxcsr(*envp, mxcsr);
@@ -159,7 +159,7 @@ feholdexcept(fenv_t *envp)
 		__set_mxcsr(*envp, mxcsr);
 		mxcsr &= ~FE_ALL_EXCEPT;
 		mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT;
-		__ldmxcsr(mxcsr);
+		__ldmxcsr(&mxcsr);
 	}
 	return (0);
 }
@@ -196,10 +196,10 @@ __feenableexcept(int mask)
 		mxcsr = 0;
 	omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
 	control &= ~mask;
-	__fldcw(control);
+	__fldcw(&control);
 	if (__HAS_SSE()) {
 		mxcsr &= ~(mask << _SSE_EMASK_SHIFT);
-		__ldmxcsr(mxcsr);
+		__ldmxcsr(&mxcsr);
 	}
 	return (omask);
 }
@@ -218,10 +218,10 @@ __fedisableexcept(int mask)
 		mxcsr = 0;
 	omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
 	control |= mask;
-	__fldcw(control);
+	__fldcw(&control);
 	if (__HAS_SSE()) {
 		mxcsr |= mask << _SSE_EMASK_SHIFT;
-		__ldmxcsr(mxcsr);
+		__ldmxcsr(&mxcsr);
 	}
 	return (omask);
 }
diff --git a/lib/msun/tests/Makefile b/lib/msun/tests/Makefile
index 121c106c1e8e..949b0a5b7aad 100644
--- a/lib/msun/tests/Makefile
+++ b/lib/msun/tests/Makefile
@@ -84,10 +84,6 @@ SRCS.ilogb2_test=	ilogb_test.c
 
 LIBADD+=	m
 
-.if ${MACHINE_CPUARCH} == "i386"
-# XXX: __fldcw macro mismatch between fenv.h and ieeefp.h .
-CWARNFLAGS.clang+=	-Wno-error=macro-redefined
-.endif
 WARNS?=		1
 
 # Copied from lib/msun/Makefile
diff --git a/lib/msun/x86/fenv.h b/lib/msun/x86/fenv.h
index a4270be8d6da..bb37998e0c77 100644
--- a/lib/msun/x86/fenv.h
+++ b/lib/msun/x86/fenv.h
@@ -33,6 +33,7 @@
 
 #include <sys/cdefs.h>
 #include <sys/_types.h>
+#include <ieeefp.h>
 
 #ifndef	__fenv_static
 #define	__fenv_static	static
@@ -97,18 +98,10 @@ __BEGIN_DECLS
 extern const fenv_t	__fe_dfl_env;
 #define	FE_DFL_ENV	(&__fe_dfl_env)
 
-#define	__fldcw(__cw)		__asm __volatile("fldcw %0" : : "m" (__cw))
-#define	__fldenv(__env)		__asm __volatile("fldenv %0" : : "m" (__env))
 #define	__fldenvx(__env)	__asm __volatile("fldenv %0" : : "m" (__env)  \
 				: "st", "st(1)", "st(2)", "st(3)", "st(4)",   \
 				"st(5)", "st(6)", "st(7)")
-#define	__fnclex()		__asm __volatile("fnclex")
-#define	__fnstenv(__env)	__asm __volatile("fnstenv %0" : "=m" (*(__env)))
-#define	__fnstcw(__cw)		__asm __volatile("fnstcw %0" : "=m" (*(__cw)))
-#define	__fnstsw(__sw)		__asm __volatile("fnstsw %0" : "=am" (*(__sw)))
 #define	__fwait()		__asm __volatile("fwait")
-#define	__ldmxcsr(__csr)	__asm __volatile("ldmxcsr %0" : : "m" (__csr))
-#define	__stmxcsr(__csr)	__asm __volatile("stmxcsr %0" : "=m" (*(__csr)))
 
 int fegetenv(fenv_t *__envp);
 int feholdexcept(fenv_t *__envp);
@@ -183,12 +176,12 @@ feclearexcept(int __excepts)
 	} else {
 		__fnstenv(&__env);
 		__env.__status &= ~__excepts;
-		__fldenv(__env);
+		__fldenv(&__env);
 	}
 	if (__HAS_SSE()) {
 		__stmxcsr(&__mxcsr);
 		__mxcsr &= ~__excepts;
-		__ldmxcsr(__mxcsr);
+		__ldmxcsr(&__mxcsr);
 	}
 	return (0);
 }
@@ -234,13 +227,13 @@ fesetround(int __round)
 	__fnstcw(&__control);
 	__control &= ~_ROUND_MASK;
 	__control |= __round;
-	__fldcw(__control);
+	__fldcw(&__control);
 
 	if (__HAS_SSE()) {
 		__stmxcsr(&__mxcsr);
 		__mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
 		__mxcsr |= __round << _SSE_ROUND_SHIFT;
-		__ldmxcsr(__mxcsr);
+		__ldmxcsr(&__mxcsr);
 	}
 
 	return (0);
@@ -264,7 +257,7 @@ fesetenv(const fenv_t *__envp)
 	 */
 	__fldenvx(__env);
 	if (__HAS_SSE())
-		__ldmxcsr(__mxcsr);
+		__ldmxcsr(&__mxcsr);
 	return (0);
 }
 
@@ -280,11 +273,11 @@ feclearexcept(int __excepts)
 	} else {
 		__fnstenv(&__env.__x87);
 		__env.__x87.__status &= ~__excepts;
-		__fldenv(__env.__x87);
+		__fldenv(&__env.__x87);
 	}
 	__stmxcsr(&__env.__mxcsr);
 	__env.__mxcsr &= ~__excepts;
-	__ldmxcsr(__env.__mxcsr);
+	__ldmxcsr(&__env.__mxcsr);
 	return (0);
 }
 
@@ -323,12 +316,12 @@ fesetround(int __round)
 	__fnstcw(&__control);
 	__control &= ~_ROUND_MASK;
 	__control |= __round;
-	__fldcw(__control);
+	__fldcw(&__control);
 
 	__stmxcsr(&__mxcsr);
 	__mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
 	__mxcsr |= __round << _SSE_ROUND_SHIFT;
-	__ldmxcsr(__mxcsr);
+	__ldmxcsr(&__mxcsr);
 
 	return (0);
 }
@@ -346,7 +339,7 @@ fesetenv(const fenv_t *__envp)
 	 * inlined, so we need to be more careful.
 	 */
 	__fldenvx(__envp->__x87);
-	__ldmxcsr(__envp->__mxcsr);
+	__ldmxcsr(&__envp->__mxcsr);
 	return (0);
 }
 
diff --git a/sys/amd64/include/ieeefp.h b/sys/amd64/include/ieeefp.h
index df2263098f46..b2423eb00ed3 100644
--- a/sys/amd64/include/ieeefp.h
+++ b/sys/amd64/include/ieeefp.h
@@ -130,6 +130,7 @@ typedef enum {
 
 #define	__fldcw(addr)	__asm __volatile("fldcw %0" : : "m" (*(addr)))
 #define	__fldenv(addr)	__asm __volatile("fldenv %0" : : "m" (*(addr)))
+#define	__fnclex()	__asm __volatile("fnclex")
 #define	__fnstcw(addr)	__asm __volatile("fnstcw %0" : "=m" (*(addr)))
 #define	__fnstenv(addr)	__asm __volatile("fnstenv %0" : "=m" (*(addr)))
 #define	__fnstsw(addr)	__asm __volatile("fnstsw %0" : "=m" (*(addr)))
diff --git a/sys/i386/include/ieeefp.h b/sys/i386/include/ieeefp.h
index 9ece4e968c7b..0ab8fe9259dd 100644
--- a/sys/i386/include/ieeefp.h
+++ b/sys/i386/include/ieeefp.h
@@ -116,6 +116,8 @@ typedef enum {
 #define	__fnstcw(addr)	__asm __volatile("fnstcw %0" : "=m" (*(addr)))
 #define	__fnstenv(addr)	__asm __volatile("fnstenv %0" : "=m" (*(addr)))
 #define	__fnstsw(addr)	__asm __volatile("fnstsw %0" : "=m" (*(addr)))
+#define	__ldmxcsr(addr)	__asm __volatile("ldmxcsr %0" : : "m" (*(addr)))
+#define	__stmxcsr(addr)	__asm __volatile("stmxcsr %0" : "=m" (*(addr)))
 
 /*
  * Load the control word.  Be careful not to trap if there is a currently