Merge in Cavium's CF driver. This too is in the wrong place and will
be moved.
This commit is contained in:
imp
parent
90bffc72d4
commit
b507305dcb
619
sys/dev/flash/octeon_ebt3000_cf.c
Normal file
619
sys/dev/flash/octeon_ebt3000_cf.c
Normal file
@ -0,0 +1,619 @@
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/*
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* octeon_ebt3000_cf.c
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bio.h>
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#include <sys/systm.h>
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#include <sys/sysctl.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/power.h>
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#include <sys/smp.h>
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#include <sys/time.h>
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#include <sys/timetc.h>
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#include <sys/malloc.h>
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#include <geom/geom.h>
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#include <machine/clock.h>
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#include <machine/locore.h>
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#include <machine/md_var.h>
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#include <machine/cpuregs.h>
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#include "octeon_ebt3000_cf.h"
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#include "driveid.h"
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/* ATA Commands */
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#define CMD_READ_SECTOR 0x20
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#define CMD_WRITE_SECTOR 0x30
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#define CMD_IDENTIFY 0xEC
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/* The ATA Task File */
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#define TF_DATA 0x00
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#define TF_ERROR 0x01
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#define TF_PRECOMP 0x01
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#define TF_SECTOR_COUNT 0x02
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#define TF_SECTOR_NUMBER 0x03
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#define TF_CYL_LSB 0x04
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#define TF_CYL_MSB 0x05
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#define TF_DRV_HEAD 0x06
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#define TF_STATUS 0x07
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#define TF_COMMAND 0x07
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/* Status Register */
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#define STATUS_BSY 0x80 /* Drive is busy */
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#define STATUS_RDY 0x40 /* Drive is ready */
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#define STATUS_DRQ 0x08 /* Data can be transferred */
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/* Miscelaneous */
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#define SECTOR_SIZE 512
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#define WAIT_DELAY 1000
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#define NR_TRIES 1000
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#define SWAP_SHORT(x) ((x << 8) | (x >> 8))
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#define SWAP_LONG(x) (((x << 24) & 0xFF000000) | ((x << 8) & 0x00FF0000) | \
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((x >> 8) & 0x0000FF00) | ((x << 24) & 0x000000FF) )
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#define MODEL_STR_SIZE 40
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/* Globals */
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int bus_width;
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void *base_addr;
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/* Device softc */
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struct cf_priv {
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device_t dev;
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struct drive_param *drive_param;
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struct bio_queue_head cf_bq;
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struct g_geom *cf_geom;
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struct g_provider *cf_provider;
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};
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/* Device parameters */
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struct drive_param{
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union {
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char buf[SECTOR_SIZE];
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struct hd_driveid driveid;
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} u;
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char model[MODEL_STR_SIZE];
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uint32_t nr_sectors;
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uint16_t sector_size;
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uint16_t heads;
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uint16_t tracks;
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uint16_t sec_track;
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} drive_param;
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/* GEOM class implementation */
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static g_access_t cf_access;
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static g_start_t cf_start;
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static g_ioctl_t cf_ioctl;
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struct g_class g_cf_class = {
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.name = "CF",
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.version = G_VERSION,
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.start = cf_start,
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.access = cf_access,
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.ioctl = cf_ioctl,
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};
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/* Device methods */
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static int cf_probe(device_t);
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static void cf_identify(driver_t *, device_t);
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static int cf_attach(device_t);
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static int cf_attach_geom(void *, int);
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/* ATA methods */
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static void cf_cmd_identify(void);
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static void cf_cmd_write(uint32_t, uint32_t, void *);
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static void cf_cmd_read(uint32_t, uint32_t, void *);
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static void cf_wait_busy(void);
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static void cf_send_cmd(uint32_t, uint8_t);
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static void cf_attach_geom_proxy(void *arg, int flag);
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/* Miscelenous */
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static void cf_swap_ascii(unsigned char[], char[]);
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/* ------------------------------------------------------------------- *
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* cf_access() *
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* ------------------------------------------------------------------- */
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static int cf_access (struct g_provider *pp, int r, int w, int e)
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{
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pp->sectorsize = drive_param.sector_size;
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pp->stripesize = drive_param.heads * drive_param.sec_track * drive_param.sector_size;
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pp->mediasize = pp->stripesize * drive_param.tracks;
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return (0);
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}
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/* ------------------------------------------------------------------- *
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* cf_start() *
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* ------------------------------------------------------------------- */
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static void cf_start (struct bio *bp)
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{
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/*
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* Handle actual I/O requests. The request is passed down through
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* the bio struct.
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*/
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if(bp->bio_cmd & BIO_GETATTR) {
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if (g_handleattr_int(bp, "GEOM::fwsectors", drive_param.sec_track))
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return;
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if (g_handleattr_int(bp, "GEOM::fwheads", drive_param.heads))
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return;
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g_io_deliver(bp, ENOIOCTL);
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return;
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}
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if ((bp->bio_cmd & (BIO_READ | BIO_WRITE))) {
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if (bp->bio_cmd & BIO_READ) {
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cf_cmd_read(bp->bio_length / drive_param.sector_size,
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bp->bio_offset / drive_param.sector_size, bp->bio_data);
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} else if (bp->bio_cmd & BIO_WRITE) {
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cf_cmd_write(bp->bio_length / drive_param.sector_size,
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bp->bio_offset/drive_param.sector_size, bp->bio_data);
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}
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bp->bio_resid = 0;
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bp->bio_completed = bp->bio_length;
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g_io_deliver(bp, 0);
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}
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}
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static int cf_ioctl (struct g_provider *pp, u_long cmd, void *data, int fflag, struct thread *td)
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{
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return (0);
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}
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/* ------------------------------------------------------------------- *
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* cf_cmd_read() *
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* ------------------------------------------------------------------- *
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*
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* Read nr_sectors from the device starting from start_sector.
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*/
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static void cf_cmd_read (uint32_t nr_sectors, uint32_t start_sector, void *buf)
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{
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unsigned long lba;
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uint32_t count;
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uint16_t *ptr_16;
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uint8_t *ptr_8;
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//#define OCTEON_VISUAL_CF_0 1
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#ifdef OCTEON_VISUAL_CF_0
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octeon_led_write_char(0, 'R');
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#endif
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ptr_8 = (uint8_t*)buf;
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ptr_16 = (uint16_t*)buf;
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lba = start_sector;
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while (nr_sectors--) {
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cf_send_cmd(lba, CMD_READ_SECTOR);
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if (bus_width == 8) {
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volatile uint8_t *task_file = (volatile uint8_t*)base_addr;
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volatile uint8_t dummy;
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for (count = 0; count < SECTOR_SIZE; count++) {
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*ptr_8++ = task_file[TF_DATA];
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if ((count & 0xf) == 0) dummy = task_file[TF_STATUS];
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}
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} else {
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volatile uint16_t *task_file = (volatile uint16_t*)base_addr;
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volatile uint16_t dummy;
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for (count = 0; count < SECTOR_SIZE; count+=2) {
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uint16_t temp;
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temp = task_file[TF_DATA];
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*ptr_16++ = SWAP_SHORT(temp);
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if ((count & 0xf) == 0) dummy = task_file[TF_STATUS/2];
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}
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}
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lba ++;
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}
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#ifdef OCTEON_VISUAL_CF_0
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octeon_led_write_char(0, ' ');
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#endif
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}
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/* ------------------------------------------------------------------- *
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* cf_cmd_write() *
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* ------------------------------------------------------------------- *
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*
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* Write nr_sectors to the device starting from start_sector.
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*/
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static void cf_cmd_write (uint32_t nr_sectors, uint32_t start_sector, void *buf)
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{
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uint32_t lba;
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uint32_t count;
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uint16_t *ptr_16;
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uint8_t *ptr_8;
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//#define OCTEON_VISUAL_CF_1 1
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#ifdef OCTEON_VISUAL_CF_1
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octeon_led_write_char(1, 'W');
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#endif
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lba = start_sector;
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ptr_8 = (uint8_t*)buf;
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ptr_16 = (uint16_t*)buf;
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while (nr_sectors--) {
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cf_send_cmd(lba, CMD_WRITE_SECTOR);
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if (bus_width == 8) {
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volatile uint8_t *task_file;
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volatile uint8_t dummy;
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task_file = (volatile uint8_t *) base_addr;
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for (count = 0; count < SECTOR_SIZE; count++) {
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task_file[TF_DATA] = *ptr_8++;
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if ((count & 0xf) == 0) dummy = task_file[TF_STATUS];
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}
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} else {
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volatile uint16_t *task_file;
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volatile uint16_t dummy;
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task_file = (volatile uint16_t *) base_addr;
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for (count = 0; count < SECTOR_SIZE; count+=2) {
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uint16_t temp = *ptr_16++;
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task_file[TF_DATA] = SWAP_SHORT(temp);
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if ((count & 0xf) == 0) dummy = task_file[TF_STATUS/2];
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}
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}
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lba ++;
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}
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#ifdef OCTEON_VISUAL_CF_1
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octeon_led_write_char(1, ' ');
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#endif
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}
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/* ------------------------------------------------------------------- *
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* cf_cmd_identify() *
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* ------------------------------------------------------------------- *
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*
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* Read parameters and other information from the drive and store
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* it in the drive_param structure
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*
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*/
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static void cf_cmd_identify (void)
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{
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int count;
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uint8_t status;
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if (bus_width == 8) {
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volatile uint8_t *task_file;
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task_file = (volatile uint8_t *) base_addr;
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while ((status = task_file[TF_STATUS]) & STATUS_BSY) {
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DELAY(WAIT_DELAY);
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}
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task_file[TF_SECTOR_COUNT] = 0;
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task_file[TF_SECTOR_NUMBER] = 0;
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task_file[TF_CYL_LSB] = 0;
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task_file[TF_CYL_MSB] = 0;
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task_file[TF_DRV_HEAD] = 0;
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task_file[TF_COMMAND] = CMD_IDENTIFY;
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cf_wait_busy();
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for (count = 0; count < SECTOR_SIZE; count++)
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drive_param.u.buf[count] = task_file[TF_DATA];
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} else {
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volatile uint16_t *task_file;
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task_file = (volatile uint16_t *) base_addr;
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while ((status = (task_file[TF_STATUS/2]>>8)) & STATUS_BSY) {
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DELAY(WAIT_DELAY);
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}
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task_file[TF_SECTOR_COUNT/2] = 0; /* this includes TF_SECTOR_NUMBER */
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task_file[TF_CYL_LSB/2] = 0; /* this includes TF_CYL_MSB */
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task_file[TF_DRV_HEAD/2] = 0 | (CMD_IDENTIFY<<8); /* this includes TF_COMMAND */
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cf_wait_busy();
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for (count = 0; count < SECTOR_SIZE; count+=2) {
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uint16_t temp;
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temp = task_file[TF_DATA];
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/* endianess will be swapped below */
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drive_param.u.buf[count] = (temp & 0xff);
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drive_param.u.buf[count+1] = (temp & 0xff00)>>8;
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}
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}
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cf_swap_ascii(drive_param.u.driveid.model, drive_param.model);
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drive_param.sector_size = 512; //= SWAP_SHORT (drive_param.u.driveid.sector_bytes);
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drive_param.heads = SWAP_SHORT (drive_param.u.driveid.cur_heads);
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drive_param.tracks = SWAP_SHORT (drive_param.u.driveid.cur_cyls);
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drive_param.sec_track = SWAP_SHORT (drive_param.u.driveid.cur_sectors);
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drive_param.nr_sectors = SWAP_LONG (drive_param.u.driveid.lba_capacity);
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}
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/* ------------------------------------------------------------------- *
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* cf_send_cmd() *
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* ------------------------------------------------------------------- *
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*
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* Send command to read/write one sector specified by lba.
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*
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*/
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static void cf_send_cmd (uint32_t lba, uint8_t cmd)
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{
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uint8_t status;
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if (bus_width == 8) {
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volatile uint8_t *task_file;
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task_file = (volatile uint8_t *) base_addr;
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while ( (status = task_file[TF_STATUS]) & STATUS_BSY) {
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DELAY(WAIT_DELAY);
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}
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task_file[TF_SECTOR_COUNT] = 1;
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task_file[TF_SECTOR_NUMBER] = (lba & 0xff);
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task_file[TF_CYL_LSB] = ((lba >> 8) & 0xff);
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task_file[TF_CYL_MSB] = ((lba >> 16) & 0xff);
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task_file[TF_DRV_HEAD] = ((lba >> 24) & 0xff) | 0xe0;
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task_file[TF_COMMAND] = cmd;
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} else {
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volatile uint16_t *task_file;
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task_file = (volatile uint16_t *) base_addr;
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while ( (status = (task_file[TF_STATUS/2]>>8)) & STATUS_BSY) {
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DELAY(WAIT_DELAY);
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}
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task_file[TF_SECTOR_COUNT/2] = 1 | ((lba & 0xff) << 8);
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task_file[TF_CYL_LSB/2] = ((lba >> 8) & 0xff) | (((lba >> 16) & 0xff) << 8);
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task_file[TF_DRV_HEAD/2] = (((lba >> 24) & 0xff) | 0xe0) | (cmd << 8);
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}
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cf_wait_busy();
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}
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/* ------------------------------------------------------------------- *
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* cf_wait_busy() *
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* ------------------------------------------------------------------- *
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*
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* Wait until the drive finishes a given command and data is
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* ready to be transferred. This is done by repeatedly checking
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* the BSY and DRQ bits of the status register. When the controller
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* is ready for data transfer, it clears the BSY bit and sets the
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* DRQ bit.
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*
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*/
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static void cf_wait_busy (void)
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{
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uint8_t status;
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//#define OCTEON_VISUAL_CF_2 1
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#ifdef OCTEON_VISUAL_CF_2
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static int where0 = 0;
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octeon_led_run_wheel(&where0, 2);
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#endif
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if (bus_width == 8) {
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volatile uint8_t *task_file;
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task_file = (volatile uint8_t *)base_addr;
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status = task_file[TF_STATUS];
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while ((status & STATUS_BSY) == STATUS_BSY || (status & STATUS_DRQ) != STATUS_DRQ ) {
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DELAY(WAIT_DELAY);
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status = task_file[TF_STATUS];
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}
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} else {
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volatile uint16_t *task_file;
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task_file = (volatile uint16_t *)base_addr;
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status = task_file[TF_STATUS/2]>>8;
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while ((status & STATUS_BSY) == STATUS_BSY || (status & STATUS_DRQ) != STATUS_DRQ ) {
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DELAY(WAIT_DELAY);
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status = (uint8_t)(task_file[TF_STATUS/2]>>8);
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}
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}
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#ifdef OCTEON_VISUAL_CF_2
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octeon_led_write_char(2, ' ');
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#endif
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}
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/* ------------------------------------------------------------------- *
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* cf_swap_ascii() *
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* ------------------------------------------------------------------- *
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*
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* The ascii string returned by the controller specifying
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* the model of the drive is byte-swaped. This routine
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* corrects the byte ordering.
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*
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*/
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static void cf_swap_ascii (unsigned char str1[], char str2[])
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{
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int i;
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for(i = 0; i < MODEL_STR_SIZE; i++) {
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str2[i] = str1[i^1];
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}
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}
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/* ------------------------------------------------------------------- *
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* cf_probe() *
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* ------------------------------------------------------------------- */
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static int cf_probe (device_t dev)
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{
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if (!octeon_board_real()) return 1;
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if (device_get_unit(dev) != 0) {
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panic("can't attach more devices\n");
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}
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device_set_desc(dev, "Octeon Compact Flash Driver");
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cf_cmd_identify();
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return (0);
|
||||
}
|
||||
|
||||
/* ------------------------------------------------------------------- *
|
||||
* cf_identify() *
|
||||
* ------------------------------------------------------------------- *
|
||||
*
|
||||
* Find the bootbus region for the CF to determine
|
||||
* 16 or 8 bit and check to see if device is
|
||||
* inserted.
|
||||
*
|
||||
*/
|
||||
static void cf_identify (driver_t *drv, device_t parent)
|
||||
{
|
||||
uint8_t status;
|
||||
int bus_region;
|
||||
int count = 0;
|
||||
octeon_mio_boot_reg_cfgx_t cfg;
|
||||
|
||||
|
||||
if (!octeon_board_real()) return 1;
|
||||
|
||||
base_addr = (void *) OCTEON_PHYS2PTR(OCTEON_CF_COMMON_BASE_ADDR);
|
||||
|
||||
for (bus_region = 0; bus_region < 8; bus_region++)
|
||||
{
|
||||
cfg.word64 = oct_read64(OCTEON_MIO_BOOT_REG_CFGX(bus_region));
|
||||
if (cfg.bits.base == OCTEON_CF_COMMON_BASE_ADDR >> 16)
|
||||
{
|
||||
bus_width = (cfg.bits.width) ? 16: 8;
|
||||
printf("Compact flash found in bootbus region %d (%d bit).\n", bus_region, bus_width);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (bus_width == 8) {
|
||||
volatile uint8_t *task_file;
|
||||
task_file = (volatile uint8_t *) base_addr;
|
||||
/* Check if CF is inserted */
|
||||
while ( (status = task_file[TF_STATUS]) & STATUS_BSY){
|
||||
if ((count++) == NR_TRIES ) {
|
||||
printf("Compact Flash not present\n");
|
||||
return;
|
||||
}
|
||||
DELAY(WAIT_DELAY);
|
||||
}
|
||||
} else {
|
||||
volatile uint16_t *task_file;
|
||||
task_file = (volatile uint16_t *) base_addr;
|
||||
/* Check if CF is inserted */
|
||||
while ( (status = (task_file[TF_STATUS/2]>>8)) & STATUS_BSY){
|
||||
if ((count++) == NR_TRIES ) {
|
||||
printf("Compact Flash not present\n");
|
||||
return;
|
||||
}
|
||||
DELAY(WAIT_DELAY);
|
||||
}
|
||||
}
|
||||
|
||||
BUS_ADD_CHILD(parent, 0, "cf", 0);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------- *
|
||||
* cf_attach_geom() *
|
||||
* ------------------------------------------------------------------- */
|
||||
|
||||
static int cf_attach_geom (void *arg, int flag)
|
||||
{
|
||||
struct cf_priv *cf_priv;
|
||||
|
||||
cf_priv = (struct cf_priv *) arg;
|
||||
cf_priv->cf_geom = g_new_geomf(&g_cf_class, "cf%d", device_get_unit(cf_priv->dev));
|
||||
cf_priv->cf_provider = g_new_providerf(cf_priv->cf_geom, cf_priv->cf_geom->name);
|
||||
cf_priv->cf_geom->softc = cf_priv;
|
||||
g_error_provider(cf_priv->cf_provider, 0);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/* ------------------------------------------------------------------- *
|
||||
* cf_attach_geom() *
|
||||
* ------------------------------------------------------------------- */
|
||||
static void cf_attach_geom_proxy (void *arg, int flag)
|
||||
{
|
||||
cf_attach_geom(arg, flag);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------- *
|
||||
* cf_attach() *
|
||||
* ------------------------------------------------------------------- */
|
||||
|
||||
static int cf_attach (device_t dev)
|
||||
{
|
||||
struct cf_priv *cf_priv;
|
||||
|
||||
if (!octeon_board_real()) return 1;
|
||||
|
||||
cf_priv = device_get_softc(dev);
|
||||
cf_priv->dev = dev;
|
||||
cf_priv->drive_param = &drive_param;
|
||||
|
||||
g_post_event(cf_attach_geom_proxy, cf_priv, M_WAITOK, NULL);
|
||||
bioq_init(&cf_priv->cf_bq);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static device_method_t cf_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, cf_probe),
|
||||
DEVMETHOD(device_identify, cf_identify),
|
||||
DEVMETHOD(device_attach, cf_attach),
|
||||
DEVMETHOD(device_detach, bus_generic_detach),
|
||||
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
||||
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t cf_driver = {
|
||||
"cf",
|
||||
cf_methods,
|
||||
sizeof(struct cf_priv)
|
||||
};
|
||||
|
||||
static devclass_t cf_devclass;
|
||||
|
||||
DRIVER_MODULE(cf, nexus, cf_driver, cf_devclass, 0, 0);
|
||||
|
||||
35
sys/dev/flash/octeon_ebt3000_cf.h
Normal file
35
sys/dev/flash/octeon_ebt3000_cf.h
Normal file
@ -0,0 +1,35 @@
|
||||
/*
|
||||
* octeon_ebt3000_cf.h
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __OCTEON_EBT3000_H__
|
||||
#define __OCTEON_EBT3000_H__
|
||||
|
||||
|
||||
|
||||
#define OCTEON_CF_COMMON_BASE_ADDR (0x1d000000 | (1 << 11))
|
||||
#define OCTEON_MIO_BOOT_REG_CFGX(offset) (0x8001180000000000ull + ((offset) * 8))
|
||||
|
||||
|
||||
typedef union
|
||||
{
|
||||
uint64_t word64;
|
||||
struct
|
||||
{
|
||||
uint64_t reserved : 27; /**< Reserved */
|
||||
uint64_t sam : 1; /**< Region 0 SAM */
|
||||
uint64_t we_ext : 2; /**< Region 0 write enable count extension */
|
||||
uint64_t oe_ext : 2; /**< Region 0 output enable count extension */
|
||||
uint64_t en : 1; /**< Region 0 enable */
|
||||
uint64_t orbit : 1; /**< No function for region 0 */
|
||||
uint64_t ale : 1; /**< Region 0 ALE mode */
|
||||
uint64_t width : 1; /**< Region 0 bus width */
|
||||
uint64_t size : 12; /**< Region 0 size */
|
||||
uint64_t base : 16; /**< Region 0 base address */
|
||||
} bits;
|
||||
} octeon_mio_boot_reg_cfgx_t;
|
||||
|
||||
|
||||
#endif /* __OCTEON_EBT3000_H__ */
|
||||
Loading…
Reference in New Issue
Block a user