Start to remove _libc_arm_fpu_present checks. We don't support the VFP on
ARMv4 or ARMv5, and only support it when it's present on ARMv6 and later. As such always store the VFP register in setjmp and restore them in longjmp when building for armv6. Reviewed by: mmel Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D11393
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@ -61,25 +61,12 @@ __FBSDID("$FreeBSD$");
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ENTRY(_setjmp)
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ENTRY(_setjmp)
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ldr r1, .L_setjmp_magic
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ldr r1, .L_setjmp_magic
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#if !defined(_STANDALONE)
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#if !defined(_STANDALONE) && __ARM_ARCH >= 6
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ldr r2, .Lfpu_present
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#ifdef PIC
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GOT_INIT(r3, .L_setjmp_got, .L_setjmp_gotinit)
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ldr r2, [r2, r3]
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#else
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ldr r2, [r2]
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#endif
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teq r2, #0 /* do we have a FPU? */
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beq 1f /* no, don't save VFP registers */
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orr r1, r1, #(_JB_MAGIC__SETJMP ^ _JB_MAGIC__SETJMP_VFP)
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/* change magic to VFP magic */
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add r2, r0, #(_JB_REG_D8 * 4)
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add r2, r0, #(_JB_REG_D8 * 4)
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vstmia r2, {d8-d15}
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vstmia r2, {d8-d15}
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vmrs r2, fpscr
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vmrs r2, fpscr
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str r2, [r0, #(_JB_REG_FPSCR * 4)]
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str r2, [r0, #(_JB_REG_FPSCR * 4)]
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1:
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#endif /* !_STANDALONE && __ARM_ARCH >= 6 */
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#endif /* !_STANDALONE */
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str r1, [r0]
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str r1, [r0]
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@ -99,30 +86,20 @@ END(_setjmp)
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.L_setjmp_magic:
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.L_setjmp_magic:
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.word _JB_MAGIC__SETJMP
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.word _JB_MAGIC__SETJMP
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#if !defined(_STANDALONE)
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GOT_INITSYM(.L_setjmp_got, .L_setjmp_gotinit)
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.Lfpu_present:
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.word PIC_SYM(_libc_arm_fpu_present, GOTOFF)
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#endif /* !_STANDALONE */
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WEAK_ALIAS(___longjmp, _longjmp)
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WEAK_ALIAS(___longjmp, _longjmp)
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ENTRY(_longjmp)
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ENTRY(_longjmp)
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ldr r2, [r0] /* get magic from jmp_buf */
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ldr r2, [r0] /* get magic from jmp_buf */
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bic r3, r2, #(_JB_MAGIC__SETJMP ^ _JB_MAGIC__SETJMP_VFP)
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/* ignore VFP-ness of magic */
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ldr ip, .L_setjmp_magic /* load magic */
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ldr ip, .L_setjmp_magic /* load magic */
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teq ip, r3 /* magic correct? */
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teq ip, r2 /* magic correct? */
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bne botch /* no, botch */
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bne botch /* no, botch */
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#if !defined(_STANDALONE)
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#if !defined(_STANDALONE) && __ARM_ARCH >= 6
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teq r3, r2 /* did magic change? */
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beq 1f /* no, don't restore VFP */
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add ip, r0, #(_JB_REG_D8 * 4)
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add ip, r0, #(_JB_REG_D8 * 4)
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vldmia ip, {d8-d15}
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vldmia ip, {d8-d15}
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ldr ip, [r0, #(_JB_REG_FPSCR * 4)]
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ldr ip, [r0, #(_JB_REG_FPSCR * 4)]
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vmsr fpscr, ip
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vmsr fpscr, ip
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1:
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#endif /* !_STANDALONE && __ARM_ARCH >= 6 */
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#endif /* !_STANDALONE */
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add r0, r0, #(_JB_REG_R4 * 4)
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add r0, r0, #(_JB_REG_R4 * 4)
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/* Restore integer registers */
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/* Restore integer registers */
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@ -64,23 +64,12 @@ ENTRY(setjmp)
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ldr r1, .Lsetjmp_magic
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ldr r1, .Lsetjmp_magic
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ldr r2, .Lfpu_present
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#if __ARM_ARCH >= 6
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#ifdef PIC
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GOT_INIT(r3, .Lsetjmp_got, .Lsetjmp_gotinit)
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ldr r2, [r2, r3]
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#else
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ldr r2, [r2]
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#endif
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teq r2, #0 /* do we have a FPU? */
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beq 1f /* no, don't save VFP registers */
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orr r1, r1, #(_JB_MAGIC_SETJMP ^ _JB_MAGIC_SETJMP_VFP)
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/* change magic to VFP magic */
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add r2, r0, #(_JB_REG_D8 * 4)
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add r2, r0, #(_JB_REG_D8 * 4)
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vstmia r2, {d8-d15}
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vstmia r2, {d8-d15}
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vmrs r2, fpscr
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vmrs r2, fpscr
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str r2, [r0, #(_JB_REG_FPSCR * 4)]
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str r2, [r0, #(_JB_REG_FPSCR * 4)]
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1:
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#endif
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str r1, [r0] /* store magic */
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str r1, [r0] /* store magic */
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@ -98,9 +87,6 @@ ENTRY(setjmp)
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.Lsetjmp_magic:
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.Lsetjmp_magic:
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.word _JB_MAGIC_SETJMP
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.word _JB_MAGIC_SETJMP
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GOT_INITSYM(.Lsetjmp_got, .Lsetjmp_gotinit)
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.Lfpu_present:
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.word PIC_SYM(_libc_arm_fpu_present, GOTOFF)
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END(setjmp)
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END(setjmp)
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.weak _C_LABEL(longjmp)
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.weak _C_LABEL(longjmp)
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@ -108,8 +94,7 @@ END(setjmp)
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ENTRY(__longjmp)
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ENTRY(__longjmp)
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ldr r2, [r0]
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ldr r2, [r0]
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ldr ip, .Lsetjmp_magic
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ldr ip, .Lsetjmp_magic
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bic r3, r2, #(_JB_MAGIC_SETJMP ^ _JB_MAGIC_SETJMP_VFP)
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teq r2, ip
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teq r3, ip
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bne .Lbotch
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bne .Lbotch
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/* Restore the signal mask. */
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/* Restore the signal mask. */
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@ -120,14 +105,12 @@ ENTRY(__longjmp)
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bl PIC_SYM(_C_LABEL(sigprocmask), PLT)
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bl PIC_SYM(_C_LABEL(sigprocmask), PLT)
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ldmfd sp!, {r0-r2, r14}
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ldmfd sp!, {r0-r2, r14}
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tst r2, #(_JB_MAGIC_SETJMP ^ _JB_MAGIC_SETJMP_VFP)
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#if __ARM_ARCH >= 6
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/* is this a VFP magic? */
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beq 1f /* no, don't restore VFP */
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add ip, r0, #(_JB_REG_D8 * 4)
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add ip, r0, #(_JB_REG_D8 * 4)
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vldmia ip, {d8-d15}
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vldmia ip, {d8-d15}
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ldr ip, [r0, #(_JB_REG_FPSCR * 4)]
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ldr ip, [r0, #(_JB_REG_FPSCR * 4)]
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vmsr fpscr, ip
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vmsr fpscr, ip
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1:
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#endif
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add r0, r0, #(_JB_REG_R4 * 4)
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add r0, r0, #(_JB_REG_R4 * 4)
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/* Restore integer registers */
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/* Restore integer registers */
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