From b63a034818e83219b8ab36d4bc977dfd83d931ba Mon Sep 17 00:00:00 2001 From: cognet Date: Thu, 13 Apr 2006 14:25:28 +0000 Subject: [PATCH] Disable/enable fiqs as well as irqs. --- sys/arm/include/asmacros.h | 6 +++--- sys/arm/include/atomic.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/sys/arm/include/asmacros.h b/sys/arm/include/asmacros.h index 605408016cae..09e5a7660713 100644 --- a/sys/arm/include/asmacros.h +++ b/sys/arm/include/asmacros.h @@ -159,12 +159,12 @@ name: #define DO_AST \ ldr r0, [sp] /* Get the SPSR from stack */ ;\ mrs r4, cpsr /* save CPSR */ ;\ - orr r1, r4, #(I32_bit) ;\ + orr r1, r4, #(I32_bit|F32_bit) ;\ msr cpsr_c, r1 /* Disable interrupts */ ;\ and r0, r0, #(PSR_MODE) /* Returning to USR mode? */ ;\ teq r0, #(PSR_USR32_MODE) ;\ bne 2f /* Nope, get out now */ ;\ - bic r4, r4, #(I32_bit) ;\ + bic r4, r4, #(I32_bit|F32_bit) ;\ 1: ldr r5, .Lcurthread ;\ ldr r5, [r5] ;\ ldr r1, [r5, #(TD_FLAGS)] ;\ @@ -174,7 +174,7 @@ name: msr cpsr_c, r4 /* Restore interrupts */ ;\ mov r0, sp ;\ bl _C_LABEL(ast) /* ast(frame) */ ;\ - orr r0, r4, #(I32_bit) ;\ + orr r0, r4, #(I32_bit|F32_bit) ;\ msr cpsr_c, r0 ;\ b 1b ;\ 2: diff --git a/sys/arm/include/atomic.h b/sys/arm/include/atomic.h index 603fd64a754f..5758fb152ec4 100644 --- a/sys/arm/include/atomic.h +++ b/sys/arm/include/atomic.h @@ -61,7 +61,7 @@ "orr %1, %0, %2;" \ "msr cpsr_all, %1;" \ : "=r" (cpsr_save), "=r" (tmp) \ - : "I" (I32_bit) \ + : "I" (I32_bit | F32_bit) \ : "cc" ); \ (expr); \ __asm __volatile( \