Add support for Radeon rs740 (HD 2100)
Approved by: jhb (mentor) Obtained from: drm git master
This commit is contained in:
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1209e7e538
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b8865a7993
@ -242,6 +242,10 @@
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{0x1002, 0x7835, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Radeon RS350 Mobility IGP"}, \
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{0x1002, 0x791e, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART, "ATI Radeon RS690 X1250 IGP"}, \
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{0x1002, 0x791f, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART, "ATI Radeon RS690 X1270 IGP"}, \
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{0x1002, 0x796c, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART, "ATI Radeon RS740 HD2100 IGP"}, \
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{0x1002, 0x796d, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART, "ATI Radeon RS740 HD2100 IGP"}, \
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{0x1002, 0x796e, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART, "ATI Radeon RS740 HD2100 IGP"}, \
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{0x1002, 0x796f, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART, "ATI Radeon RS740 HD2100 IGP"}, \
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{0, 0, 0, NULL}
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#define r128_PCI_IDS \
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@ -73,7 +73,8 @@ static u32 RS690_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
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static u32 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
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{
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if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
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if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
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((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
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return RS690_READ_MCIND(dev_priv, addr);
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else
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return RS480_READ_MCIND(dev_priv, addr);
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@ -84,7 +85,8 @@ u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv)
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if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
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return R500_READ_MCIND(dev_priv, RV515_MC_FB_LOCATION);
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else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
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else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
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((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
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return RS690_READ_MCIND(dev_priv, RS690_MC_FB_LOCATION);
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else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
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return R500_READ_MCIND(dev_priv, R520_MC_FB_LOCATION);
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@ -96,7 +98,8 @@ static void radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc)
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{
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if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
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R500_WRITE_MCIND(RV515_MC_FB_LOCATION, fb_loc);
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else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
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else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
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((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
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RS690_WRITE_MCIND(RS690_MC_FB_LOCATION, fb_loc);
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else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
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R500_WRITE_MCIND(R520_MC_FB_LOCATION, fb_loc);
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@ -108,7 +111,8 @@ static void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_lo
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{
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if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
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R500_WRITE_MCIND(RV515_MC_AGP_LOCATION, agp_loc);
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else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
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else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
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((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
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RS690_WRITE_MCIND(RS690_MC_AGP_LOCATION, agp_loc);
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else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
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R500_WRITE_MCIND(R520_MC_AGP_LOCATION, agp_loc);
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@ -124,7 +128,8 @@ static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
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if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) {
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R500_WRITE_MCIND(RV515_MC_AGP_BASE, agp_base_lo);
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R500_WRITE_MCIND(RV515_MC_AGP_BASE_2, agp_base_hi);
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} else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) {
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} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
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((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
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RS690_WRITE_MCIND(RS690_MC_AGP_BASE, agp_base_lo);
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RS690_WRITE_MCIND(RS690_MC_AGP_BASE_2, agp_base_hi);
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} else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) {
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@ -369,8 +374,9 @@ static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
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RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
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R420_cp_microcode[i][0]);
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}
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} else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) {
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DRM_INFO("Loading RS690 Microcode\n");
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} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
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((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
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DRM_INFO("Loading RS690/RS740 Microcode\n");
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for (i = 0; i < 256; i++) {
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RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
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RS690_cp_microcode[i][1]);
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@ -721,7 +727,8 @@ static void radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on)
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temp = IGP_READ_MCIND(dev_priv, RS480_MC_MISC_CNTL);
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if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
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if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
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((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
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IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, (RS480_GART_INDEX_REG_EN |
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RS690_BLOCK_GFX_D3_EN));
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else
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@ -814,6 +821,7 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
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u32 tmp;
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if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
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((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740) ||
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(dev_priv->flags & RADEON_IS_IGPGART)) {
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radeon_set_igpgart(dev_priv, on);
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return;
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@ -130,6 +130,7 @@ enum radeon_family {
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CHIP_RS400,
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CHIP_RS480,
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CHIP_RS690,
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CHIP_RS740,
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CHIP_RV515,
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CHIP_R520,
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CHIP_RV530,
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@ -1235,7 +1236,8 @@ do { \
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#define IGP_WRITE_MCIND( addr, val ) \
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do { \
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if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) \
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if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || \
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((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) \
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RS690_WRITE_MCIND( addr, val ); \
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else \
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RS480_WRITE_MCIND( addr, val ); \
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