Disable/enable fiqs as well as irqs.

sys/arm/include/asmacros.h

@@ -159,12 +159,12 @@ name:
 #define	DO_AST								\
 	ldr	r0, [sp]		/* Get the SPSR from stack */	;\
 	mrs	r4, cpsr		/* save CPSR */			;\
-	orr	r1, r4, #(I32_bit)					;\
+	orr	r1, r4, #(I32_bit|F32_bit)				;\
 	msr	cpsr_c, r1		/* Disable interrupts */	;\
 	and	r0, r0, #(PSR_MODE)	/* Returning to USR mode? */	;\
 	teq	r0, #(PSR_USR32_MODE)					;\
 	bne	2f			/* Nope, get out now */		;\
-	bic	r4, r4, #(I32_bit)					;\
+	bic	r4, r4, #(I32_bit|F32_bit)				;\
 1:	ldr	r5, .Lcurthread						;\
 	ldr	r5, [r5]						;\
 	ldr	r1, [r5, #(TD_FLAGS)]					;\
@@ -174,7 +174,7 @@ name:
 	msr	cpsr_c, r4		/* Restore interrupts */	;\
 	mov	r0, sp							;\
 	bl	_C_LABEL(ast)		/* ast(frame) */		;\
-	orr	r0, r4, #(I32_bit)					;\
+	orr	r0, r4, #(I32_bit|F32_bit)				;\
 	msr	cpsr_c, r0						;\
 	b	1b							;\
 2:

sys/arm/include/atomic.h

@@ -61,7 +61,7 @@
 			"orr  %1, %0, %2;"		\
 			"msr  cpsr_all, %1;"		\
 			: "=r" (cpsr_save), "=r" (tmp)	\
-			: "I" (I32_bit)		\
+			: "I" (I32_bit | F32_bit)		\
 		        : "cc" );		\
 		(expr);				\
 		 __asm __volatile(		\