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[rt305x] Add initial RT5350 and MT7620 glue.

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* Add in chipset awareness to the obio bus layout (ie, which devices are
  where);
* Add in some USB OTG changes to be aware of the newer stuff;
* Add in a configurable primary console - some chips use the normal UART,
  some use UARTLITE.

Tested (by Stanislav);

* RT3050 (NFS)
* RT5350 (NFS, MFS)
* MT7620 (USB)

Submitted by:	Stanislav Galabov <sgalabov@gmail.com>
This commit is contained in:
Adrian Chadd 2015-12-24 18:40:10 +00:00
parent f9133e1d31
commit ba1ae59a17
7 changed files with 103 additions and 69 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
sys/mips/rt305x/files.rt305x
View File

@ -9,6 +9,11 @@ mips/rt305x/rt305x_gpio.c optional gpio
mips/rt305x/uart_bus_rt305x.c optional uart
mips/rt305x/uart_cpu_rt305x.c optional uart
mips/rt305x/uart_dev_rt305x.c optional uart
mips/rt305x/rt305x_dotg.c optional dwcotg
mips/rt305x/rt305x_ehci.c optional ehci
mips/rt305x/rt305x_ohci.c optional ohci
mips/rt305x/rt305x_spi.c optional spibus
mips/rt305x/rt305x_pci.c optional pci
mips/mips/intr_machdep.c standard
mips/mips/tick.c standard
dev/rt/if_rt.c optional rt

15
sys/mips/rt305x/obio.c
View File

@ -221,10 +221,10 @@ obio_attach(device_t dev)
obio_add_res_child(dev, "pcm", 0,
PCM_BASE, (PCM_END - PCM_BASE + 1),
IC_PCM);
#endif
obio_add_res_child(dev, "uart", 0,
UART_BASE, (UART_END - UART_BASE + 1),
IC_UART);
#endif
obio_add_res_child(dev, "gpio", 0,
PIO_BASE, (PIO_END - PIO_BASE + 1),
IC_PIO);
@ -241,19 +241,28 @@ obio_attach(device_t dev)
obio_add_res_child(dev, "i2s", 0,
I2S_BASE, (I2S_END - I2S_BASE + 1),
IC_I2S);
#endif
obio_add_res_child(dev, "spi", 0,
SPI_BASE, (SPI_END - SPI_BASE + 1),
-1);
#endif
obio_add_res_child(dev, "uart", 1,
UARTLITE_BASE, (UARTLITE_END - UARTLITE_BASE + 1),
IC_UARTLITE);
#if !defined(RT5350) && !defined(MT7620)
obio_add_res_child(dev, "cfi", 0,
FLASH_BASE, (FLASH_END - FLASH_BASE + 1),
-1);
obio_add_res_child(dev, "dotg", 0,
obio_add_res_child(dev, "dwcotg", 0,
USB_OTG_BASE, (USB_OTG_END - USB_OTG_BASE + 1),
IC_OTG);
#else
obio_add_res_child(dev, "ehci", 0,
USB_OTG_BASE, (USB_OTG_END - USB_OTG_BASE + 1),
IC_OTG);
obio_add_res_child(dev, "ohci", 0,
USB_OHCI_BASE, (USB_OHCI_END - USB_OHCI_BASE + 1),
IC_OTG);
#endif
obio_add_res_child(dev, "switch", 0,
ETHSW_BASE, (ETHSW_END - ETHSW_BASE + 1),
IC_ETHSW);

118
sys/mips/rt305x/rt305x_dotg.c
View File

@ -2,6 +2,7 @@
__FBSDID("$FreeBSD$");
/*-
* Copyright (c) 2015 Stanislav Galabov. All rights reserved.
* Copyright (c) 2010,2011 Aleksandr Rybalko. All rights reserved.
* Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved.
*
@ -58,7 +59,7 @@ __FBSDID("$FreeBSD$");
#include <dev/usb/usb_controller.h>
#include <dev/usb/usb_bus.h>
#include <dev/usb/controller/dotg.h>
#include <dev/usb/controller/dwc_otg.h>
#include <mips/rt305x/rt305xreg.h>
#include <mips/rt305x/rt305x_sysctlvar.h>
@ -68,10 +69,6 @@ static device_probe_t dotg_obio_probe;
static device_attach_t dotg_obio_attach;
static device_detach_t dotg_obio_detach;
struct dotg_obio_softc {
struct dotg_softc sc_dci; /* must be first */
};
static int
dotg_obio_probe(device_t dev)
{
@ -82,61 +79,63 @@ dotg_obio_probe(device_t dev)
static int
dotg_obio_attach(device_t dev)
{
struct dotg_obio_softc *sc = device_get_softc(dev);
int err;
struct dwc_otg_softc *sc = device_get_softc(dev);
uint32_t tmp;
int err, rid;
/* setup controller interface softc */
/* initialise some bus fields */
sc->sc_dci.sc_dev = dev;
sc->sc_dci.sc_bus.parent = dev;
sc->sc_dci.sc_bus.devices = sc->sc_dci.sc_devices;
sc->sc_dci.sc_bus.devices_max = DOTG_MAX_DEVICES;
sc->sc_dci.sc_bus.dma_bits = 32;
sc->sc_mode = DWC_MODE_HOST;
sc->sc_bus.parent = dev;
sc->sc_bus.devices = sc->sc_devices;
sc->sc_bus.devices_max = DWC_OTG_MAX_DEVICES;
sc->sc_bus.dma_bits = 32;
/* get all DMA memory */
if (usb_bus_mem_alloc_all(&sc->sc_dci.sc_bus,
if (usb_bus_mem_alloc_all(&sc->sc_bus,
USB_GET_DMA_TAG(dev), NULL)) {
printf("No mem\n");
return (ENOMEM);
}
sc->sc_dci.sc_mem_rid = 0;
sc->sc_dci.sc_mem_res =
bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_dci.sc_irq_rid,
RF_ACTIVE);
if (!(sc->sc_dci.sc_mem_res)) {
rid = 0;
sc->sc_io_res =
bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
if (!(sc->sc_io_res)) {
printf("Can`t alloc MEM\n");
goto error;
}
sc->sc_dci.sc_bst = rman_get_bustag(sc->sc_dci.sc_mem_res);
sc->sc_dci.sc_bsh = rman_get_bushandle(sc->sc_dci.sc_mem_res);
sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
sc->sc_io_size = rman_get_size(sc->sc_io_res);
sc->sc_dci.sc_irq_rid = 0;
sc->sc_dci.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
&sc->sc_dci.sc_irq_rid, RF_SHAREABLE| RF_ACTIVE);
if (!(sc->sc_dci.sc_irq_res)) {
rid = 0;
sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
&rid, RF_ACTIVE);
if (!(sc->sc_irq_res)) {
printf("Can`t alloc IRQ\n");
goto error;
}
sc->sc_dci.sc_bus.bdev = device_add_child(dev, "usbus", -1);
if (!(sc->sc_dci.sc_bus.bdev)) {
sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
if (!(sc->sc_bus.bdev)) {
printf("Can`t add usbus\n");
goto error;
}
device_set_ivars(sc->sc_dci.sc_bus.bdev, &sc->sc_dci.sc_bus);
device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
#if (__FreeBSD_version >= 700031)
err = bus_setup_intr(dev, sc->sc_dci.sc_irq_res,
INTR_TYPE_BIO | INTR_MPSAFE, NULL, (driver_intr_t *)dotg_interrupt,
sc, &sc->sc_dci.sc_intr_hdl);
err = bus_setup_intr(dev, sc->sc_irq_res,
INTR_TYPE_TTY | INTR_MPSAFE, dwc_otg_filter_interrupt,
dwc_otg_interrupt, sc, &sc->sc_intr_hdl);
#else
err = bus_setup_intr(dev, sc->sc_dci.sc_irq_res,
INTR_TYPE_BIO | INTR_MPSAFE, (driver_intr_t *)dotg_interrupt,
sc, &sc->sc_dci.sc_intr_hdl);
#error error
err = bus_setup_intr(dev, sc->sc_irq_res,
INTR_TYPE_BIO | INTR_MPSAFE,(driver_intr_t*)dwc_otg_interrupt,
sc, &sc->sc_intr_hdl);
#endif
if (err) {
sc->sc_dci.sc_intr_hdl = NULL;
sc->sc_intr_hdl = NULL;
printf("Can`t set IRQ handle\n");
goto error;
}
@ -144,14 +143,21 @@ dotg_obio_attach(device_t dev)
/* Run clock for OTG core */
rt305x_sysctl_set(SYSCTL_CLKCFG1, rt305x_sysctl_get(SYSCTL_CLKCFG1) |
SYSCTL_CLKCFG1_OTG_CLK_EN);
rt305x_sysctl_set(SYSCTL_RSTCTRL, SYSCTL_RSTCTRL_OTG);
tmp = rt305x_sysctl_get(SYSCTL_RSTCTRL);
rt305x_sysctl_set(SYSCTL_RSTCTRL, tmp | SYSCTL_RSTCTRL_OTG);
DELAY(100);
/*
* Docs say that RSTCTRL bits for RT305x are W1C, so there should
* be no need for the below, but who really knows?
*/
// rt305x_sysctl_set(SYSCTL_RSTCTRL, tmp & ~SYSCTL_RSTCTRL_OTG);
// DELAY(100);
err = dotg_init(&sc->sc_dci);
err = dwc_otg_init(sc);
if (err) printf("dotg_init fail\n");
if (!err) {
err = device_probe_and_attach(sc->sc_dci.sc_bus.bdev);
if (err) printf("device_probe_and_attach fail\n");
err = device_probe_and_attach(sc->sc_bus.bdev);
if (err) printf("device_probe_and_attach fail %d\n", err);
}
if (err) {
goto error;
@ -166,44 +172,44 @@ dotg_obio_attach(device_t dev)
static int
dotg_obio_detach(device_t dev)
{
struct dotg_obio_softc *sc = device_get_softc(dev);
struct dwc_otg_softc *sc = device_get_softc(dev);
device_t bdev;
int err;
if (sc->sc_dci.sc_bus.bdev) {
bdev = sc->sc_dci.sc_bus.bdev;
if (sc->sc_bus.bdev) {
bdev = sc->sc_bus.bdev;
device_detach(bdev);
device_delete_child(dev, bdev);
}
/* during module unload there are lots of children leftover */
device_delete_children(dev);
if (sc->sc_dci.sc_irq_res && sc->sc_dci.sc_intr_hdl) {
if (sc->sc_irq_res && sc->sc_intr_hdl) {
/*
* only call dotg_obio_uninit() after dotg_obio_init()
*/
dotg_uninit(&sc->sc_dci);
dwc_otg_uninit(sc);
/* Stop OTG clock */
rt305x_sysctl_set(SYSCTL_CLKCFG1,
rt305x_sysctl_get(SYSCTL_CLKCFG1) &
~SYSCTL_CLKCFG1_OTG_CLK_EN);
err = bus_teardown_intr(dev, sc->sc_dci.sc_irq_res,
sc->sc_dci.sc_intr_hdl);
sc->sc_dci.sc_intr_hdl = NULL;
err = bus_teardown_intr(dev, sc->sc_irq_res,
sc->sc_intr_hdl);
sc->sc_intr_hdl = NULL;
}
if (sc->sc_dci.sc_irq_res) {
if (sc->sc_irq_res) {
bus_release_resource(dev, SYS_RES_IRQ, 0,
sc->sc_dci.sc_irq_res);
sc->sc_dci.sc_irq_res = NULL;
sc->sc_irq_res);
sc->sc_irq_res = NULL;
}
if (sc->sc_dci.sc_mem_res) {
if (sc->sc_io_res) {
bus_release_resource(dev, SYS_RES_MEMORY, 0,
sc->sc_dci.sc_mem_res);
sc->sc_dci.sc_mem_res = NULL;
sc->sc_io_res);
sc->sc_io_res = NULL;
}
usb_bus_mem_free_all(&sc->sc_dci.sc_bus, NULL);
usb_bus_mem_free_all(&sc->sc_bus, NULL);
return (0);
}
@ -221,11 +227,11 @@ static device_method_t dotg_obio_methods[] = {
};
static driver_t dotg_obio_driver = {
.name = "dotg",
.name = "dwcotg",
.methods = dotg_obio_methods,
.size = sizeof(struct dotg_obio_softc),
.size = sizeof(struct dwc_otg_softc),
};
static devclass_t dotg_obio_devclass;
DRIVER_MODULE(dotg, obio, dotg_obio_driver, dotg_obio_devclass, 0, 0);
DRIVER_MODULE(dwcotg, obio, dotg_obio_driver, dotg_obio_devclass, 0, 0);

20
sys/mips/rt305x/rt305x_machdep.c
View File

@ -71,6 +71,7 @@ __FBSDID("$FreeBSD$");
#include <machine/vmparam.h>
#include <mips/rt305x/rt305xreg.h>
#include <mips/rt305x/rt305x_sysctlvar.h>
extern int *edata;
extern int *end;
@ -87,11 +88,17 @@ static void
mips_init(void)
{
int i;
char *memsize;
printf("entry: mips_init()\n");
if ((memsize = kern_getenv("memsize")) != NULL)
realmem = btoc(strtol(memsize, NULL, 0) << 20);
else
realmem = btoc(32 << 20);
bootverbose = 1;
realmem = btoc(32 << 20);
for (i = 0; i < 10; i++) {
phys_avail[i] = 0;
@ -120,8 +127,13 @@ void
platform_reset(void)
{
#if !defined(MT7620) && !defined(RT5350)
__asm __volatile("li $25, 0xbf000000");
__asm __volatile("j $25");
#else
rt305x_sysctl_set(SYSCTL_RSTCTRL, 1);
while (1);
#endif
}
void
@ -144,6 +156,8 @@ platform_start(__register_t a0 __unused, __register_t a1 __unused,
/* Initialize pcpu stuff */
mips_pcpu0_init();
mips_timer_early_init(platform_counter_freq / 2);
/* initialize console so that we have printf */
boothowto |= (RB_SERIAL | RB_MULTIPLE); /* Use multiple consoles */
boothowto |= (RB_VERBOSE);
@ -173,10 +187,12 @@ platform_start(__register_t a0 __unused, __register_t a1 __unused,
printf("Environment:\n");
for (i = 0; envp[i] ; i++) {
for (i = 0; envp[i] && MIPS_IS_VALID_PTR(envp[i]); i++) {
char *n, *arg;
arg = (char *)(intptr_t)MIPS_PHYS_TO_KSEG0(envp[i]);
if (! MIPS_IS_VALID_PTR(arg))
continue;
printf("\t%s\n", arg);
n = strsep(&arg, "=");
if (arg == NULL)

2
sys/mips/rt305x/rt305x_sysctl.c
View File

@ -70,6 +70,7 @@ rt305x_sysctl_dump_config(device_t dev)
(val >> 24) & 0xff);
DUMPREG(SYSCTL_SYSCFG);
#if !defined(RT5350) && !defined(MT7620)
if ( val & SYSCTL_SYSCFG_INIC_EE_SDRAM)
printf("\tGet SDRAM config from EEPROM\n");
if ( val & SYSCTL_SYSCFG_INIC_8MB_SDRAM)
@ -123,6 +124,7 @@ rt305x_sysctl_dump_config(device_t dev)
((val & SYSCTL_CLKCFG1_PCM_CLK_DIV_MASK) >>
SYSCTL_CLKCFG1_PCM_CLK_DIV_SHIFT));
DUMPREG(SYSCTL_GPIOMODE);
#endif
#undef DUMPREG
return;

8
sys/mips/rt305x/uart_bus_rt305x.c
View File

@ -75,21 +75,13 @@ static driver_t uart_rt305x_driver = {
sizeof(struct uart_softc),
};
extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
static int
uart_rt305x_probe(device_t dev)
{
struct uart_softc *sc;
sc = device_get_softc(dev);
sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
sc->sc_class = &uart_rt305x_uart_class;
bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
sc->sc_sysdev->bas.regshft = 2;
sc->sc_sysdev->bas.bst = mips_bus_space_generic;
sc->sc_sysdev->bas.bsh =
MIPS_PHYS_TO_KSEG1(device_get_unit(dev)?UARTLITE_BASE:UART_BASE);
sc->sc_bas.regshft = 2;
sc->sc_bas.bst = mips_bus_space_generic;
sc->sc_bas.bsh =

4
sys/mips/rt305x/uart_cpu_rt305x.c
View File

@ -77,6 +77,10 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
uart_bus_space_io = NULL;
uart_bus_space_mem = mips_bus_space_generic;
#ifdef RT305X_USE_UART
di->bas.bsh = MIPS_PHYS_TO_KSEG1(UART_BASE);
#else
di->bas.bsh = MIPS_PHYS_TO_KSEG1(UARTLITE_BASE);
#endif
return (0);
}