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Fix AR5416 radar parameter initialisation.

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* I messed up the order of parameter true/false; oops!
* AR_PHY_RADAR_1 was being written at the wrong place, and was writing
  potential garbage to the hardware.

Approved by:	re (kib)
This commit is contained in:
Adrian Chadd 2011-07-30 13:34:57 +00:00
parent 0a5f264d60
commit bb40c7e83f
1 changed files with 9 additions and 8 deletions
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17
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
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@ -670,26 +670,27 @@ ar5416EnableDfs(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
OS_REG_WRITE(ah, AR_PHY_RADAR_0, val | AR_PHY_RADAR_0_ENA);
if (pe->pe_usefir128 == 0)
OS_REG_SET_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_USE_FIR128);
else if (pe->pe_usefir128 == 1)
if (pe->pe_usefir128 == 1)
OS_REG_CLR_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_USE_FIR128);
else if (pe->pe_usefir128 == 0)
OS_REG_SET_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_USE_FIR128);
if (pe->pe_enmaxrssi == 0)
if (pe->pe_enmaxrssi == 1)
OS_REG_SET_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_MAX_RRSSI);
else if (pe->pe_enmaxrssi == 1)
else if (pe->pe_enmaxrssi == 0)
OS_REG_CLR_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_MAX_RRSSI);
if (pe->pe_blockradar == 0)
if (pe->pe_blockradar == 1)
OS_REG_SET_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_BLOCK_CHECK);
else if (pe->pe_blockradar == 1)
else if (pe->pe_blockradar == 0)
OS_REG_CLR_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_BLOCK_CHECK);
if (pe->pe_maxlen != HAL_PHYERR_PARAM_NOVAL) {
val = OS_REG_READ(ah, AR_PHY_RADAR_1);
val &= ~AR_PHY_RADAR_1_MAXLEN;
val |= SM(pe->pe_maxlen, AR_PHY_RADAR_1_MAXLEN);
}
OS_REG_WRITE(ah, AR_PHY_RADAR_1, val);
}
/*
* Enable HT/40 if the upper layer asks;