From bce32f9268813e5f19551eebcabcd5188cdf5173 Mon Sep 17 00:00:00 2001 From: Conrad Meyer Date: Wed, 11 Nov 2015 18:55:53 +0000 Subject: [PATCH] ntb_hw: Similarly, add a debug-leveled macro for ntb_hw Sponsored by: EMC / Isilon Storage Division --- sys/dev/ntb/ntb_hw/ntb_hw.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/sys/dev/ntb/ntb_hw/ntb_hw.c b/sys/dev/ntb/ntb_hw/ntb_hw.c index e2bcd9cb4c5f..198051873c41 100644 --- a/sys/dev/ntb/ntb_hw/ntb_hw.c +++ b/sys/dev/ntb/ntb_hw/ntb_hw.c @@ -317,6 +317,15 @@ static int sysctl_handle_features(SYSCTL_HANDLER_ARGS); static int sysctl_handle_link_status(SYSCTL_HANDLER_ARGS); static int sysctl_handle_register(SYSCTL_HANDLER_ARGS); +static unsigned g_ntb_hw_debug_level; +SYSCTL_UINT(_hw_ntb, OID_AUTO, debug_level, CTLFLAG_RWTUN, + &g_ntb_hw_debug_level, 0, "ntb_hw log level -- higher is more verbose"); +#define ntb_printf(lvl, ...) do { \ + if ((lvl) <= g_ntb_hw_debug_level) { \ + device_printf(ntb->device, __VA_ARGS__); \ + } \ +} while (0) + static struct ntb_hw_info pci_ids[] = { /* XXX: PS/SS IDs left out until they are supported. */ { 0x0C4E8086, "BWD Atom Processor S1200 Non-Transparent Bridge B2B",