A module to handle the interrupt controller on Heathrow/Paddington
MacIO chips, found on older Mac G3's.
This commit is contained in:
Peter Grehan
parent
4b7624a5f7
commit
bd687ebf3b
468
sys/powerpc/powermac/hrowpic.c
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468
sys/powerpc/powermac/hrowpic.c
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@ -0,0 +1,468 @@
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/*
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* Copyright 2003 by Peter Grehan. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* A driver for the PIC found in the Heathrow/Paddington MacIO chips.
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* This was superseded by an OpenPIC in the Keylargo and beyond
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* MacIO versions.
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*
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* The device is initially located in the OpenFirmware device tree
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* in the earliest stage of the nexus probe. However, no device registers
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* are touched until the actual h/w is probed later on during the
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* MacIO probe. At that point, any interrupt sources that were allocated
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* prior to this are activated.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <machine/intr_machdep.h>
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#include <machine/md_var.h>
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#include <machine/nexusvar.h>
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#include <machine/pio.h>
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#include <machine/resource.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <sys/rman.h>
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#include <powerpc/powermac/maciovar.h>
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#include <powerpc/powermac/hrowpicvar.h>
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#include "pic_if.h"
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/*
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* Device interface.
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*/
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static int hrowpic_probe(device_t);
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static int hrowpic_attach(device_t);
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/*
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* PIC interface.
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*/
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static struct resource *hrowpic_allocate_intr(device_t, device_t, int *,
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u_long, u_int);
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static int hrowpic_setup_intr(device_t, device_t,
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struct resource *, int, driver_intr_t, void *,
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void **);
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static int hrowpic_teardown_intr(device_t, device_t,
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struct resource *, void *);
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static int hrowpic_release_intr(device_t dev, device_t, int,
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struct resource *res);
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/*
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* MacIO interface
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*/
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static int hrowpic_macio_probe(device_t);
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static int hrowpic_macio_attach(device_t);
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/*
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* Local routines
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*/
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static void hrowpic_intr(void);
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static void hrowpic_ext_enable_irq(int);
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static void hrowpic_ext_disable_irq(int);
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static void hrowpic_toggle_irq(struct hrowpic_softc *sc, int, int);
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/*
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* Interrupt controller softc. There should only be one.
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*/
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static struct hrowpic_softc *hpicsoftc;
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/*
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* Driver methods.
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*/
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static device_method_t hrowpic_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, hrowpic_probe),
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DEVMETHOD(device_attach, hrowpic_attach),
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/* PIC interface */
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DEVMETHOD(pic_allocate_intr, hrowpic_allocate_intr),
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DEVMETHOD(pic_setup_intr, hrowpic_setup_intr),
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DEVMETHOD(pic_teardown_intr, hrowpic_teardown_intr),
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DEVMETHOD(pic_release_intr, hrowpic_release_intr),
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{ 0, 0 }
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};
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static driver_t hrowpic_driver = {
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"hrowpic",
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hrowpic_methods,
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sizeof(struct hrowpic_softc)
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};
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static devclass_t hrowpic_devclass;
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DRIVER_MODULE(hrowpic, nexus, hrowpic_driver, hrowpic_devclass, 0, 0);
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static int
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hrowpic_probe(device_t dev)
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{
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char *type, *compatible;
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type = nexus_get_device_type(dev);
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compatible = nexus_get_compatible(dev);
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if (strcmp(type, "interrupt-controller"))
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return (ENXIO);
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if (strcmp(compatible, "heathrow")) {
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return (ENXIO);
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}
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device_set_desc(dev, "Heathrow interrupt controller");
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return (0);
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}
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static int
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hrowpic_attach(device_t dev)
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{
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struct hrowpic_softc *sc;
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sc = device_get_softc(dev);
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sc->sc_rman.rm_type = RMAN_ARRAY;
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sc->sc_rman.rm_descr = device_get_nameunit(dev);
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if (rman_init(&sc->sc_rman) != 0 ||
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rman_manage_region(&sc->sc_rman, 0, HROWPIC_IRQMAX-1) != 0) {
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device_printf(dev, "could not set up resource management");
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return (ENXIO);
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}
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intr_init(hrowpic_intr, HROWPIC_IRQMAX, hrowpic_ext_enable_irq,
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hrowpic_ext_disable_irq);
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KASSERT(hpicsoftc == NULL, ("hrowpic: h/w already probed"));
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hpicsoftc = sc;
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return (0);
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}
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/*
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* PIC interface
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*/
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static struct resource *
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hrowpic_allocate_intr(device_t picdev, device_t child, int *rid, u_long intr,
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u_int flags)
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{
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struct hrowpic_softc *sc;
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struct resource *rv;
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int needactivate;
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sc = device_get_softc(picdev);
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needactivate = flags & RF_ACTIVE;
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flags &= ~RF_ACTIVE;
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rv = rman_reserve_resource(&sc->sc_rman, intr, intr, 1, flags, child);
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if (rv == NULL) {
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device_printf(picdev, "interrupt reservation failed for %s\n",
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device_get_nameunit(child));
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return (NULL);
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}
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return (rv);
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}
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static int
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hrowpic_setup_intr(device_t picdev, device_t child, struct resource *res,
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int flags, driver_intr_t *intr, void *arg, void **cookiep)
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{
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struct hrowpic_softc *sc;
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int error;
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sc = device_get_softc(picdev);
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if ((res->r_flags & RF_SHAREABLE) == 0)
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flags |= INTR_EXCL;
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/*
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* We depend here on rman_activate_resource() being idempotent.
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*/
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error = rman_activate_resource(res);
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if (error)
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return (error);
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error = inthand_add(device_get_nameunit(child), res->r_start, intr,
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arg, flags, cookiep);
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if (!error) {
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/*
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* Record irq request, and enable if h/w has been probed
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*/
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sc->sc_irq[res->r_start] = 1;
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if (sc->sc_memr) {
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hrowpic_toggle_irq(sc, res->r_start, 1);
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}
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}
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return (error);
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}
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static int
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hrowpic_teardown_intr(device_t picdev, device_t child, struct resource *res,
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void *ih)
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{
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int error;
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error = rman_deactivate_resource(res);
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if (error)
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return (error);
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error = inthand_remove(res->r_start, ih);
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return (error);
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}
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static int
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hrowpic_release_intr(device_t picdev, device_t child, int rid,
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struct resource *res)
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{
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int error;
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if (rman_get_flags(res) & RF_ACTIVE) {
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error = bus_deactivate_resource(child, SYS_RES_IRQ, rid, res);
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if (error)
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return (error);
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}
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return (rman_release_resource(res));
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}
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/*
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* Interrupt interface
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*/
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static void
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hrowpic_write_reg(struct hrowpic_softc *sc, u_int reg, u_int bank,
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u_int32_t val)
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{
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if (bank == HPIC_PRIMARY)
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reg += HPIC_1ST_OFFSET;
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bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val);
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/*
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* XXX Issue a read to force the write to complete
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*/
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bus_space_read_4(sc->sc_bt, sc->sc_bh, reg);
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}
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static u_int32_t
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hrowpic_read_reg(struct hrowpic_softc *sc, u_int reg, u_int bank)
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{
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if (bank == HPIC_PRIMARY)
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reg += HPIC_1ST_OFFSET;
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return (bus_space_read_4(sc->sc_bt, sc->sc_bh, reg));
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}
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static void
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hrowpic_clear_all(struct hrowpic_softc *sc)
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{
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/*
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* Disable all interrupt sources and clear outstanding interrupts
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*/
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hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_PRIMARY, 0);
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hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_PRIMARY, 0xffffffff);
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hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_SECONDARY, 0);
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hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_SECONDARY, 0xffffffff);
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}
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static void
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hrowpic_toggle_irq(struct hrowpic_softc *sc, int irq, int enable)
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{
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u_int roffset;
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u_int rbit;
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KASSERT((irq > 0) && (irq < HROWPIC_IRQMAX), ("en irq out of range"));
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/*
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* Calculate prim/sec register bank for the IRQ, update soft copy,
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* and enable the IRQ as an interrupt source
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*/
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roffset = HPIC_INT_TO_BANK(irq);
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rbit = HPIC_INT_TO_REGBIT(irq);
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if (enable)
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sc->sc_softreg[roffset] |= (1 << rbit);
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else
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sc->sc_softreg[roffset] &= ~(1 << rbit);
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hrowpic_write_reg(sc, HPIC_ENABLE, roffset, sc->sc_softreg[roffset]);
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}
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static void
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hrowpic_intr(void)
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{
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int irq_lo, irq_hi;
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int i;
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struct hrowpic_softc *sc;
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sc = hpicsoftc;
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/*
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* Loop through both interrupt sources until they are empty.
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* XXX simplistic code, far from optimal.
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*/
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do {
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irq_lo = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_PRIMARY);
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if (irq_lo) {
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hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_PRIMARY,
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irq_lo);
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for (i = 0; i < HROWPIC_IRQ_REGNUM; i++) {
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if (irq_lo & (1 << i)) {
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/*
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* Disable IRQ and call handler
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*/
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hrowpic_toggle_irq(sc, i, 0);
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intr_handle(i);
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}
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}
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}
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irq_hi = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_SECONDARY);
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if (irq_hi) {
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hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_SECONDARY,
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irq_hi);
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for (i = 0; i < HROWPIC_IRQ_REGNUM; i++) {
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if (irq_hi & (1 << i)) {
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/*
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* Disable IRQ and call handler
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*/
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hrowpic_toggle_irq(sc,
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i + HROWPIC_IRQ_REGNUM, 0);
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intr_handle(i + HROWPIC_IRQ_REGNUM);
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}
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}
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}
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} while (irq_lo && irq_hi);
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}
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static void
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hrowpic_ext_enable_irq(int irq)
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{
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hrowpic_toggle_irq(hpicsoftc, irq, 1);
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}
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static void
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hrowpic_ext_disable_irq(int irq)
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{
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hrowpic_toggle_irq(hpicsoftc, irq, 0);
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}
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/*
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* MacIO interface
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*/
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static device_method_t hrowpic_macio_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, hrowpic_macio_probe),
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DEVMETHOD(device_attach, hrowpic_macio_attach),
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{ 0, 0 },
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};
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static driver_t hrowpic_macio_driver = {
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"hrowpicmacio",
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hrowpic_macio_methods,
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0
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};
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static devclass_t hrowpic_macio_devclass;
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DRIVER_MODULE(hrowpicmacio, macio, hrowpic_macio_driver,
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hrowpic_macio_devclass, 0, 0);
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static int
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hrowpic_macio_probe(device_t dev)
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{
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char *type = macio_get_devtype(dev);
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/*
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* OpenPIC cells have a type of "open-pic", so this
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* is sufficient to identify a Heathrow cell
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*/
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if (strcmp(type, "interrupt-controller") != 0)
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return (ENXIO);
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/*
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* The description was already printed out in the nexus
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* probe, so don't do it again here
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*/
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device_set_desc(dev, "Heathrow MacIO interrupt cell");
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device_quiet(dev);
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return (0);
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}
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static int
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hrowpic_macio_attach(device_t dev)
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{
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struct hrowpic_softc *sc = hpicsoftc;
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int rid;
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int i;
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KASSERT(sc != NULL, ("pic not nexus-probed\n"));
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sc->sc_maciodev = dev;
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rid = 0;
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sc->sc_memr = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 0, ~0, 1,
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RF_ACTIVE);
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if (sc->sc_memr == NULL) {
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device_printf(dev, "Could not alloc mem resource!\n");
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return (ENXIO);
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}
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sc->sc_bt = rman_get_bustag(sc->sc_memr);
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sc->sc_bh = rman_get_bushandle(sc->sc_memr);
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hrowpic_clear_all(sc);
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/*
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* Enable all IRQs that were requested before the h/w
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* was probed
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*/
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for (i = 0; i < HROWPIC_IRQMAX; i++)
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if (sc->sc_irq[i]) {
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hrowpic_toggle_irq(sc, i, 1);
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}
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return (0);
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}
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77
sys/powerpc/powermac/hrowpicvar.h
Normal file
77
sys/powerpc/powermac/hrowpicvar.h
Normal file
@ -0,0 +1,77 @@
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/*
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* Copyright 2003 by Peter Grehan. All rights reserved.
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||||
*
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||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef _POWERPC_POWERMAC_HROWPICVAR_H_
|
||||
#define _POWERPC_POWERMAC_HROWPICVAR_H_
|
||||
|
||||
#define HROWPIC_IRQMAX 64
|
||||
#define HROWPIC_IRQ_REGNUM 32 /* irqs per register */
|
||||
#define HROWPIC_IRQ_SHIFT 5 /* high or low irq word */
|
||||
#define HROWPIC_IRQ_MASK ((HROWPIC_IRQMAX-1) >> 1) /* irq bit pos in word */
|
||||
|
||||
/*
|
||||
* Register offsets within bank. There are two identical banks,
|
||||
* separated by 16 bytes. Interrupts 0->31 are processed in the
|
||||
* second bank, and 32->63 in the first bank.
|
||||
*/
|
||||
#define HPIC_STATUS 0x00 /* active interrupt sources */
|
||||
#define HPIC_ENABLE 0x04 /* interrupt asserts ppc EXTINT */
|
||||
#define HPIC_CLEAR 0x08 /* clear int source */
|
||||
#define HPIC_TRIGGER 0x0c /* edge/level int trigger */
|
||||
|
||||
#define HPIC_PRIMARY 1 /* primary register bank */
|
||||
#define HPIC_SECONDARY 0 /* secondary register bank */
|
||||
|
||||
/*
|
||||
* Convert an interrupt into a prim/sec bank number
|
||||
*/
|
||||
#define HPIC_INT_TO_BANK(x) \
|
||||
(((x) >> HROWPIC_IRQ_SHIFT) ^ 1)
|
||||
|
||||
/*
|
||||
* Convert an interrupt into the bit number within a bank register
|
||||
*/
|
||||
#define HPIC_INT_TO_REGBIT(x) \
|
||||
((x) & HROWPIC_IRQ_MASK)
|
||||
|
||||
#define HPIC_1ST_OFFSET 0x10 /* offset to primary reg bank */
|
||||
|
||||
|
||||
struct hrowpic_softc {
|
||||
struct rman sc_rman; /* resource mgr for IRQs */
|
||||
u_int32_t sc_irq[HROWPIC_IRQMAX]; /* allocated IRQ flags */
|
||||
u_int32_t sc_softreg[2]; /* ENABLE reg copy */
|
||||
device_t sc_maciodev; /* macio device */
|
||||
struct resource *sc_memr; /* macio bus resource */
|
||||
bus_space_tag_t sc_bt; /* macio bus tag/handle */
|
||||
bus_space_handle_t sc_bh;
|
||||
};
|
||||
|
||||
|
||||
#endif /* _POWERPC_POWERMAC_HROWPICVAR_H_ */
|
||||
Loading…
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Reference in New Issue
Block a user