MFC:
> jhb 2006-04-06 17:17:45 UTC > > FreeBSD src repository > > Modified files: > sys/i386/i386 machdep.c > sys/i386/isa npx.c > Log: > - Don't set CR0_NE and CR0_MP in npx_probe() as they are already set > earlier in cpu_setregs(). > - If we know this CPU has a FPU via cpuid, then just assume the INT16 > interface and make the npx device quiet to not clutter the dmesg. This > is true for all Pentium and later CPUs and even some of the later 486dx > CPUs. > > Reviewed by: bde > Tested by: ps > MFC after: 1 week > > Path Revision > src/sys/i386/i386/machdep.c 1.625 > src/sys/i386/isa/npx.c 1.164 Requested by: jhb Approved by: re (scottl)
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@ -1222,9 +1222,22 @@ cpu_setregs(void)
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unsigned int cr0;
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cr0 = rcr0();
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/*
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* CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
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* BSP. See the comments there about why we set them.
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* CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
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*
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* Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
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* instructions. We must set the CR0_MP bit and use the CR0_TS
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* bit to control the trap, because setting the CR0_EM bit does
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* not cause WAIT instructions to trap. It's important to trap
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* WAIT instructions - otherwise the "wait" variants of no-wait
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* control instructions would degenerate to the "no-wait" variants
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* after FP context switches but work correctly otherwise. It's
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* particularly important to trap WAITs when there is no NPX -
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* otherwise the "wait" variants would always degenerate.
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*
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* Try setting CR0_NE to get correct error reporting on 486DX's.
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* Setting it should fail or do nothing on lesser processors.
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*/
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cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
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load_cr0(cr0);
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@ -238,10 +238,8 @@ npx_intr(dummy)
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}
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/*
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* Probe routine. Initialize cr0 to give correct behaviour for [f]wait
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* whether the device exists or not (XXX should be elsewhere). Set flags
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* to tell npxattach() what to do. Modify device struct if npx doesn't
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* need to use interrupts. Return 0 if device exists.
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* Probe routine. Set flags to tell npxattach() what to do. Set up an
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* interrupt handler if npx needs to use interrupts.
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*/
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static int
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npx_probe(dev)
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@ -254,6 +252,20 @@ npx_probe(dev)
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u_short control;
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u_short status;
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device_set_desc(dev, "math processor");
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/*
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* Modern CPUs all have an FPU that uses the INT16 interface
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* and provide a simple way to verify that, so handle the
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* common case right away.
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*/
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if (cpu_feature & CPUID_FPU) {
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hw_float = npx_exists = 1;
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npx_ex16 = 1;
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device_quiet(dev);
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return (0);
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}
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save_idt_npxtrap = idt[IDT_MF];
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setidt(IDT_MF, probetrap, SDT_SYS386TGT, SEL_KPL,
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GSEL(GCODE_SEL, SEL_KPL));
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@ -281,24 +293,10 @@ npx_probe(dev)
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outb(IO_NPX, 0);
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/*
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* Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
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* instructions. We must set the CR0_MP bit and use the CR0_TS
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* bit to control the trap, because setting the CR0_EM bit does
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* not cause WAIT instructions to trap. It's important to trap
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* WAIT instructions - otherwise the "wait" variants of no-wait
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* control instructions would degenerate to the "no-wait" variants
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* after FP context switches but work correctly otherwise. It's
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* particularly important to trap WAITs when there is no NPX -
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* otherwise the "wait" variants would always degenerate.
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*
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* Try setting CR0_NE to get correct error reporting on 486DX's.
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* Setting it should fail or do nothing on lesser processors.
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*/
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load_cr0(rcr0() | CR0_MP | CR0_NE);
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/*
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* But don't trap while we're probing.
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* Don't trap while we're probing.
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*/
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stop_emulating();
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/*
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* Finish resetting the coprocessor, if any. If there is an error
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* pending, then we may get a bogus IRQ13, but npx_intr() will handle
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@ -307,8 +305,6 @@ npx_probe(dev)
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*/
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fninit();
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device_set_desc(dev, "math processor");
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/*
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* Don't use fwait here because it might hang.
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* Don't use fnop here because it usually hangs if there is no FPU.
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@ -410,10 +406,10 @@ npx_attach(dev)
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if (npx_irq13)
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device_printf(dev, "IRQ 13 interface\n");
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else if (npx_ex16)
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device_printf(dev, "INT 16 interface\n");
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else
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else if (!npx_ex16)
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device_printf(dev, "WARNING: no FPU!\n");
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else if (!device_is_quiet(dev) || bootverbose)
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device_printf(dev, "INT 16 interface\n");
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npxinit(__INITIAL_NPXCW__);
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