From bf258187c9ce8f191f588ea09bcf958229657f44 Mon Sep 17 00:00:00 2001 From: dfr Date: Mon, 24 Sep 2001 22:49:20 +0000 Subject: [PATCH] Make the Alternate {I,D} TLB vector code actually work for virtual addresses greater than 256M (the page size for region 6 and 7). --- sys/ia64/ia64/exception.S | 4 ++-- sys/ia64/ia64/exception.s | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/sys/ia64/ia64/exception.S b/sys/ia64/ia64/exception.S index 3c4c06c41006..f554a9a0980f 100644 --- a/sys/ia64/ia64/exception.S +++ b/sys/ia64/ia64/exception.S @@ -248,7 +248,7 @@ ia64_vector_table: ;; dep r16=0,r16,50,14 // clear bits above PPN ;; - dep r16=r17,r17,0,12 // put pte bits in 0..11 + dep r16=r17,r16,0,12 // put pte bits in 0..11 ;; itc.i r16 mov pr=r18,0x1ffff // restore predicates @@ -271,7 +271,7 @@ ia64_vector_table: ;; dep r16=0,r16,50,14 // clear bits above PPN ;; - dep r16=r17,r17,0,12 // put pte bits in 0..11 + dep r16=r17,r16,0,12 // put pte bits in 0..11 ;; itc.d r16 mov pr=r18,0x1ffff // restore predicates diff --git a/sys/ia64/ia64/exception.s b/sys/ia64/ia64/exception.s index 3c4c06c41006..f554a9a0980f 100644 --- a/sys/ia64/ia64/exception.s +++ b/sys/ia64/ia64/exception.s @@ -248,7 +248,7 @@ ia64_vector_table: ;; dep r16=0,r16,50,14 // clear bits above PPN ;; - dep r16=r17,r17,0,12 // put pte bits in 0..11 + dep r16=r17,r16,0,12 // put pte bits in 0..11 ;; itc.i r16 mov pr=r18,0x1ffff // restore predicates @@ -271,7 +271,7 @@ ia64_vector_table: ;; dep r16=0,r16,50,14 // clear bits above PPN ;; - dep r16=r17,r17,0,12 // put pte bits in 0..11 + dep r16=r17,r16,0,12 // put pte bits in 0..11 ;; itc.d r16 mov pr=r18,0x1ffff // restore predicates