The great s/npx/fpu/gi
This commit is contained in:
Peter Wemm
parent
d0ff2e64ac
commit
bf2f09ee97
@ -131,7 +131,7 @@ ENTRY(cpu_switch)
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pushq %rsi
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addq $PCB_SAVEFPU,%r8 /* h/w bugs make saving complicated */
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movq %r8, %rdi
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call npxsave /* do it in a big C function */
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call fpusave /* do it in a big C function */
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popq %rsi
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popq %rdi
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1:
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@ -301,16 +301,16 @@ ENTRY(savectx)
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popq PCB_RFLAGS(%rcx)
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/*
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* If fpcurthread == NULL, then the npx h/w state is irrelevant and the
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* If fpcurthread == NULL, then the fpu h/w state is irrelevant and the
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* state had better already be in the pcb. This is true for forks
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* but not for dumps (the old book-keeping with FP flags in the pcb
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* always lost for dumps because the dump pcb has 0 flags).
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*
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* If fpcurthread != NULL, then we have to save the npx h/w state to
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* If fpcurthread != NULL, then we have to save the fpu h/w state to
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* fpcurthread's pcb and copy it to the requested pcb, or save to the
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* requested pcb and reload. Copying is easier because we would
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* have to handle h/w bugs for reloading. We used to lose the
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* parent's npx state for forks by forgetting to reload.
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* parent's fpu state for forks by forgetting to reload.
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*/
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pushfq
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cli
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@ -322,7 +322,7 @@ ENTRY(savectx)
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pushq %rax
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movq TD_PCB(%rax),%rdi
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leaq PCB_SAVEFPU(%rdi),%rdi
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call npxsave
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call fpusave
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popq %rax
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popq %rcx
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@ -37,7 +37,6 @@
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_debug_npx.h"
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#include "opt_isa.h"
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#include <sys/param.h>
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@ -53,9 +52,6 @@ __FBSDID("$FreeBSD$");
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#include <sys/sysctl.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#ifdef NPX_DEBUG
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#include <sys/syslog.h>
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#endif
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#include <sys/signalvar.h>
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#include <sys/user.h>
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@ -75,7 +71,7 @@ __FBSDID("$FreeBSD$");
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#endif
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/*
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* 387 and 287 Numeric Coprocessor Extension (NPX) Driver.
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* Floating point support.
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*/
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#if defined(__GNUC__) && !defined(lint)
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@ -110,59 +106,50 @@ void stop_emulating(void);
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typedef u_char bool_t;
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static int npx_attach(device_t dev);
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static void npx_identify(driver_t *driver, device_t parent);
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static int npx_probe(device_t dev);
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static int fpu_attach(device_t dev);
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static void fpu_identify(driver_t *driver, device_t parent);
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static int fpu_probe(device_t dev);
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int hw_float = 1;
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SYSCTL_INT(_hw,HW_FLOATINGPT, floatingpoint,
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CTLFLAG_RD, &hw_float, 0,
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"Floatingpoint instructions executed in hardware");
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static struct savefpu npx_cleanstate;
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static bool_t npx_cleanstate_ready;
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static struct savefpu fpu_cleanstate;
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static bool_t fpu_cleanstate_ready;
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/*
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* Identify routine. Create a connection point on our parent for probing.
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*/
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static void
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npx_identify(driver, parent)
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driver_t *driver;
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device_t parent;
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fpu_identify(driver_t *driver, device_t parent)
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{
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device_t child;
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child = BUS_ADD_CHILD(parent, 0, "npx", 0);
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child = BUS_ADD_CHILD(parent, 0, "fpu", 0);
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if (child == NULL)
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panic("npx_identify");
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panic("fpu_identify");
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}
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/*
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* Probe routine. Initialize cr0 to give correct behaviour for [f]wait
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* whether the device exists or not (XXX should be elsewhere).
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* Modify device struct if npx doesn't need to use interrupts.
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* Modify device struct if fpu doesn't need to use interrupts.
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* Return 0 if device exists.
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*/
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static int
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npx_probe(dev)
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device_t dev;
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fpu_probe(device_t dev)
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{
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/*
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* Partially reset the coprocessor, if any. Some BIOS's don't reset
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* it after a warm boot.
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*/
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outb(0xf1, 0); /* full reset on some systems, NOP on others */
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outb(0xf0, 0); /* clear BUSY# latch */
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/*
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* Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
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* Prepare to trap all ESC (i.e., FPU) instructions and all WAIT
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* instructions. We must set the CR0_MP bit and use the CR0_TS
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* bit to control the trap, because setting the CR0_EM bit does
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* not cause WAIT instructions to trap. It's important to trap
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* WAIT instructions - otherwise the "wait" variants of no-wait
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* control instructions would degenerate to the "no-wait" variants
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* after FP context switches but work correctly otherwise. It's
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* particularly important to trap WAITs when there is no NPX -
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* particularly important to trap WAITs when there is no FPU -
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* otherwise the "wait" variants would always degenerate.
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*
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* Try setting CR0_NE to get correct error reporting on 486DX's.
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@ -179,6 +166,7 @@ npx_probe(dev)
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fninit();
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device_set_desc(dev, "math processor");
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device_quiet(dev);
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return (0);
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}
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@ -187,19 +175,18 @@ npx_probe(dev)
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* Attach routine - announce which it is, and wire into system
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*/
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static int
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npx_attach(dev)
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device_t dev;
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fpu_attach(device_t dev)
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{
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register_t s;
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npxinit(__INITIAL_NPXCW__);
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fpuinit(__INITIAL_FPUCW__);
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if (npx_cleanstate_ready == 0) {
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if (fpu_cleanstate_ready == 0) {
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s = intr_disable();
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stop_emulating();
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fxsave(&npx_cleanstate);
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fxsave(&fpu_cleanstate);
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start_emulating();
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npx_cleanstate_ready = 1;
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fpu_cleanstate_ready = 1;
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intr_restore(s);
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}
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return (0); /* XXX unused */
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@ -209,21 +196,20 @@ npx_attach(dev)
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* Initialize floating point unit.
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*/
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void
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npxinit(control)
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u_short control;
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fpuinit(u_short control)
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{
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static struct savefpu dummy;
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register_t savecrit;
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/*
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* fninit has the same h/w bugs as fnsave. Use the detoxified
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* fnsave to throw away any junk in the fpu. npxsave() initializes
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* fnsave to throw away any junk in the fpu. fpusave() initializes
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* the fpu and sets fpcurthread = NULL as important side effects.
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*/
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savecrit = intr_disable();
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npxsave(&dummy);
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fpusave(&dummy);
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stop_emulating();
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/* XXX npxsave() doesn't actually initialize the fpu in the SSE case. */
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/* XXX fpusave() doesn't actually initialize the fpu in the SSE case. */
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fninit();
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fldcw(&control);
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start_emulating();
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@ -234,34 +220,18 @@ npxinit(control)
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* Free coprocessor (if we have it).
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*/
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void
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npxexit(td)
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struct thread *td;
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fpuexit(struct thread *td)
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{
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#ifdef NPX_DEBUG
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u_int masked_exceptions;
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#endif
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register_t savecrit;
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savecrit = intr_disable();
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if (curthread == PCPU_GET(fpcurthread))
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npxsave(&PCPU_GET(curpcb)->pcb_save);
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fpusave(&PCPU_GET(curpcb)->pcb_save);
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intr_restore(savecrit);
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#ifdef NPX_DEBUG
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masked_exceptions = GET_FPU_CW(td) & GET_FPU_SW(td) & 0x7f;
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/*
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* Log exceptions that would have trapped with the old
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* control word (overflow, divide by 0, and invalid operand).
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*/
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if (masked_exceptions & 0x0d)
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log(LOG_ERR,
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"pid %d (%s) exited with masked floating point exceptions 0x%02x\n",
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td->td_proc->p_pid, td->td_proc->p_comm,
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masked_exceptions);
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#endif
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}
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int
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npxformat()
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fpuformat()
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{
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return (_MC_FPFMT_XMM);
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@ -456,7 +426,7 @@ static char fpetable[128] = {
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* solution for signals other than SIGFPE.
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*/
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int
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npxtrap()
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fputrap()
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{
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register_t savecrit;
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u_short control, status;
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@ -493,48 +463,48 @@ npxtrap()
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static int err_count = 0;
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int
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npxdna()
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fpudna()
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{
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struct pcb *pcb;
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register_t s;
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u_short control;
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if (PCPU_GET(fpcurthread) == curthread) {
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printf("npxdna: fpcurthread == curthread %d times\n",
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printf("fpudna: fpcurthread == curthread %d times\n",
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++err_count);
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stop_emulating();
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return (1);
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}
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if (PCPU_GET(fpcurthread) != NULL) {
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printf("npxdna: fpcurthread = %p (%d), curthread = %p (%d)\n",
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printf("fpudna: fpcurthread = %p (%d), curthread = %p (%d)\n",
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PCPU_GET(fpcurthread),
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PCPU_GET(fpcurthread)->td_proc->p_pid,
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curthread, curthread->td_proc->p_pid);
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panic("npxdna");
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panic("fpudna");
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}
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s = intr_disable();
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stop_emulating();
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/*
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* Record new context early in case frstor causes an IRQ13.
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* Record new context early in case frstor causes a trap.
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*/
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PCPU_SET(fpcurthread, curthread);
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pcb = PCPU_GET(curpcb);
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if ((pcb->pcb_flags & PCB_NPXINITDONE) == 0) {
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if ((pcb->pcb_flags & PCB_FPUINITDONE) == 0) {
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/*
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* This is the first time this thread has used the FPU or
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* the PCB doesn't contain a clean FPU state. Explicitly
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* initialize the FPU and load the default control word.
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*/
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fninit();
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control = __INITIAL_NPXCW__;
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control = __INITIAL_FPUCW__;
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fldcw(&control);
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pcb->pcb_flags |= PCB_NPXINITDONE;
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pcb->pcb_flags |= PCB_FPUINITDONE;
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} else {
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/*
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* The following frstor may cause a trap when the state
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* being restored has a pending error. The error will
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* appear to have been triggered by the current (npx) user
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* appear to have been triggered by the current (fpu) user
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* instruction even when that instruction is a no-wait
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* instruction that should not trigger an error (e.g.,
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* instructions are broken the same as frstor, so our
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@ -548,36 +518,19 @@ npxdna()
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}
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/*
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* Wrapper for fnsave instruction, partly to handle hardware bugs. When npx
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* exceptions are reported via IRQ13, spurious IRQ13's may be triggered by
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* no-wait npx instructions. See the Intel application note AP-578 for
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* details. This doesn't cause any additional complications here. IRQ13's
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* are inherently asynchronous unless the CPU is frozen to deliver them --
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* one that started in userland may be delivered many instructions later,
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* after the process has entered the kernel. It may even be delivered after
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* the fnsave here completes. A spurious IRQ13 for the fnsave is handled in
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* the same way as a very-late-arriving non-spurious IRQ13 from user mode:
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* it is normally ignored at first because we set fpcurthread to NULL; it is
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* normally retriggered in npxdna() after return to user mode.
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* Wrapper for fnsave instruction.
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*
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* npxsave() must be called with interrupts disabled, so that it clears
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* fpusave() must be called with interrupts disabled, so that it clears
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* fpcurthread atomically with saving the state. We require callers to do the
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* disabling, since most callers need to disable interrupts anyway to call
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* npxsave() atomically with checking fpcurthread.
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*
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* A previous version of npxsave() went to great lengths to excecute fnsave
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* with interrupts enabled in case executing it froze the CPU. This case
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* can't happen, at least for Intel CPU/NPX's. Spurious IRQ13's don't imply
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* spurious freezes.
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* fpusave() atomically with checking fpcurthread.
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*/
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void
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npxsave(addr)
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struct savefpu *addr;
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fpusave(struct savefpu *addr)
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{
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stop_emulating();
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fxsave(addr);
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start_emulating();
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PCPU_SET(fpcurthread, NULL);
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}
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@ -587,13 +540,13 @@ npxsave(addr)
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* FPU thread is non-null.
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*/
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void
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npxdrop()
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fpudrop()
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{
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struct thread *td;
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td = PCPU_GET(fpcurthread);
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PCPU_SET(fpcurthread, NULL);
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td->td_pcb->pcb_flags &= ~PCB_NPXINITDONE;
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td->td_pcb->pcb_flags &= ~PCB_FPUINITDONE;
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start_emulating();
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}
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@ -602,15 +555,13 @@ npxdrop()
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* It returns the FPU ownership status.
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*/
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int
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npxgetregs(td, addr)
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struct thread *td;
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struct savefpu *addr;
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fpugetregs(struct thread *td, struct savefpu *addr)
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{
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register_t s;
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if ((td->td_pcb->pcb_flags & PCB_NPXINITDONE) == 0) {
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if (npx_cleanstate_ready)
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bcopy(&npx_cleanstate, addr, sizeof(npx_cleanstate));
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if ((td->td_pcb->pcb_flags & PCB_FPUINITDONE) == 0) {
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if (fpu_cleanstate_ready)
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bcopy(&fpu_cleanstate, addr, sizeof(fpu_cleanstate));
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else
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bzero(addr, sizeof(*addr));
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return (_MC_FPOWNED_NONE);
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@ -631,9 +582,7 @@ npxgetregs(td, addr)
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* Set the state of the FPU.
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*/
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void
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npxsetregs(td, addr)
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struct thread *td;
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struct savefpu *addr;
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fpusetregs(struct thread *td, struct savefpu *addr)
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{
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register_t s;
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@ -645,14 +594,14 @@ npxsetregs(td, addr)
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intr_restore(s);
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bcopy(addr, &td->td_pcb->pcb_save, sizeof(*addr));
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}
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curthread->td_pcb->pcb_flags |= PCB_NPXINITDONE;
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curthread->td_pcb->pcb_flags |= PCB_FPUINITDONE;
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}
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static device_method_t npx_methods[] = {
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static device_method_t fpu_methods[] = {
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/* Device interface */
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DEVMETHOD(device_identify, npx_identify),
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DEVMETHOD(device_probe, npx_probe),
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DEVMETHOD(device_attach, npx_attach),
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DEVMETHOD(device_identify, fpu_identify),
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DEVMETHOD(device_probe, fpu_probe),
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DEVMETHOD(device_attach, fpu_attach),
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DEVMETHOD(device_detach, bus_generic_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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@ -661,49 +610,51 @@ static device_method_t npx_methods[] = {
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{ 0, 0 }
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};
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static driver_t npx_driver = {
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"npx",
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npx_methods,
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static driver_t fpu_driver = {
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"fpu",
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fpu_methods,
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1, /* no softc */
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};
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static devclass_t npx_devclass;
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static devclass_t fpu_devclass;
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/*
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* We prefer to attach to the root nexus so that the usual case (exception 16)
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* doesn't describe the processor as being `on isa'.
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*/
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DRIVER_MODULE(npx, nexus, npx_driver, npx_devclass, 0, 0);
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DRIVER_MODULE(fpu, nexus, fpu_driver, fpu_devclass, 0, 0);
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#ifdef DEV_ISA
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/*
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* This sucks up the legacy ISA support assignments from PNPBIOS/ACPI.
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*/
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static struct isa_pnp_id npxisa_ids[] = {
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static struct isa_pnp_id fpuisa_ids[] = {
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{ 0x040cd041, "Legacy ISA coprocessor support" }, /* PNP0C04 */
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{ 0 }
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};
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static int
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npxisa_probe(device_t dev)
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fpuisa_probe(device_t dev)
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{
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int result;
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if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, npxisa_ids)) <= 0) {
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result = ISA_PNP_PROBE(device_get_parent(dev), dev, fpuisa_ids);
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if (result <= 0)
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device_quiet(dev);
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}
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return(result);
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return (result);
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}
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static int
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||||
npxisa_attach(device_t dev)
|
||||
fpuisa_attach(device_t dev)
|
||||
{
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static device_method_t npxisa_methods[] = {
|
||||
static device_method_t fpuisa_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, npxisa_probe),
|
||||
DEVMETHOD(device_attach, npxisa_attach),
|
||||
DEVMETHOD(device_probe, fpuisa_probe),
|
||||
DEVMETHOD(device_attach, fpuisa_attach),
|
||||
DEVMETHOD(device_detach, bus_generic_detach),
|
||||
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
||||
DEVMETHOD(device_suspend, bus_generic_suspend),
|
||||
@ -712,14 +663,14 @@ static device_method_t npxisa_methods[] = {
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t npxisa_driver = {
|
||||
"npxisa",
|
||||
npxisa_methods,
|
||||
static driver_t fpuisa_driver = {
|
||||
"fpuisa",
|
||||
fpuisa_methods,
|
||||
1, /* no softc */
|
||||
};
|
||||
|
||||
static devclass_t npxisa_devclass;
|
||||
static devclass_t fpuisa_devclass;
|
||||
|
||||
DRIVER_MODULE(npxisa, isa, npxisa_driver, npxisa_devclass, 0, 0);
|
||||
DRIVER_MODULE(npxisa, acpi, npxisa_driver, npxisa_devclass, 0, 0);
|
||||
DRIVER_MODULE(fpuisa, isa, fpuisa_driver, fpuisa_devclass, 0, 0);
|
||||
DRIVER_MODULE(fpuisa, acpi, fpuisa_driver, fpuisa_devclass, 0, 0);
|
||||
#endif /* DEV_ISA */
|
||||
|
||||
@ -516,7 +516,6 @@ exec_setregs(td, entry, stack, ps_strings)
|
||||
|
||||
bzero((char *)regs, sizeof(struct trapframe));
|
||||
regs->tf_rip = entry;
|
||||
/* This strangeness is to ensure alignment after the implied return address */
|
||||
regs->tf_rsp = ((stack - 8) & ~0xF) + 8;
|
||||
regs->tf_rdi = stack; /* argv */
|
||||
regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
|
||||
@ -524,20 +523,20 @@ exec_setregs(td, entry, stack, ps_strings)
|
||||
regs->tf_cs = _ucodesel;
|
||||
|
||||
/*
|
||||
* Arrange to trap the next npx or `fwait' instruction (see npx.c
|
||||
* for why fwait must be trapped at least if there is an npx or an
|
||||
* Arrange to trap the next fpu or `fwait' instruction (see fpu.c
|
||||
* for why fwait must be trapped at least if there is an fpu or an
|
||||
* emulator). This is mainly to handle the case where npx0 is not
|
||||
* configured, since the npx routines normally set up the trap
|
||||
* configured, since the fpu routines normally set up the trap
|
||||
* otherwise. It should be done only at boot time, but doing it
|
||||
* here allows modifying `npx_exists' for testing the emulator on
|
||||
* systems with an npx.
|
||||
* here allows modifying `fpu_exists' for testing the emulator on
|
||||
* systems with an fpu.
|
||||
*/
|
||||
load_cr0(rcr0() | CR0_MP | CR0_TS);
|
||||
|
||||
/* Initialize the npx (if any) for the current process. */
|
||||
/* Initialize the fpu (if any) for the current process. */
|
||||
/*
|
||||
* XXX the above load_cr0() also initializes it and is a layering
|
||||
* violation if NPX is configured. It drops the npx partially
|
||||
* violation. It drops the fpu state partially
|
||||
* and this would be fatal if we were interrupted now, and decided
|
||||
* to force the state to the pcb, and checked the invariant
|
||||
* (CR0_TS clear) if and only if PCPU_GET(fpcurthread) != NULL).
|
||||
@ -555,7 +554,7 @@ cpu_setregs(void)
|
||||
register_t cr0;
|
||||
|
||||
cr0 = rcr0();
|
||||
cr0 |= CR0_NE; /* Done by npxinit() */
|
||||
cr0 |= CR0_NE; /* Done by fpuinit() */
|
||||
cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
|
||||
cr0 |= CR0_WP | CR0_AM;
|
||||
load_cr0(cr0);
|
||||
@ -1525,8 +1524,8 @@ static void
|
||||
get_fpcontext(struct thread *td, mcontext_t *mcp)
|
||||
{
|
||||
|
||||
mcp->mc_ownedfp = npxgetregs(td, (struct savefpu *)&mcp->mc_fpstate);
|
||||
mcp->mc_fpformat = npxformat();
|
||||
mcp->mc_ownedfp = fpugetregs(td, (struct savefpu *)&mcp->mc_fpstate);
|
||||
mcp->mc_fpformat = fpuformat();
|
||||
}
|
||||
|
||||
static int
|
||||
@ -1543,11 +1542,11 @@ set_fpcontext(struct thread *td, const mcontext_t *mcp)
|
||||
else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
|
||||
mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
|
||||
/*
|
||||
* XXX we violate the dubious requirement that npxsetregs()
|
||||
* XXX we violate the dubious requirement that fpusetregs()
|
||||
* be called with interrupts disabled.
|
||||
* XXX obsolete on trap-16 systems?
|
||||
*/
|
||||
npxsetregs(td, (struct savefpu *)&mcp->mc_fpstate);
|
||||
fpusetregs(td, (struct savefpu *)&mcp->mc_fpstate);
|
||||
} else
|
||||
return (EINVAL);
|
||||
return (0);
|
||||
@ -1560,18 +1559,18 @@ fpstate_drop(struct thread *td)
|
||||
|
||||
s = intr_disable();
|
||||
if (PCPU_GET(fpcurthread) == td)
|
||||
npxdrop();
|
||||
fpudrop();
|
||||
/*
|
||||
* XXX force a full drop of the npx. The above only drops it if we
|
||||
* XXX force a full drop of the fpu. The above only drops it if we
|
||||
* owned it.
|
||||
*
|
||||
* XXX I don't much like npxgetregs()'s semantics of doing a full
|
||||
* XXX I don't much like fpugetregs()'s semantics of doing a full
|
||||
* drop. Dropping only to the pcb matches fnsave's behaviour.
|
||||
* We only need to drop to !PCB_INITDONE in sendsig(). But
|
||||
* sendsig() is the only caller of npxgetregs()... perhaps we just
|
||||
* sendsig() is the only caller of fpugetregs()... perhaps we just
|
||||
* have too many layers.
|
||||
*/
|
||||
curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE;
|
||||
curthread->td_pcb->pcb_flags &= ~PCB_FPUINITDONE;
|
||||
intr_restore(s);
|
||||
}
|
||||
|
||||
|
||||
@ -268,7 +268,6 @@ nexus_add_child(device_t bus, int order, const char *name, int unit)
|
||||
/*
|
||||
* Allocate a resource on behalf of child. NB: child is usually going to be a
|
||||
* child of one of our descendants, not a direct child of nexus0.
|
||||
* (Exceptions include npx.)
|
||||
*/
|
||||
static struct resource *
|
||||
nexus_alloc_resource(device_t bus, device_t child, int type, int *rid,
|
||||
|
||||
@ -244,7 +244,7 @@ trap(frame)
|
||||
break;
|
||||
|
||||
case T_ARITHTRAP: /* arithmetic trap */
|
||||
ucode = npxtrap();
|
||||
ucode = fputrap();
|
||||
if (ucode == -1)
|
||||
goto userout;
|
||||
i = SIGFPE;
|
||||
@ -310,7 +310,7 @@ trap(frame)
|
||||
|
||||
case T_DNA:
|
||||
/* transparent fault (due to context switch "late") */
|
||||
if (npxdna())
|
||||
if (fpudna())
|
||||
goto userout;
|
||||
i = SIGFPE;
|
||||
ucode = FPE_FPU_NP_TRAP;
|
||||
@ -338,12 +338,12 @@ trap(frame)
|
||||
|
||||
case T_DNA:
|
||||
/*
|
||||
* The kernel is apparently using npx for copying.
|
||||
* The kernel is apparently using fpu for copying.
|
||||
* XXX this should be fatal unless the kernel has
|
||||
* registered such use.
|
||||
*/
|
||||
if (npxdna()) {
|
||||
printf("npxdna in kernel mode!\n");
|
||||
if (fpudna()) {
|
||||
printf("fpudna in kernel mode!\n");
|
||||
goto out;
|
||||
}
|
||||
break;
|
||||
|
||||
@ -118,7 +118,7 @@ cpu_fork(td1, p2, td2, flags)
|
||||
/* Ensure that p1's pcb is up to date. */
|
||||
savecrit = intr_disable();
|
||||
if (PCPU_GET(fpcurthread) == td1)
|
||||
npxsave(&td1->td_pcb->pcb_save);
|
||||
fpusave(&td1->td_pcb->pcb_save);
|
||||
intr_restore(savecrit);
|
||||
|
||||
/* Point the pcb to the top of the stack */
|
||||
@ -206,7 +206,7 @@ cpu_thread_exit(struct thread *td)
|
||||
{
|
||||
|
||||
if (td == PCPU_GET(fpcurthread))
|
||||
npxdrop();
|
||||
fpudrop();
|
||||
}
|
||||
|
||||
void
|
||||
@ -266,7 +266,7 @@ cpu_set_upcall(struct thread *td, struct thread *td0)
|
||||
* more analysis) (need a good safe default).
|
||||
*/
|
||||
bcopy(td0->td_pcb, pcb2, sizeof(*pcb2));
|
||||
pcb2->pcb_flags &= ~PCB_NPXINITDONE;
|
||||
pcb2->pcb_flags &= ~PCB_FPUINITDONE;
|
||||
|
||||
/*
|
||||
* Create a new fresh stack for the new thread.
|
||||
|
||||
@ -91,7 +91,6 @@
|
||||
sub ("IO_LPT3", "0x3BC", val);
|
||||
sub ("IO_MDA", "0x3B0", val);
|
||||
sub ("IO_NMI", "0x070", val);
|
||||
sub ("IO_NPX", "0x0F0", val);
|
||||
sub ("IO_PMP1", "0x026", val);
|
||||
sub ("IO_PMP2", "0x178", val);
|
||||
sub ("IO_PPI", "0x061", val);
|
||||
|
||||
@ -108,7 +108,7 @@ ia32_get_fpcontext(struct thread *td, struct ia32_mcontext *mcp)
|
||||
*
|
||||
* XXX unpessimize most cases by only aligning when fxsave might be
|
||||
* called, although this requires knowing too much about
|
||||
* npxgetregs()'s internals.
|
||||
* fpugetregs()'s internals.
|
||||
*/
|
||||
addr = (struct savefpu *)&mcp->mc_fpstate;
|
||||
if (td == PCPU_GET(fpcurthread) && ((uintptr_t)(void *)addr & 0xF)) {
|
||||
@ -116,12 +116,12 @@ ia32_get_fpcontext(struct thread *td, struct ia32_mcontext *mcp)
|
||||
addr = (void *)((char *)addr + 4);
|
||||
while ((uintptr_t)(void *)addr & 0xF);
|
||||
}
|
||||
mcp->mc_ownedfp = npxgetregs(td, addr);
|
||||
mcp->mc_ownedfp = fpugetregs(td, addr);
|
||||
if (addr != (struct savefpu *)&mcp->mc_fpstate) {
|
||||
bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
|
||||
bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2));
|
||||
}
|
||||
mcp->mc_fpformat = npxformat();
|
||||
mcp->mc_fpformat = fpuformat();
|
||||
}
|
||||
|
||||
static int
|
||||
@ -148,10 +148,10 @@ ia32_set_fpcontext(struct thread *td, const struct ia32_mcontext *mcp)
|
||||
bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate));
|
||||
}
|
||||
/*
|
||||
* XXX we violate the dubious requirement that npxsetregs()
|
||||
* XXX we violate the dubious requirement that fpusetregs()
|
||||
* be called with interrupts disabled.
|
||||
*/
|
||||
npxsetregs(td, addr);
|
||||
fpusetregs(td, addr);
|
||||
/*
|
||||
* Don't bother putting things back where they were in the
|
||||
* misaligned case, since we know that the caller won't use
|
||||
|
||||
@ -38,12 +38,12 @@
|
||||
*/
|
||||
|
||||
/*
|
||||
* 287/387 NPX Coprocessor Data Structures and Constants
|
||||
* Floating Point Data Structures and Constants
|
||||
* W. Jolitz 1/90
|
||||
*/
|
||||
|
||||
#ifndef _MACHINE_NPX_H_
|
||||
#define _MACHINE_NPX_H_
|
||||
#ifndef _MACHINE_FPU_H_
|
||||
#define _MACHINE_FPU_H_
|
||||
|
||||
/* Contents of each x87 floating point accumulator */
|
||||
struct fpacc87 {
|
||||
@ -95,20 +95,20 @@ struct savefpu {
|
||||
* This is mostly academic for AMD64, because the ABI prefers the use
|
||||
* SSE2 based math. For FreeBSD/amd64, we go with the default settings.
|
||||
*/
|
||||
#define __INITIAL_NPXCW__ 0x037F
|
||||
#define __INITIAL_FPUCW__ 0x037F
|
||||
#define __INITIAL_MXCSR__ 0x1F80
|
||||
#define __INITIAL_MXCSR_MASK__ 0xFFBF
|
||||
|
||||
#ifdef _KERNEL
|
||||
int npxdna(void);
|
||||
void npxdrop(void);
|
||||
void npxexit(struct thread *td);
|
||||
int npxformat(void);
|
||||
int npxgetregs(struct thread *td, struct savefpu *addr);
|
||||
void npxinit(u_short control);
|
||||
void npxsave(struct savefpu *addr);
|
||||
void npxsetregs(struct thread *td, struct savefpu *addr);
|
||||
int npxtrap(void);
|
||||
int fpudna(void);
|
||||
void fpudrop(void);
|
||||
void fpuexit(struct thread *td);
|
||||
int fpuformat(void);
|
||||
int fpugetregs(struct thread *td, struct savefpu *addr);
|
||||
void fpuinit(u_short control);
|
||||
void fpusave(struct savefpu *addr);
|
||||
void fpusetregs(struct thread *td, struct savefpu *addr);
|
||||
int fputrap(void);
|
||||
#endif
|
||||
|
||||
#endif /* !_MACHINE_NPX_H_ */
|
||||
#endif /* !_MACHINE_FPU_H_ */
|
||||
|
||||
@ -66,7 +66,7 @@ struct pcb {
|
||||
|
||||
struct savefpu pcb_save;
|
||||
u_long pcb_flags;
|
||||
#define PCB_NPXINITDONE 0x01 /* fpu state is initialized */
|
||||
#define PCB_FPUINITDONE 0x01 /* fpu state is initialized */
|
||||
#define PCB_FULLCTX 0x02 /* full context restore on sysret */
|
||||
|
||||
caddr_t pcb_onfault; /* copyin/out fault recovery */
|
||||
|
||||
@ -41,12 +41,9 @@
|
||||
* Bits in 386 special registers:
|
||||
*/
|
||||
#define CR0_PE 0x00000001 /* Protected mode Enable */
|
||||
#define CR0_MP 0x00000002 /* "Math" Present (NPX or NPX emulator) */
|
||||
#define CR0_EM 0x00000004 /* EMulate non-NPX coproc. (trap ESC only) */
|
||||
#define CR0_MP 0x00000002 /* "Math" (fpu) Present */
|
||||
#define CR0_EM 0x00000004 /* EMulate FPU instructions. (trap ESC only) */
|
||||
#define CR0_TS 0x00000008 /* Task Switched (if MP, trap ESC and WAIT) */
|
||||
#ifdef notused
|
||||
#define CR0_ET 0x00000010 /* Extension Type (387 (if set) vs 287) */
|
||||
#endif
|
||||
#define CR0_PG 0x80000000 /* PaGing enable */
|
||||
|
||||
/*
|
||||
|
||||
@ -33,7 +33,7 @@ eintrnames:
|
||||
*
|
||||
* XXX - the interrupt frame is set up to look like a trap frame. This is
|
||||
* usually a waste of time. The only interrupt handlers that want a frame
|
||||
* are the clock handler (it wants a clock frame), the npx handler (it's
|
||||
* are the clock handler (it wants a clock frame), the fpu handler (it's
|
||||
* easier to do right all in assembler). The interrupt return routine
|
||||
* needs a trap frame for rare AST's (it could easily convert the frame).
|
||||
* The direct costs of setting up a trap frame are two pushl's (error
|
||||
@ -42,7 +42,7 @@ eintrnames:
|
||||
* costs are making the driver interface nonuniform so unpending of
|
||||
* interrupts is more complicated and slower (call_driver(unit) would
|
||||
* be easier than ensuring an interrupt frame for all handlers. Finally,
|
||||
* there are some struct copies in the npx handler and maybe in the clock
|
||||
* there are some struct copies in the fpu handler and maybe in the clock
|
||||
* handler that could be avoided by working more with pointers to frames
|
||||
* instead of frames.
|
||||
*
|
||||
|
||||
Loading…
Reference in New Issue
Block a user