Sync with Linux packet pacing enhancements in mlx5en(4).
Linux commit: 05d3ac978ed25b753bfe34fe76c50c31ee506a82 MFC after: 1 week Sponsored by: Mellanox Technologies
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@ -58,16 +58,14 @@ static struct mlx5_rl_entry *find_rl_entry(struct mlx5_rl_table *table,
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static int mlx5_set_rate_limit_cmd(struct mlx5_core_dev *dev,
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u32 rate, u32 burst, u16 index)
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{
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u32 in[MLX5_ST_SZ_DW(set_rate_limit_in)] = {0};
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u32 out[MLX5_ST_SZ_DW(set_rate_limit_out)] = {0};
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u32 in[MLX5_ST_SZ_DW(set_rate_limit_in)] = {};
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u32 out[MLX5_ST_SZ_DW(set_rate_limit_out)] = {};
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MLX5_SET(set_rate_limit_in, in, opcode,
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MLX5_CMD_OP_SET_RATE_LIMIT);
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MLX5_SET(set_rate_limit_in, in, opcode, MLX5_CMD_OP_SET_RATE_LIMIT);
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MLX5_SET(set_rate_limit_in, in, rate_limit_index, index);
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MLX5_SET(set_rate_limit_in, in, rate_limit, rate);
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if (MLX5_CAP_QOS(dev, packet_pacing_burst_bound))
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MLX5_SET(set_rate_limit_in, in, burst_upper_bound, burst);
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MLX5_SET(set_rate_limit_in, in, burst_upper_bound, burst);
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MLX5_SET(set_rate_limit_in, in, typical_packet_size, 0 /* use MTU */);
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return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
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}
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@ -690,7 +690,8 @@ struct mlx5_ifc_qos_cap_bits {
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u8 esw_rate_limit[0x1];
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u8 hll[0x1];
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u8 packet_pacing_burst_bound[0x1];
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u8 reserved_at_6[0x1a];
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u8 packet_pacing_typical_size[0x1];
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u8 reserved_at_7[0x19];
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u8 reserved_at_20[0x20];
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@ -7790,7 +7791,13 @@ struct mlx5_ifc_set_rate_limit_in_bits {
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u8 reserved_at_60[0x20];
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u8 rate_limit[0x20];
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u8 burst_upper_bound[0x20];
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u8 reserved_at_c0[0x10];
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u8 typical_packet_size[0x10];
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u8 reserved_at_e0[0x120];
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};
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struct mlx5_ifc_access_register_out_bits {
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